Comments update
vhdl and mini_vhdl pp: remove empty lines and useless linebreaks in maps
Help comments on mini_vhdl to lustre transformation
Added node variables generation from signals/variables definitions in architecture
Code cosmetics
Mini_vhdl to lsutre code cleaning
Added new functions to generate i/o and nodes
Added missing transformation methods squelettons for mini_vhdl to lustre transformation
Added missing Open pattern matching case
Added lustrei README file
[bug solved] do not normalize eexpr in annotations, only in specification.
Merge branch 'git-configure' into cocospec
Better management of git branch in configure.ac
Normalizing eexpr
Extraction of signals assignments in component instantiation concurrent statements
Added Open vhdl_name_t case in pattern matchings
Merge branch 'cocospec' of https://cavale.enseeiht.fr/git/lustrec into cocospec
Improving connection with CDash
doc: add HTML grammar file
parser: fix Menhir end-of-stream errors
clean Lustre parser file (mainly by commenting...)
solve error in lexer introduced by previous merge
finishing solving strange conflicts for merge...
Renamed annots into contracts. Preparing for syntax extension
- Removed the kind2 file (parser/lexer/types)- Cleaned a little bit our parser: removal of old prelude constructs
Cocospec discussions in the TODO.org
Beginning of squeleton for mini_vhdl refactoring
Modified output display for check mode
vhdl 2 mini-vhdl code cleaning
First version of implicit memories explicitation
Mini vhdl utils simplification
Added open in vhdl ast
Vhdl yojson parsing/printing (open)
Vhdl pp update (open)
Mini vhdl pp update (If, Case, Use clause)
component instantiation generic map resolution
Bug fix: pp for unary operations
Resolution of association lists for component instantiation
Communalisation of mini-vhdl structure utils
Updated checks display and adde small obvious checks
Code cleaning in vhdl to mini-vhdl transformation
Added missing sensitivity list resolution fold
Added -check flag to start vhdl model verification
DB tuple update to contain assigned elements in component
vhdl and mini-vhdl process printing
Removed concurrent assignment statement from mini-vhdl grammar
Mini-vhdl pretty printing for sequential statements and processes
Concurrent signal assignment statement transformation to concurrent process statement
Clean ppx deriving comments
update of mini-vhdl to lustre
Update of mini-vhdl pp
Building explicit process from concurrent signl assignment
Bug fix: resolve entity/arch reference from component instantiation declaration
Minor comments update
add more conversion libraries
Start of the Lustre generator
mutable object field storing architecture<->entities<->contexts relation, generation of MiniVHDL component instantiation
Added MiniVHDL versions of component instantiation and concurretn statement
PP order for components and packages
PP for packages in minivhdl
Update of the command line
Added command line parameters
Typo correction
Some code comments
definition of the mini-vhdl types + pp + transformation from vhdl structure
Split PP and Yojson in separate ml for vhdl ast
PP update: component instantiation type, archi format, port & generic decl in components, signal conditions, return statements expression
Printer corrections: signal_condition, conditional_signal, elsif, when conditions, F***ing non-brekaing characters
PP for procedure call
Qualified expressions, default values for expressions, pp for association_elements
Unbounded array definition printing
Use clauses in package definition
Conditional signals selection, waveform with delay
PP for Subprogram
Correction of Procedure declaration pp
Default value for ProcedureCall assocs
Aggregate pp, correction of element_assoc pp
Default value corrections
Added support for declarative items
Added support for use clause in architecture declarations
Update of component instantiation pp
fix rem and mod
Merge branch 'master' of https://cavale.enseeiht.fr/git/lustrec
add tanh
Corrections on component instantiation
Added support for Component declarations in packages
Pretty printing of assert statements
Constant expression printing with units, Format for case statements, process formatting and name
Added support for constants units
Main executable now throws exceptions when parsing errors
Added support for Array,Record,Enumeration constructs
Added support for ProcedureCall statements
Update of the component instantiation type to add architecture name reference
Added support for component instantiation
code cleaning
Cleaned main importer, now outputs only the vhdl code
Correction of Variables,Signals,Constants definitions of initial values. Now uses an expression.
PP correction for separating spaces
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