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Revision d77323b8 src/tools/importer/main_lustre_importer.ml

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src/tools/importer/main_lustre_importer.ml
44 44
                   to_list_content_str "DESIGN_UNIT" |>
45 45
                   to_list_content_str "INTERFACE_VARIABLE_DECLARATION" |>
46 46
                   flatten_ivd |>
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                   to_list_str "ARCHITECTURE_BODY" |>
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                   to_list_str "ARCHITECTURE_DECLARATIVE_PART" |>
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                   to_list_str "ARCHITECTURE_STATEMENT_PART" |>
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                   flatten_numeric_literal |>
50 48
                   to_list_str "ENTITY_DECLARATION" |>
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                   to_list_str "ARCHITECTURE_BODY" |>
51 50
                   to_list_str "PACKAGE_DECLARATION" in
52 51
  Format.printf "Preprocessed json:\n";
53 52
  Format.printf "%s\n\n" (pretty_to_string vhdl1_json);
54
  List.iter (Format.printf "%s\n") (print_depth vhdl1_json 5 "");
53
(*  List.iter (Format.printf "%s\n") (print_depth vhdl1_json 7 ""); *)
55 54

  
56 55
  to_file (Sys.argv.(1)^".out.json") vhdl1_json;
57 56

  
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(*
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  let typ = {name = "type"; definition = (Some (Range (Some "toto", 7, 0)))} in
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  Format.printf "\nModel to string\n%s\n\n" (pretty_to_string (vhdl_subtype_indication_t_to_yojson typ));
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  let elem = "[\"SUBTYPE_DECLARATION\", {\"name\": \"byte\", \"typ\": { \"name\": \"bit_vector\", \"definition\": [ \"RANGE_WITH_DIRECTION\", \"downto\", 7, 0 ]}}]" in
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  match vhdl_definition_t_of_yojson (from_string elem) with
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    Ok x -> Format.printf "\nString to string\n%s\n\n" (pretty_to_string (vhdl_definition_t_to_yojson x));
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  | Error e -> Format.printf "Error: %s\n" e;
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*)
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  match vhdl_file_t_of_yojson vhdl1_json with
59 68
    Ok x -> Format.printf "Parsed VHDL: \n%s\n" (pretty_to_string (vhdl_file_t_to_yojson x))
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  | Error e -> failwith e;
69
  | Error e -> Format.printf "Error: %s\n" e;

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