## lustrec / bench / distrib / large / ccp05 / mutants / ccp05.mutant.n105.lus @ 50d06a28

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node top |
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(onOff: bool; |

3 |
decelSet: bool; |

4 |
accelResume: bool; |

5 |
cancel: bool; |

6 |
brakePedal: bool; |

7 |
carGear: int; |

8 |
carSpeed: real; |

9 |
validInputs: bool) |

10 |
returns |

11 |
(OK: bool); |

12 | |

13 |
var |

14 |
V11_mode: int; |

15 |
V14_VRP1: bool; |

16 |
V15_VRP2: bool; |

17 |
V16_CP8a: bool; |

18 |
V17_VRP3: bool; |

19 |
V18_VRP4: bool; |

20 |
V19_SP4: bool; |

21 |
V20_SP5: bool; |

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V21_SP6: bool; |

23 |
V22_SP7: bool; |

24 |
V23_SP3b: bool; |

25 |
V25_SP3: bool; |

26 |
V26_SP3a: bool; |

27 |
V27_SP2: bool; |

28 |
V28_SP1: bool; |

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V29_SP8: bool; |

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V30_SP9: bool; |

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V31_SP10: bool; |

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V32_SP11: bool; |

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V34_zz1: bool; |

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V35_zz2: real; |

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V37_zz4: bool; |

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V38_zz5: real; |

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V39_zz6: int; |

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V40_zz7: int; |

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V41_zz8: int; |

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V42_zz9: int; |

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V43_zz10: int; |

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V44_zz11: int; |

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V45_zz12: int; |

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V46_zz13: int; |

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V47_zz14: int; |

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V48_zz15: bool; |

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V49_zz16: int; |

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V50_zz17: int; |

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V51_zz18: int; |

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V52_zz19: bool; |

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V53_zz20: int; |

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V54_zz21: int; |

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V55_zz22: int; |

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V56_zz23: bool; |

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V57_zz24: bool; |

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V58_zz25: int; |

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V59_zz26: bool; |

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V60_zz27: bool; |

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V61_zz28: int; |

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V62_zz29: int; |

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V63_zz30: bool; |

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V64_zz31: bool; |

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V65_zz32: int; |

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V66_zz33: bool; |

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V67_zz34: int; |

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V68_zz35: int; |

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V69_zz36: bool; |

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V70_zz37: bool; |

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V71_zz38: int; |

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V72_zz39: bool; |

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V73_zz40: int; |

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V74_zz41: int; |

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V75_zz42: bool; |

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V76_zz43: bool; |

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V77_zz44: int; |

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V78_zz45: int; |

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V79_zz46: int; |

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V80_zz47: bool; |

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V81_zz48: bool; |

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V82_zz49: int; |

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V83_zz50: int; |

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V84_zz51: int; |

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V85_zz52: bool; |

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V86_zz53: int; |

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V87_zz54: int; |

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V88_zz55: int; |

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V89_zz56: bool; |

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V90_zz57: bool; |

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V91_zz58: int; |

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V92_zz59: int; |

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V93_zz60: int; |

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V94_zz61: int; |

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V95_zz62: int; |

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V96_zz63: int; |

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V97_zz64: bool; |

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V98_zz65: bool; |

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V99_zz66: int; |

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V100_zz67: int; |

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V101_zz68: int; |

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V102_zz69: int; |

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V103_zz70: int; |

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V104_zz71: int; |

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V105_zz72: bool; |

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V106_zz73: bool; |

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V107_zz74: int; |

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V108_zz75: int; |

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V109_zz76: int; |

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V110_zz77: int; |

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V111_zz78: int; |

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V112_zz79: int; |

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V113_zz80: int; |

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V114_zz81: int; |

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V115_zz82: bool; |

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V116_zz83: int; |

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V117_zz84: int; |

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V118_zz85: int; |

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V119_zz86: int; |

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V120_zz87: bool; |

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V121_zz88: bool; |

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V122_zz89: int; |

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V123_zz90: bool; |

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V124_zz91: int; |

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V125_zz92: int; |

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V126_zz93: bool; |

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V127_zz94: bool; |

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V128_zz95: int; |

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V129_zz96: bool; |

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V130_zz97: int; |

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V131_zz98: int; |

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V132_zz99: bool; |

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V133_zz100: bool; |

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V134_zz101: int; |

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V135_zz102: int; |

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V136_zz103: int; |

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V137_zz104: bool; |

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V138_zz105: bool; |

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V139_zz106: int; |

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V140_zz107: bool; |

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V141_zz108: int; |

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V142_zz109: int; |

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V143_zz110: int; |

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V144_zz111: int; |

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V145_zz112: bool; |

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V146_zz113: int; |

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V147_zz114: int; |

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V148_zz115: int; |

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V149_zz116: bool; |

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V150_zz117: bool; |

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V151_zz118: int; |

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V152_zz119: int; |

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V153_zz120: int; |

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V154_zz121: int; |

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V155_zz122: int; |

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V156_zz123: int; |

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V157_zz124: int; |

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V158_zz125: int; |

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V159_zz126: int; |

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V160_zz127: int; |

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V161_zz128: bool; |

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V162_zz129: int; |

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V163_zz130: int; |

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V164_zz131: int; |

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V165_zz132: int; |

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V166_zz133: bool; |

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V167_zz134: int; |

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V168_zz135: int; |

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V169_zz136: int; |

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V170_zz137: int; |

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V171_zz138: bool; |

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V172_zz139: bool; |

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V173_zz140: int; |

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V174_zz141: bool; |

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V175_zz142: int; |

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V176_zz143: int; |

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V177_zz144: bool; |

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V178_zz145: bool; |

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V179_zz146: int; |

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V180_zz147: int; |

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V181_zz148: int; |

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V182_zz149: int; |

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V183_zz150: int; |

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V184_zz151: bool; |

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V185_zz153: int; |

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V186_zz154: int; |

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V187_zz155: bool; |

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V188_zz156: int; |

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V189_zz157: int; |

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V190_zz158: bool; |

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V193_zz161: int; |

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V194_zz162: bool; |

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V198_zz166: int; |

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V199_zz167: int; |

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V200_zz168: int; |

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V201_zz169: int; |

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V202_zz170: int; |

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V203_zz171: bool; |

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V204_zz172: int; |

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V205_zz173: int; |

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V206_zz174: int; |

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V207_zz175: int; |

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V208_zz176: int; |

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V209_zz177: bool; |

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V211_zz179: bool; |

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V212_zz180: bool; |

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V213_zz181: bool; |

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V214_zz182: bool; |

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V216_zz184: bool; |

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V217_zz185: bool; |

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V218_zz186: bool; |

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V219_zz187: bool; |

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V220_zz188: bool; |

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V221_zz189: bool; |

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V222_zz190: real; |

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V223_zz191: bool; |

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V224_zz192: bool; |

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V225_zz193: bool; |

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V226_zz194: bool; |

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V227_zz195: bool; |

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V228_zz196: bool; |

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V229_zz197: bool; |

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V230_zz198: bool; |

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V231_zz199: bool; |

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V232_zz200: bool; |

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V233_zz201: bool; |

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V234_zz202: bool; |

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V235_zz203: bool; |

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V236_zz204: real; |

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V237_zz205: real; |

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V238_zz206: bool; |

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V239_zz207: bool; |

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V240_zz208: bool; |

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V241_zz209: bool; |

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V242_zz210: bool; |

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V243_zz211: real; |

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V244_zz212: bool; |

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V245_zz213: bool; |

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V246_zz214: bool; |

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V247_zz215: bool; |

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V248_zz216: bool; |

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V249_zz217: bool; |

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V250_zz218: real; |

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V251_zz219: real; |

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V252_zz220: real; |

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V253_zz221: real; |

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V254_zz222: real; |

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V255_zz223: real; |

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V256_zz224: real; |

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V257_zz225: real; |

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V258_zz226: real; |

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V259_zz227: real; |

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V260_zz228: real; |

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V261_zz229: real; |

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V262_zz230: real; |

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V263_zz231: bool; |

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V264_zz232: bool; |

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V265_zz233: bool; |

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V266_zz234: bool; |

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V267_zz235: bool; |

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V268_zz236: bool; |

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V269_zz237: bool; |

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V270_zz238: bool; |

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V271_zz239: bool; |

263 | |

264 |
let |

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OK = ((V185_zz153 = 1) or ((V185_zz153 >= 2) and (V185_zz153 <= 8))); |

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V11_mode = (if V187_zz155 then V186_zz154 else V183_zz150); |

267 |
V14_VRP1 = (V264_zz232 and V263_zz231); |

268 |
V15_VRP2 = (V266_zz234 and V265_zz233); |

269 |
V16_CP8a = ((not V194_zz162) or V233_zz201); |

270 |
V17_VRP3 = (not V269_zz237); |

271 |
V18_VRP4 = ((V270_zz238 or V227_zz195) or V271_zz239); |

272 |
V19_SP4 = ((not V235_zz203) or V226_zz194); |

273 |
V20_SP5 = ((not V241_zz209) or V238_zz206); |

274 |
V21_SP6 = ((not V248_zz216) or V239_zz207); |

275 |
V22_SP7 = ((not V249_zz217) or V240_zz208); |

276 |
V23_SP3b = ((not V230_zz198) or V232_zz200); |

277 |
V25_SP3 = ((not V230_zz198) or V227_zz195); |

278 |
V26_SP3a = ((not (not V241_zz209)) or (not V231_zz199)); |

279 |
V27_SP2 = ((not (not V233_zz201)) or V219_zz187); |

280 |
V28_SP1 = ((not (not V218_zz186)) or V219_zz187); |

281 |
V29_SP8 = ((not V242_zz210) or V244_zz212); |

282 |
V30_SP9 = ((not V246_zz214) or V247_zz215); |

283 |
V31_SP10 = ((not V223_zz191) or V224_zz192); |

284 |
V32_SP11 = ((not V225_zz193) or V226_zz194); |

285 |
V34_zz1 = (true -> (if (pre V249_zz217) then false else (pre V34_zz1))); |

286 |
V35_zz2 = ((if (V34_zz1 and (not V249_zz217)) then 0.000000E+00 else ( |

287 |
V254_zz222 + 5.000000E-02)) -> (if (V34_zz1 and (not V249_zz217)) then |

288 |
0.000000E+00 else (if V249_zz217 then (V254_zz222 + 5.000000E-02) else (pre |

289 |
V35_zz2)))); |

290 |
V37_zz4 = (true -> (if (pre V248_zz216) then false else (pre V37_zz4))); |

291 |
V38_zz5 = ((if (V37_zz4 and (not V248_zz216)) then 0.000000E+00 else ( |

292 |
V254_zz222 - 5.000000E-02)) -> (if (V37_zz4 and (not V248_zz216)) then |

293 |
0.000000E+00 else (if V248_zz216 then (V254_zz222 - 5.000000E-02) else (pre |

294 |
V38_zz5)))); |

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V39_zz6 = (if (not (V82_zz49 = 4)) then 4 else V82_zz49); |

296 |
V40_zz7 = (if (not (V82_zz49 = 4)) then 4 else V79_zz46); |

297 |
V41_zz8 = (if (V78_zz45 = 5) then 3 else V78_zz45); |

298 |
V42_zz9 = (if (not (V77_zz44 = 4)) then 4 else V77_zz44); |

299 |
V43_zz10 = (if (not (V77_zz44 = 4)) then 4 else V74_zz41); |

300 |
V44_zz11 = (if (V73_zz40 = 6) then 3 else V73_zz40); |

301 |
V45_zz12 = (if (not (V71_zz38 = 6)) then 6 else V71_zz38); |

302 |
V46_zz13 = (if (not (V71_zz38 = 6)) then 5 else V68_zz35); |

303 |
V47_zz14 = (if (V67_zz34 = 4) then 3 else V67_zz34); |

304 |
V48_zz15 = (if (V67_zz34 = 4) then false else V66_zz33); |

305 |
V49_zz16 = (if (not (V65_zz32 = 5)) then 5 else V65_zz32); |

306 |
V50_zz17 = (if (not (V65_zz32 = 5)) then 6 else V62_zz29); |

307 |
V51_zz18 = (if (V61_zz28 = 4) then 3 else V61_zz28); |

308 |
V52_zz19 = (if (V61_zz28 = 4) then false else V60_zz27); |

309 |
V53_zz20 = (if (not (V58_zz25 = 4)) then 4 else V58_zz25); |

310 |
V54_zz21 = (if (not (V58_zz25 = 4)) then 4 else V142_zz109); |

311 |
V55_zz22 = (if (V141_zz108 = 4) then 3 else V141_zz108); |

312 |
V56_zz23 = (if (V141_zz108 = 4) then false else V140_zz107); |

313 |
V57_zz24 = ((V141_zz108 = 4) and ((if ((V217_zz185 = true) = false) then 0 |

314 |
else 1) <> 0)); |

315 |
V58_zz25 = (if V57_zz24 then V55_zz22 else V141_zz108); |

316 |
V59_zz26 = (if V57_zz24 then V56_zz23 else V140_zz107); |

317 |
V60_zz27 = (if V57_zz24 then true else V59_zz26); |

318 |
V61_zz28 = (if V57_zz24 then V53_zz20 else V58_zz25); |

319 |
V62_zz29 = (if V57_zz24 then V54_zz21 else V142_zz109); |

320 |
V63_zz30 = ((V61_zz28 = 4) and (((if ((V203_zz171 = true) = false) then 0 |

321 |
else 1) <> 0) and (not V57_zz24))); |

322 |
V64_zz31 = (V63_zz30 or V57_zz24); |

323 |
V65_zz32 = (if V63_zz30 then V51_zz18 else V61_zz28); |

324 |
V66_zz33 = (if V63_zz30 then V52_zz19 else V60_zz27); |

325 |
V67_zz34 = (if V63_zz30 then V49_zz16 else V65_zz32); |

326 |
V68_zz35 = (if V63_zz30 then V50_zz17 else V62_zz29); |

327 |
V69_zz36 = ((V67_zz34 = 4) and (((if ((V209_zz177 = true) = false) then 0 |

328 |
else 1) <> 0) and (not V64_zz31))); |

329 |
V70_zz37 = (V69_zz36 or V64_zz31); |

330 |
V71_zz38 = (if V69_zz36 then V47_zz14 else V67_zz34); |

331 |
V72_zz39 = (if V69_zz36 then V48_zz15 else V66_zz33); |

332 |
V73_zz40 = (if V69_zz36 then V45_zz12 else V71_zz38); |

333 |
V74_zz41 = (if V69_zz36 then V46_zz13 else V68_zz35); |

334 |
V75_zz42 = ((V73_zz40 = 6) and (((if ((V209_zz177 = false) = false) then 0 |

335 |
else 1) <> 0) and (not V70_zz37))); |

336 |
V76_zz43 = (V75_zz42 or V70_zz37); |

337 |
V77_zz44 = (if V75_zz42 then V44_zz11 else V73_zz40); |

338 |
V78_zz45 = (if V75_zz42 then V42_zz9 else V77_zz44); |

339 |
V79_zz46 = (if V75_zz42 then V43_zz10 else V74_zz41); |

340 |
V80_zz47 = ((V78_zz45 = 5) and (((if ((V203_zz171 = false) = false) then 0 |

341 |
else 1) <> 0) and (not V76_zz43))); |

342 |
V81_zz48 = (V80_zz47 or V76_zz43); |

343 |
V82_zz49 = (if V80_zz47 then V41_zz8 else V78_zz45); |

344 |
V83_zz50 = (if V80_zz47 then V39_zz6 else V82_zz49); |

345 |
V84_zz51 = (if V80_zz47 then V40_zz7 else V79_zz46); |

346 |
V85_zz52 = (if ((not V81_zz48) and (V83_zz50 = 4)) then false else V72_zz39); |

347 |
V86_zz53 = (if (not (V88_zz55 = 4)) then 4 else V88_zz55); |

348 |
V87_zz54 = (if (not (V88_zz55 = 4)) then 4 else V136_zz103); |

349 |
V88_zz55 = (if (not ((V139_zz106 >= 3) and (V139_zz106 <= 6))) then 3 else |

350 |
V139_zz106); |

351 |
V89_zz56 = ((not ((V139_zz106 >= 3) and (V139_zz106 <= 6))) and ((V88_zz55 >= |

352 |
3) and (V88_zz55 <= 6))); |

353 |
V90_zz57 = ((V91_zz58 = 4) or ((V91_zz58 = 5) or (V91_zz58 = 6))); |

354 |
V91_zz58 = (if V89_zz56 then V86_zz53 else V88_zz55); |

355 |
V92_zz59 = (if V89_zz56 then V87_zz54 else V136_zz103); |

356 |
V93_zz60 = (if (V135_zz102 = 7) then 2 else V135_zz102); |

357 |
V94_zz61 = (if (not (V96_zz63 = 4)) then 4 else V96_zz63); |

358 |
V95_zz62 = (if (not (V96_zz63 = 4)) then 4 else V131_zz98); |

359 |
V96_zz63 = (if (not ((V134_zz101 >= 3) and (V134_zz101 <= 6))) then 3 else |

360 |
V134_zz101); |

361 |
V97_zz64 = ((not ((V134_zz101 >= 3) and (V134_zz101 <= 6))) and ((V96_zz63 >= |

362 |
3) and (V96_zz63 <= 6))); |

363 |
V98_zz65 = ((V99_zz66 = 4) or ((V99_zz66 = 5) or (V99_zz66 = 6))); |

364 |
V99_zz66 = (if V97_zz64 then V94_zz61 else V96_zz63); |

365 |
V100_zz67 = (if V97_zz64 then V95_zz62 else V131_zz98); |

366 |
V101_zz68 = (if (V130_zz97 = 8) then 2 else V130_zz97); |

367 |
V102_zz69 = (if (not (V104_zz71 = 4)) then 4 else V104_zz71); |

368 |
V103_zz70 = (if (not (V104_zz71 = 4)) then 4 else V125_zz92); |

369 |
V104_zz71 = (if (not ((V128_zz95 >= 3) and (V128_zz95 <= 6))) then 3 else |

370 |
V128_zz95); |

371 |
V105_zz72 = ((not ((V128_zz95 >= 3) and (V128_zz95 <= 6))) and ((V104_zz71 >= |

372 |
3) and (V104_zz71 <= 6))); |

373 |
V106_zz73 = ((V107_zz74 = 4) or ((V107_zz74 = 5) or (V107_zz74 = 6))); |

374 |
V107_zz74 = (if V105_zz72 then V102_zz69 else V104_zz71); |

375 |
V108_zz75 = (if V105_zz72 then V103_zz70 else V125_zz92); |

376 |
V109_zz76 = (if (V124_zz91 = 8) then 2 else V124_zz91); |

377 |
V110_zz77 = (if (not (V122_zz89 = 8)) then 8 else V122_zz89); |

378 |
V111_zz78 = (if (not (V122_zz89 = 8)) then 3 else V181_zz148); |

379 |
V112_zz79 = (if (V117_zz84 = 6) then 3 else V117_zz84); |

380 |
V113_zz80 = (if (V116_zz83 = 5) then 3 else V116_zz83); |

381 |
V114_zz81 = (if (V180_zz147 = 4) then 3 else V180_zz147); |

382 |
V115_zz82 = (if (V180_zz147 = 4) then false else V174_zz141); |

383 |
V116_zz83 = (if ((V180_zz147 >= 3) and (V180_zz147 <= 6)) then V114_zz81 else |

384 |
V180_zz147); |

385 |
V117_zz84 = (if ((V180_zz147 >= 3) and (V180_zz147 <= 6)) then V113_zz80 else |

386 |
V116_zz83); |

387 |
V118_zz85 = (if ((V180_zz147 >= 3) and (V180_zz147 <= 6)) then V112_zz79 else |

388 |
V117_zz84); |

389 |
V119_zz86 = (if ((V180_zz147 >= 3) and (V180_zz147 <= 6)) then 2 else |

390 |
V118_zz85); |

391 |
V120_zz87 = (if ((V180_zz147 >= 3) and (V180_zz147 <= 6)) then V115_zz82 else |

392 |
V174_zz141); |

393 |
V121_zz88 = (((V180_zz147 >= 3) and (V180_zz147 <= 6)) and (not V218_zz186)); |

394 |
V122_zz89 = (if V121_zz88 then V119_zz86 else V180_zz147); |

395 |
V123_zz90 = (if V121_zz88 then V120_zz87 else V174_zz141); |

396 |
V124_zz91 = (if V121_zz88 then V110_zz77 else V122_zz89); |

397 |
V125_zz92 = (if (not V121_zz88) then V111_zz78 else V181_zz148); |

398 |
V126_zz93 = ((V124_zz91 = 8) and ((((if ((V217_zz185 = true) = false) then 0 |

399 |
else 1) <> 0) and ((if ((V218_zz186 = true) = false) then 0 else 1) <> 0)) |

400 |
and (not V121_zz88))); |

401 |
V127_zz94 = (V126_zz93 or V121_zz88); |

402 |
V128_zz95 = (if V126_zz93 then V109_zz76 else V124_zz91); |

403 |
V129_zz96 = (if V126_zz93 then true else V123_zz90); |

404 |
V130_zz97 = (if V126_zz93 then V107_zz74 else V128_zz95); |

405 |
V131_zz98 = (if V126_zz93 then V108_zz75 else V125_zz92); |

406 |
V132_zz99 = ((V130_zz97 = 8) and ((((if ((V212_zz180 = true) = false) then 0 |

407 |
else 1) <> 0) and ((if ((V218_zz186 = true) = false) then 0 else 1) <> 0)) |

408 |
and (not V127_zz94))); |

409 |
V133_zz100 = (V132_zz99 or V127_zz94); |

410 |
V134_zz101 = (if V132_zz99 then V101_zz68 else V130_zz97); |

411 |
V135_zz102 = (if V132_zz99 then V99_zz66 else V134_zz101); |

412 |
V136_zz103 = (if V132_zz99 then V100_zz67 else V131_zz98); |

413 |
V137_zz104 = ((V135_zz102 = 7) and ((((if ((V217_zz185 = true) = false) then |

414 |
0 else 1) <> 0) and ((if ((V218_zz186 = true) = false) then 0 else 1) <> 0)) |

415 |
and (not V133_zz100))); |

416 |
V138_zz105 = (V137_zz104 or V133_zz100); |

417 |
V139_zz106 = (if V137_zz104 then V93_zz60 else V135_zz102); |

418 |
V140_zz107 = (if V137_zz104 then true else V129_zz96); |

419 |
V141_zz108 = (if V137_zz104 then V91_zz58 else V139_zz106); |

420 |
V142_zz109 = (if V137_zz104 then V92_zz59 else V136_zz103); |

421 |
V143_zz110 = (if ((not V138_zz105) and ((V141_zz108 >= 3) and (V141_zz108 <= |

422 |
6))) then V83_zz50 else V141_zz108); |

423 |
V144_zz111 = (if ((not V138_zz105) and ((V141_zz108 >= 3) and (V141_zz108 <= |

424 |
6))) then V84_zz51 else V142_zz109); |

425 |
V145_zz112 = (if ((not V138_zz105) and ((V141_zz108 >= 3) and (V141_zz108 <= |

426 |
6))) then V85_zz52 else V140_zz107); |

427 |
V146_zz113 = (if (not (V148_zz115 = 7)) then 7 else V148_zz115); |

428 |
V147_zz114 = (if (not (V148_zz115 = 7)) then 2 else V176_zz143); |

429 |
V148_zz115 = (if (not ((V179_zz146 >= 2) and (V179_zz146 <= 8))) then 2 else |

430 |
V179_zz146); |

431 |
V149_zz116 = ((not ((V179_zz146 >= 2) and (V179_zz146 <= 8))) and (( |

432 |
V148_zz115 >= 2) and (V148_zz115 <= 8))); |

433 |
V150_zz117 = (((V151_zz118 >= 3) and (V151_zz118 <= 6)) or ((V151_zz118 = 7) |

434 |
or (V151_zz118 = 8))); |

435 |
V151_zz118 = (if V149_zz116 then V146_zz113 else V148_zz115); |

436 |
V152_zz119 = (if V149_zz116 then V147_zz114 else V176_zz143); |

437 |
V153_zz120 = (if (V175_zz142 = 1) then 0 else V175_zz142); |

438 |
V154_zz121 = (if (not (V173_zz140 = 1)) then 1 else V173_zz140); |

439 |
V155_zz122 = (if (not (V173_zz140 = 1)) then 1 else V189_zz157); |

440 |
V156_zz123 = (if (V168_zz135 = 8) then 2 else V168_zz135); |

441 |
V157_zz124 = (if (V167_zz134 = 7) then 2 else V167_zz134); |

442 |
V158_zz125 = (if (V163_zz130 = 6) then 3 else V163_zz130); |

443 |
V159_zz126 = (if (V162_zz129 = 5) then 3 else V162_zz129); |

444 |
V160_zz127 = (if (V188_zz156 = 4) then 3 else V188_zz156); |

445 |
V161_zz128 = (if (V188_zz156 = 4) then false else V190_zz158); |

446 |
V162_zz129 = (if ((V188_zz156 >= 3) and (V188_zz156 <= 6)) then V160_zz127 |

447 |
else V188_zz156); |

448 |
V163_zz130 = (if ((V188_zz156 >= 3) and (V188_zz156 <= 6)) then V159_zz126 |

449 |
else V162_zz129); |

450 |
V164_zz131 = (if ((V188_zz156 >= 3) and (V188_zz156 <= 6)) then V158_zz125 |

451 |
else V163_zz130); |

452 |
V165_zz132 = (if ((V188_zz156 >= 3) and (V188_zz156 <= 6)) then 2 else |

453 |
V164_zz131); |

454 |
V166_zz133 = (if ((V188_zz156 >= 3) and (V188_zz156 <= 6)) then V161_zz128 |

455 |
else V190_zz158); |

456 |
V167_zz134 = (if ((V188_zz156 >= 2) and (V188_zz156 <= 8)) then V165_zz132 |

457 |
else V188_zz156); |

458 |
V168_zz135 = (if ((V188_zz156 >= 2) and (V188_zz156 <= 8)) then V157_zz124 |

459 |
else V167_zz134); |

460 |
V169_zz136 = (if ((V188_zz156 >= 2) and (V188_zz156 <= 8)) then V156_zz123 |

461 |
else V168_zz135); |

462 |
V170_zz137 = (if ((V188_zz156 >= 2) and (V188_zz156 <= 8)) then 0 else |

463 |
V169_zz136); |

464 |
V171_zz138 = (if ((V188_zz156 >= 2) and (V188_zz156 <= 8)) then V166_zz133 |

465 |
else V190_zz158); |

466 |
V172_zz139 = (((V188_zz156 >= 2) and (V188_zz156 <= 8)) and (not onOff)); |

467 |
V173_zz140 = (if V172_zz139 then V170_zz137 else V188_zz156); |

468 |
V174_zz141 = (if V172_zz139 then V171_zz138 else V190_zz158); |

469 |
V175_zz142 = (if V172_zz139 then V154_zz121 else V173_zz140); |

470 |
V176_zz143 = (if V172_zz139 then V155_zz122 else V189_zz157); |

471 |
V177_zz144 = ((V175_zz142 = 1) and (onOff and (not V172_zz139))); |

472 |
V178_zz145 = (V177_zz144 or V172_zz139); |

473 |
V179_zz146 = (if V177_zz144 then V153_zz120 else V175_zz142); |

474 |
V180_zz147 = (if V177_zz144 then V151_zz118 else V179_zz146); |

475 |
V181_zz148 = (if V177_zz144 then V152_zz119 else V176_zz143); |

476 |
V182_zz149 = (if ((not V178_zz145) and ((V180_zz147 >= 2) and (V180_zz147 <= |

477 |
8))) then V143_zz110 else V180_zz147); |

478 |
V183_zz150 = (if ((not V178_zz145) and ((V180_zz147 >= 2) and (V180_zz147 <= |

479 |
8))) then V144_zz111 else V181_zz148); |

480 |
V184_zz151 = (if ((not V178_zz145) and ((V180_zz147 >= 2) and (V180_zz147 <= |

481 |
8))) then V145_zz112 else V174_zz141); |

482 |
V185_zz153 = (if (not (V188_zz156 = 1)) then 1 else V188_zz156); |

483 |
V186_zz154 = (if (not (V188_zz156 = 1)) then 1 else V189_zz157); |

484 |
V187_zz155 = (true -> (if (pre true) then false else (pre V187_zz155))); |

485 |
V188_zz156 = (0 -> (pre V193_zz161)); |

486 |
V189_zz157 = (0 -> (pre V11_mode)); |

487 |
V190_zz158 = (false -> (pre V194_zz162)); |

488 |
V193_zz161 = (if V187_zz155 then V185_zz153 else V182_zz149); |

489 |
V194_zz162 = (if V187_zz155 then V190_zz158 else V184_zz151); |

490 |
V198_zz166 = (if (0 >= V200_zz168) then 0 else V200_zz168); |

491 |
V199_zz167 = (V201_zz169 + 1); |

492 |
V200_zz168 = (if accelResume then V199_zz167 else 0); |

493 |
V201_zz169 = (0 -> (pre V202_zz170)); |

494 |
V202_zz170 = (if (V198_zz166 <= 20) then V198_zz166 else 20); |

495 |
V203_zz171 = (V202_zz170 = 20); |

496 |
V204_zz172 = (if (0 >= V206_zz174) then 0 else V206_zz174); |

497 |
V205_zz173 = (V207_zz175 + 1); |

498 |
V206_zz174 = (if decelSet then V205_zz173 else 0); |

499 |
V207_zz175 = (0 -> (pre V208_zz176)); |

500 |
V208_zz176 = (if (V204_zz172 <= 20) then V204_zz172 else 20); |

501 |
V209_zz177 = (V208_zz176 = 20); |

502 |
V211_zz179 = (true -> (pre accelResume)); |

503 |
V212_zz180 = ((not V211_zz179) and accelResume); |

504 |
V213_zz181 = (carGear = 3); |

505 |
V214_zz182 = (carSpeed >= 1.500000E+01); |

506 |
V216_zz184 = (true -> (pre decelSet)); |

507 |
V217_zz185 = ((not V216_zz184) and decelSet); |

508 |
V218_zz186 = (((((not cancel) and (not brakePedal)) and V213_zz181) and |

509 |
V214_zz182) and validInputs); |

510 |
V219_zz187 = (V236_zz204 = 0.000000E+00); |

511 |
V220_zz188 = (V222_zz190 <> 1.000000E+02); |

512 |
V221_zz189 = (false -> (pre V249_zz217)); |

513 |
V222_zz190 = (if (V253_zz221 < 0.000000E+00) then 0.000000E+00 else (if ( |

514 |
V253_zz221 > 1.000000E+02) then 1.000000E+02 else V253_zz221)); |

515 |
V223_zz191 = (V221_zz189 and V220_zz188); |

516 |
V224_zz192 = (V243_zz211 > V222_zz190); |

517 |
V225_zz193 = (V222_zz190 <> 0.000000E+00); |

518 |
V226_zz194 = (V222_zz190 >= 1.500000E+01); |

519 |
V227_zz195 = (V222_zz190 = 0.000000E+00); |

520 |
V228_zz196 = (V11_mode = 2); |

521 |
V229_zz197 = (V11_mode = 1); |

522 |
V230_zz198 = (V229_zz197 or V228_zz196); |

523 |
V231_zz199 = ((if (V194_zz162 = false) then 0.000000E+00 else 1.000000E+00) = |

524 |
1.000000E+00); |

525 |
V232_zz200 = (V255_zz223 = 0.000000E+00); |

526 |
V233_zz201 = ((V241_zz209 or V248_zz216) or V249_zz217); |

527 |
V234_zz202 = (V11_mode = 3); |

528 |
V235_zz203 = (V233_zz201 or V234_zz202); |

529 |
V236_zz204 = (if V233_zz201 then V258_zz226 else 0.000000E+00); |

530 |
V237_zz205 = (0.000000E+00 -> (pre V236_zz204)); |

531 |
V238_zz206 = (V237_zz205 = V236_zz204); |

532 |
V239_zz207 = (V243_zz211 <= V222_zz190); |

533 |
V240_zz208 = (V243_zz211 >= V222_zz190); |

534 |
V241_zz209 = (V11_mode = 4); |

535 |
V242_zz210 = (false -> (pre V241_zz209)); |

536 |
V243_zz211 = (0.000000E+00 -> (pre V222_zz190)); |

537 |
V244_zz212 = (V243_zz211 = V222_zz190); |

538 |
V245_zz213 = (false -> (pre V248_zz216)); |

539 |
V246_zz214 = (V245_zz213 and V225_zz193); |

540 |
V247_zz215 = (V243_zz211 < V222_zz190); |

541 |
V248_zz216 = (V11_mode = 5); |

542 |
V249_zz217 = (V11_mode = 6); |

543 |
V250_zz218 = (if V248_zz216 then V38_zz5 else V252_zz220); |

544 |
V251_zz219 = (if V234_zz202 then V254_zz222 else 0.000000E+00); |

545 |
V252_zz220 = (if V241_zz209 then V254_zz222 else V251_zz219); |

546 |
V253_zz221 = (if V194_zz162 then carSpeed else V255_zz223); |

547 |
V254_zz222 = (0.000000E+00 -> (pre V222_zz190)); |

548 |
V255_zz223 = (if V249_zz217 then V35_zz2 else V250_zz218); |

549 |
V256_zz224 = (0.000000E+00 -> (pre V236_zz204)); |

550 |
V257_zz225 = (V262_zz230 + V256_zz224); |

551 |
V258_zz226 = (if (V257_zz225 < 0.000000E+00) then 0.000000E+00 else (if ( |

552 |
V257_zz225 > 1.000000E+02) then 1.000000E+02 else V257_zz225)); |

553 |
V259_zz227 = (V222_zz190 - carSpeed); |

554 |
V260_zz228 = (V259_zz227 * 1.000000E+00); |

555 |
V261_zz229 = (if (V260_zz228 < -1.000000E+01) then -1.000000E+01 else (if ( |

556 |
V260_zz228 > 1.000000E+01) then 1.000000E+01 else V260_zz228)); |

557 |
V262_zz230 = (V261_zz229 / 2.000000E+01); |

558 |
V263_zz231 = (V236_zz204 <= 1.000000E+02); |

559 |
V264_zz232 = (V236_zz204 >= 0.000000E+00); |

560 |
V265_zz233 = (V222_zz190 <= 1.000000E+02); |

561 |
V266_zz234 = (V222_zz190 >= 0.000000E+00); |

562 |
V267_zz235 = (V222_zz190 < 0.000000E+00); |

563 |
V268_zz236 = (V222_zz190 > 0.000000E+00); |

564 |
V269_zz237 = (V268_zz236 and V267_zz235); |

565 |
V270_zz238 = (V222_zz190 = V243_zz211); |

566 |
V271_zz239 = (V222_zz190 = carSpeed); |

567 |
tel |

568 |