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Revision 090baab6 src/backends/VHDL/vhdl_ast.ml

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src/backends/VHDL/vhdl_ast.ml
15 15
  | Natural -> Format.fprintf fmt "natural"
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  | Positive -> Format.fprintf fmt "positive"
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  | Real -> Format.fprintf fmt "real"
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  | Range(n,m,base) -> Format.fprintf fmt "%trange %i to %i" (fun fmt -> match base with Some s -> Format.fprintf fmt "%s " s ) n m
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  | Range(base, n, m) -> Format.fprintf fmt "%trange %i to %i" (fun fmt -> match base with Some s -> Format.fprintf fmt "%s " s | None -> ()) n m
19 19
  | Byte -> Format.fprintf fmt "byte"
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  | Bit_vector (n,m) -> Format.fprintf fmt "bit_vector(%i downto %i)" n m
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  | Enumerated sl -> Format.fprintf fmt "(%a)" (Utils.fprintf_list ~sep:", " Format.pp_print_string) sl
22 22

  
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type vhdl_definition_t =
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  | Type of {name : string ; definition: vhdl_type_t}
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  | Subtype of {name : string ; definition: vhdl_type_t}
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let pp_vhdl_definition fmt def =
......
146 147
let pp_type_attribute pp_val fmt tatt =
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  match tatt with
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  | TAttNoArg a -> Format.fprintf fmt "'%s" a.id
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  | TAttINtArg a -> Format.fprintf fmt "'%s(%i)" a.id a.arg
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  | TAttIntArg a -> Format.fprintf fmt "'%s(%i)" a.id a.arg
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  | TAttValArg a -> Format.fprintf fmt "'%s(%a)" a.id pp_val a.arg
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  | TAttStringArg a -> Format.fprintf fmt "'%s(%s)" a.id a.arg
152 153

  
......
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let array_att_intarg = ["left"; "right"; "high"; "low"; "range"; "reverse_range"; "length"]  
159 160

  
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type vhdl_signal_attributes_t = SigAtt of string
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let pp_signal_attribute fnt sa = match sa with
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let pp_signal_attribute fmt sa = match sa with
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  | SigAtt s -> Format.fprintf fmt "'%s" s
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let signal_att = [ "event"; "stable"; "last_value" ]
164 165

  
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type vhdl_string_attributes_t = StringAtt of string
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let pp_signal_attribute fnt sa = match sa with
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let pp_signal_attribute fmt sa = match sa with
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  | StringAtt s -> Format.fprintf fmt "'%s" s
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let signal_att = [ "simple_name"; "path_name"; "instance_name" ]
169 170

  
......
181 182
			   
182 183

  
183 184

  
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type vhdl_sequential_stmt_t =
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  | VarAssign of { lhs: string; rhs: vhdl_expr_t }
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type vhdl_sequential_stmt_t = unit 
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(*  | VarAssign of { lhs: string; rhs: vhdl_expr_t }
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  | Case of { guard: vhdl_expr_t; branches: { case: }
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	    | Case of { guard: vhdl_expr_t; branches 
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 *)
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type vhdl_concurrent_stmt_t =
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  | SigAssign of { lhs: string; rhs: vhdl_expr_t }
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  | Process of { active_sigs: string list; body: vhdl_sequential_t list }
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  | Process of { active_sigs: string list; body: vhdl_sequential_stmt_t list }
192 193
  
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type vhdl_statement_t =
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......
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  | SequentialStmt of vhdl_sequential_stmt_t
198 199
			
199 200

  
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let rec pp_vhdl_statement fmt stmt =
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  match stmt with
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let rec pp_vhdl_statement fmt stmt = ()
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(*  match stmt with
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  | VarAssign va -> Format.fprintf fmt "%s := %a;" va.lhs pp_vhdl_expr va.rhs
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  | SigAssign va -> Format.fprintf fmt "%s <= %a;" va.lhs pp_vhdl_expr va.rhs
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  | Process p ->
......
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	    (Utils.fprintf_list ~sep:",@ " Format.pp_print_string) asigs)
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       p.active_sigs
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       (Utils.fprintf_list ~sep:"@ " pp_vhdl_statement) p.body
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 *)     
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type vhdl_architecture_t =
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  {

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