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Revision ec031ed0

Added by Arnaud Dieumegard almost 6 years ago

Added support for declarative items

View differences:

src/backends/VHDL/vhdl_ast.ml
36 36
  | Base of string
37 37
  | Range of string option * int * int
38 38
  | Bit_vector of int * int
39
  | Array of { indexes: vhdl_name_t list; const: vhdl_constraint_t option [@default None]; definition: vhdl_subtype_indication_t } [@name "ARRAY_TYPE_DEFINITION"]
39
  | Array of { indexes: vhdl_name_t list [@default []]; const: vhdl_constraint_t option [@default None]; definition: vhdl_subtype_indication_t } [@name "ARRAY_TYPE_DEFINITION"]
40 40
  | Record of vhdl_element_declaration_t list [@name "RECORD_TYPE_DEFINITION"]
41 41
  | Enumerated of vhdl_name_t list [@name "ENUMERATION_TYPE_DEFINITION"]
42 42
  | Void
......
231 231
    } [@name "SUBPROGRAM_BODY"]
232 232
[@@deriving show { with_path = false }, yojson {strict = false}];;
233 233

  
234
type vhdl_load_t = 
235
    Library of vhdl_name_t list [@name "LIBRARY_CLAUSE"] [@default []]
236
  | Use of vhdl_name_t list [@name "USE_CLAUSE"] [@default []]
237
[@@deriving show { with_path = false }, yojson];;
238

  
239
type vhdl_declarative_item_t =
240
  {
241
    use_clause: vhdl_load_t option [@default None];
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    declaration: vhdl_declaration_t option [@default None];
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    definition: vhdl_definition_t option [@default None];
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  }
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[@@deriving show { with_path = false }, yojson {strict = false}];;
246

  
234 247
type vhdl_signal_condition_t =
235 248
  {                            
236 249
    expr: vhdl_expr_t list;              (* when expression *)
......
260 273
type vhdl_process_t =
261 274
  { 
262 275
    id: vhdl_name_t [@default NoName];
263
    declarations: vhdl_declaration_t list option [@key "PROCESS_DECLARATIVE_PART"] [@default Some []];
276
    declarations: vhdl_declarative_item_t list [@key "PROCESS_DECLARATIVE_PART"] [@default []];
264 277
    active_sigs: vhdl_name_t list [@default []];
265 278
    body: vhdl_sequential_stmt_t list [@key "PROCESS_STATEMENT_PART"] [@default []]
266 279
  }
......
328 341
  }
329 342
[@@deriving show { with_path = false }, yojson {strict = false}];;
330 343

  
331
type vhdl_load_t = 
332
    Library of vhdl_name_t list [@name "LIBRARY_CLAUSE"] [@default []]
333
  | Use of vhdl_name_t list [@name "USE_CLAUSE"] [@default []]
334
[@@deriving show { with_path = false }, yojson];;
335

  
336 344
(************************************************************************************)		   
337 345
(*                        Architecture / VHDL Design                                *)
338 346
(************************************************************************************)		   
......
341 349
  {
342 350
    name: vhdl_name_t [@default NoName];
343 351
    entity: vhdl_name_t [@default NoName];
344
    use_clauses: vhdl_load_t list [@default []];
345
    declarations: vhdl_declaration_t list [@key "ARCHITECTURE_DECLARATIVE_PART"] [@default []];
352
    declarations: vhdl_declarative_item_t list [@key "ARCHITECTURE_DECLARATIVE_PART"] [@default []];
346 353
    body: vhdl_concurrent_stmt_t list [@key "ARCHITECTURE_STATEMENT_PART"] [@default []]; 
347 354
  }
348 355
[@@deriving show { with_path = false }, yojson {strict = false}];;

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