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open Vhdl_ast
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type mini_vhdl_sequential_stmt_t =
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| MiniVarAssign of {
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label: vhdl_name_t option;
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lhs: vhdl_name_t;
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rhs: vhdl_expr_t }
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| MiniSigSeqAssign of {
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label: vhdl_name_t option;
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lhs: vhdl_name_t;
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rhs: vhdl_waveform_element_t list}
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| MiniSigCondAssign of {
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label: vhdl_name_t option;
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lhs: vhdl_name_t;
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rhs: vhdl_signal_condition_t list;
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delay: vhdl_expr_t option}
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| MiniSigSelectAssign of {
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label: vhdl_name_t option;
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lhs: vhdl_name_t;
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sel: vhdl_expr_t;
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branches: vhdl_signal_selection_t list;
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delay: vhdl_expr_t option}
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| MiniIf of {
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label: vhdl_name_t option;
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if_cases: mini_vhdl_if_case_t list;
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default: mini_vhdl_sequential_stmt_t list}
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| MiniCase of {
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label: vhdl_name_t option;
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guard: vhdl_expr_t;
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branches: mini_vhdl_case_item_t list }
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| MiniExit of {
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label: vhdl_name_t option;
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loop_label: string option;
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condition: vhdl_expr_t option}
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| MiniAssert of {
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label: vhdl_name_t option;
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cond: vhdl_expr_t;
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report: vhdl_expr_t;
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severity: vhdl_expr_t}
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| MiniProcedureCall of {
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label: vhdl_name_t option;
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name: vhdl_name_t;
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assocs: vhdl_assoc_element_t list }
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| MiniWait
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| MiniNull of {
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label: vhdl_name_t option}
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| MiniReturn of {
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label: vhdl_name_t option;
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expr: vhdl_expr_t option}
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and mini_vhdl_if_case_t =
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{
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if_cond: vhdl_expr_t;
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if_block_mini: mini_vhdl_sequential_stmt_t list;
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}
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and mini_vhdl_case_item_t =
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{
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when_cond: vhdl_expr_t list;
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when_stmt_mini: mini_vhdl_sequential_stmt_t list;
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}
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and mini_vhdl_declaration_t =
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| MiniVarDecl of {
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names : vhdl_name_t list;
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typ : vhdl_subtype_indication_t;
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init_val : vhdl_expr_t
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}
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| MiniCstDecl of {
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names : vhdl_name_t list;
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typ : vhdl_subtype_indication_t;
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init_val : vhdl_expr_t
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}
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| MiniSigDecl of {
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names : vhdl_name_t list;
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typ : vhdl_subtype_indication_t;
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init_val : vhdl_expr_t
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}
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| MiniComponentDecl of {
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name: vhdl_name_t;
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generics: vhdl_port_t list;
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ports: vhdl_port_t list;
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}
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| MiniSubprogram of {
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spec: vhdl_subprogram_spec_t;
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decl_part: mini_vhdl_declaration_t list;
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stmts: mini_vhdl_sequential_stmt_t list
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}
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and mini_vhdl_declarative_item_t =
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{
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use_clause: vhdl_load_t option;
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declaration: mini_vhdl_declaration_t option;
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definition: vhdl_definition_t option;
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}
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and mini_vhdl_component_instantiation_t =
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{
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ci_name: vhdl_name_t;
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archi: vhdl_architecture_t;
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entity: vhdl_entity_t;
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generic_map: vhdl_assoc_element_t list;
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port_map: vhdl_assoc_element_t list;
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}
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and mini_vhdl_process_t =
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{
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id: vhdl_name_t;
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p_declarations: mini_vhdl_declarative_item_t list;
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active_sigs: vhdl_name_t list;
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p_body: mini_vhdl_sequential_stmt_t list;
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postponed: bool;
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label: vhdl_name_t option
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}
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and mini_vhdl_concurrent_stmt_t =
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| MiniProcess of mini_vhdl_process_t
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| MiniComponentInst of mini_vhdl_component_instantiation_t
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and mini_vhdl_package_t =
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{
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p_name: vhdl_name_t;
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shared_defs: vhdl_definition_t list;
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shared_decls: mini_vhdl_declaration_t list;
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shared_uses: vhdl_load_t list;
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}
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and mini_vhdl_component_t =
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{
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names: vhdl_name_t list;
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generics: vhdl_port_t list; (* From related 'entity' *)
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ports: vhdl_port_t list; (* From related 'entity' *)
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contexts: vhdl_load_t list; (* Related 'declarations' contexts + relatated entity contexts *)
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c_declarations: mini_vhdl_declaration_t list; (* From inlined 'declarations' + entity.declaration *)
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definitions: vhdl_definition_t list; (* From inlined 'declarations' + entity.declaration *)
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c_body: mini_vhdl_concurrent_stmt_t list; (* + entity.stmts *)
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}
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and mini_vhdl_design_file_t =
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{
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components: mini_vhdl_component_t list;
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packages: mini_vhdl_package_t list;
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}
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(*[@@deriving show { with_path = false }]*)
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[@@deriving visitors { variety = "iter"; name = "mini_vhdl_iter"; ancestors = ["vhdl_iter"]; polymorphic = true }]
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