Project

General

Profile

« Previous | Next » 

Revision ca7ff3f7

Added by LĂ©lio Brun 7 months ago

reformatting

View differences:

src/tools/importer/main_lustre_importer.ml
1 1
(* An application that loads json provided input and produces Lustre
2 2

  
3
Usage:
4
lustrei -vhdl myvhdl.json 
5
lustrei -scade myscademodel.json 
6
  will produce a lustre file that can be compiled and analyzed
3
   Usage: lustrei -vhdl myvhdl.json lustrei -scade myscademodel.json will
4
   produce a lustre file that can be compiled and analyzed
7 5

  
8
VHDL is handled in a double way: as a backend and as an import language
9
In a first step, lustrei -vhdl -print myvhdl.json shall print the VHDL model in stdout
10

  
11
 *)
12
(*
13
open Vhdl_ast
14
open Vhdl_test
15
  *)
6
   VHDL is handled in a double way: as a backend and as an import language In a
7
   first step, lustrei -vhdl -print myvhdl.json shall print the VHDL model in
8
   stdout *)
9
(* open Vhdl_ast open Vhdl_test *)
16 10
open Yojson.Safe
17 11
open Vhdl_deriving_yojson
18 12
open Vhdl_json_lib
19 13

  
20 14
let () =
21
(*
22
  (* Load model with Yojson *)
23
  let json = xx in
24

  
25
  (* Create VHDL values *)
26
  let vhdl : vhdl_design_t = xxxx json in
15
  (* (* Load model with Yojson *) let json = xx in
27 16

  
28
  (* Printing result *)
29
  Format.printf "Loaded VHDL:@.%a@." pp_vhdl_design vhdl
30
 *)
17
     (* Create VHDL values *) let vhdl : vhdl_design_t = xxxx json in
31 18

  
19
     (* Printing result *) Format.printf "Loaded VHDL:@.%a@." pp_vhdl_design
20
     vhdl *)
32 21
  let vhdl_json = from_file Sys.argv.(1) in
33 22
  Format.printf "Original file:\n%s\n\n" (pretty_to_string vhdl_json);
34 23

  
35
  (*let vhdl = design1 in
36
  Format.printf "Loaded VHDL:@.%a@." pp_vhdl_design vhdl;*)
37

  
38
  let vhdl1_json = vhdl_json |> 
39
                   prune_str "TOKEN" |>
40
                   prune_str "IDENTIFIER" |>
41
                   prune_str "SUBTYPE_INDICATION" |>
42
                   prune_null_assoc |>
43
                   to_list_content_str "DESIGN_UNIT" |>
44
                   to_list_content_str "INTERFACE_VARIABLE_DECLARATION" |>
45
                   flatten_ivd |>
46
                   flatten_numeric_literal |>
47
                   to_list_str "ENTITY_DECLARATION" |>
48
                   to_list_str "ARCHITECTURE_BODY" |>
49
                   to_list_str "PACKAGE_DECLARATION" in
24
  (*let vhdl = design1 in Format.printf "Loaded VHDL:@.%a@." pp_vhdl_design
25
    vhdl;*)
26
  let vhdl1_json =
27
    vhdl_json |> prune_str "TOKEN" |> prune_str "IDENTIFIER"
28
    |> prune_str "SUBTYPE_INDICATION"
29
    |> prune_null_assoc
30
    |> to_list_content_str "DESIGN_UNIT"
31
    |> to_list_content_str "INTERFACE_VARIABLE_DECLARATION"
32
    |> flatten_ivd |> flatten_numeric_literal
33
    |> to_list_str "ENTITY_DECLARATION"
34
    |> to_list_str "ARCHITECTURE_BODY"
35
    |> to_list_str "PACKAGE_DECLARATION"
36
  in
50 37
  Format.printf "Preprocessed json:\n";
51 38
  Format.printf "%s\n\n" (pretty_to_string vhdl1_json);
52
(*  List.iter (Format.printf "%s\n") (print_depth vhdl1_json 7 ""); *)
53

  
54
  to_file (Sys.argv.(1)^".out.json") vhdl1_json;
55 39

  
56
(*
57
  let typ = {name = "type"; definition = (Some (Range (Some "toto", 7, 0)))} in
58
  Format.printf "\nModel to string\n%s\n\n" (pretty_to_string (vhdl_subtype_indication_t_to_yojson typ));
40
  (* List.iter (Format.printf "%s\n") (print_depth vhdl1_json 7 ""); *)
41
  to_file (Sys.argv.(1) ^ ".out.json") vhdl1_json;
59 42

  
60
  let elem = "[\"SUBTYPE_DECLARATION\", {\"name\": \"byte\", \"typ\": { \"name\": \"bit_vector\", \"definition\": [ \"RANGE_WITH_DIRECTION\", \"downto\", 7, 0 ]}}]" in
61
  match vhdl_definition_t_of_yojson (from_string elem) with
62
    Ok x -> Format.printf "\nString to string\n%s\n\n" (pretty_to_string (vhdl_definition_t_to_yojson x));
63
  | Error e -> Format.printf "Error: %s\n" e;
64
*)
43
  (* let typ = {name = "type"; definition = (Some (Range (Some "toto", 7, 0)))}
44
     in Format.printf "\nModel to string\n%s\n\n" (pretty_to_string
45
     (vhdl_subtype_indication_t_to_yojson typ));
65 46

  
47
     let elem = "[\"SUBTYPE_DECLARATION\", {\"name\": \"byte\", \"typ\": {
48
     \"name\": \"bit_vector\", \"definition\": [ \"RANGE_WITH_DIRECTION\",
49
     \"downto\", 7, 0 ]}}]" in match vhdl_definition_t_of_yojson (from_string
50
     elem) with Ok x -> Format.printf "\nString to string\n%s\n\n"
51
     (pretty_to_string (vhdl_definition_t_to_yojson x)); | Error e ->
52
     Format.printf "Error: %s\n" e; *)
66 53
  match vhdl_file_t_of_yojson vhdl1_json with
67
    Ok x -> Format.printf "Parsed VHDL: \n%s\n" (pretty_to_string (vhdl_file_t_to_yojson x))
68
  | Error e -> Format.printf "Error: %s\n" e;
54
  | Ok x ->
55
    Format.printf "Parsed VHDL: \n%s\n"
56
      (pretty_to_string (vhdl_file_t_to_yojson x))
57
  | Error e ->
58
    Format.printf "Error: %s\n" e

Also available in: Unified diff