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Revision b0c77300

Added by Arnaud Dieumegard over 3 years ago

PP update: component instantiation type, archi format, port & generic decl in components, signal conditions, return statements expression

View differences:

src/tools/importer/vhdl_to_lustre.ml
348 348
        | Wait  -> Wait
349 349
        | Null { label } ->
350 350
            let label = self#vhdl_name_t label  in Null { label }
351
        | Return { label } ->
352
            let label = self#vhdl_name_t label  in Return { label }
351
        | Return { label; expr } ->
352
            let label = self#option self#vhdl_name_t label  in
353
            let expr = self#option self#vhdl_expr_t expr in
354
            Return { label; expr }
353 355
    method vhdl_if_case_t : vhdl_if_case_t -> vhdl_if_case_t=
354 356
      fun { if_cond; if_block }  ->
355 357
        let if_cond = self#vhdl_expr_t if_cond  in
......
451 453

  
452 454
    method vhdl_component_instantiation_t :
453 455
      vhdl_component_instantiation_t -> vhdl_component_instantiation_t=
454
      fun { name; inst_unit; archi_name; generic_map; port_map }  ->
456
        fun { name; inst_unit; inst_unit_type; archi_name; generic_map; port_map }  ->
455 457
        let name = self#vhdl_name_t name  in
456 458
        let inst_unit = self#vhdl_name_t inst_unit  in
459
        let inst_unit_type = self#string inst_unit_type  in
457 460
        let archi_name = self#option self#vhdl_name_t archi_name  in
458 461
        let generic_map = self#list self#vhdl_assoc_element_t generic_map  in
459 462
        let port_map = self#list self#vhdl_assoc_element_t port_map  in
460
        { name; inst_unit; archi_name; generic_map; port_map }
463
        { name; inst_unit; inst_unit_type; archi_name; generic_map; port_map }
461 464

  
462 465
    method vhdl_concurrent_stmt_t :
463 466
      vhdl_concurrent_stmt_t -> vhdl_concurrent_stmt_t=

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