Project

General

Profile

« Previous | Next » 

Revision 96cb9cf2

Added by Arnaud Dieumegard over 3 years ago

Added MiniVHDL versions of component instantiation and concurretn statement

View differences:

src/backends/VHDL/mini_vhdl_ast.ml
1 1
open Vhdl_ast
2
				       
2
open Vhdl_ast_eq
3

  
4
type mini_vhdl_component_instantiation_t =
5
  {
6
    name: vhdl_name_t;
7
    archi: vhdl_architecture_t;
8
    entity: vhdl_entity_t;
9
    generic_map: vhdl_assoc_element_t list [@default []];
10
    port_map: vhdl_assoc_element_t list [@default []];
11
  }
12
[@@deriving show { with_path = false }];;
13

  
14
type mini_vhdl_concurrent_stmt_t =
15
  | SigAssign of vhdl_conditional_signal_t [@name "CONDITIONAL_SIGNAL_ASSIGNMENT"]
16
  | Process of vhdl_process_t [@name "PROCESS_STATEMENT"]
17
  | SelectedSig of vhdl_selected_signal_t [@name "SELECTED_SIGNAL_ASSIGNMENT"]
18
  | ComponentInst of mini_vhdl_component_instantiation_t [@name "COMPONENT_INSTANTIATION_STATEMENT"]
19
[@@deriving show { with_path = false }];;
20

  
3 21
type mini_vhdl_component_t =
4 22
  {
5 23
    names: vhdl_name_t list [@default NoName];
......
8 26
    contexts: vhdl_load_t list [@default []]; (* Related 'declarations' contexts + relatated entity contexts *)
9 27
    declarations: vhdl_declaration_t list [@default []]; (* From inlined 'declarations' + entity.declaration *)
10 28
    definitions: vhdl_definition_t list [@default []]; (* From inlined 'declarations' + entity.declaration *)
11
    body: vhdl_concurrent_stmt_t list [@key "ARCHITECTURE_STATEMENT_PART"] [@default []]; (* + entity.stmts *)
29
    body: mini_vhdl_concurrent_stmt_t list [@key "ARCHITECTURE_STATEMENT_PART"] [@default []]; (* + entity.stmts *)
12 30
  }
13
[@@deriving show { with_path = false }, yojson {strict = false}];;
31
[@@deriving show { with_path = false }];;
14 32

  
15 33
type mini_vhdl_design_file_t = 
16 34
  {
17 35
    components: mini_vhdl_component_t list [@default []];
18 36
    packages: vhdl_package_t list [@default []];
19 37
  }
20
[@@deriving show { with_path = false }, yojson];;
38
[@@deriving show { with_path = false }];;
src/backends/VHDL/mini_vhdl_ast_pp.ml
2 2
open Vhdl_ast
3 3
open Vhdl_ast_pp
4 4

  
5
let rec pp_mini_vhdl_component_instantiation_t :
6
  Format.formatter ->
7
    mini_vhdl_component_instantiation_t -> Ppx_deriving_runtime.unit
8
  =
9
  let __4 () = pp_vhdl_assoc_element_t
10
  
11
  and __3 () = pp_vhdl_assoc_element_t
12
  
13
  and __2 () = pp_vhdl_entity_t
14
  
15
  and __1 () = pp_vhdl_architecture_t
16
  
17
  and __0 () = pp_vhdl_name_t
18
   in
19
  ((let open! Ppx_deriving_runtime in
20
      fun fmt  ->
21
        fun x  ->
22
          Format.fprintf fmt "@[<v 2>";
23
          ((__0 ()) fmt) x.name;
24
          Format.fprintf fmt "__";
25
          ((__0 ()) fmt) x.archi.name;
26
          Format.fprintf fmt "__";
27
          ((__0 ()) fmt) x.entity.name;
28
          (match x.generic_map with
29
          | [] -> Format.fprintf fmt "";
30
          | _ ->
31
            (Format.fprintf fmt " generic map (@[<v 2>";
32
            ((fun x  ->
33
            ignore
34
            (List.fold_left
35
               (fun sep  ->
36
                 fun x  ->
37
                   if sep then Format.fprintf fmt ",@,";
38
                   ((__3 ()) fmt) x;
39
                   true) false x))) x.generic_map;
40
            Format.fprintf fmt ")@]@;"));
41
          (match x.port_map with
42
          | [] -> Format.fprintf fmt ";";
43
          | _ ->
44
            (Format.fprintf fmt " port map (@[<v 2>";
45
            ((fun x  ->
46
            ignore
47
            (List.fold_left
48
               (fun sep  ->
49
                 fun x  ->
50
                   if sep then Format.fprintf fmt ",@,";
51
                   ((__4 ()) fmt) x;
52
                   true) false x))) x.port_map;
53
            Format.fprintf fmt ")@];"));
54
          Format.fprintf fmt "@]")
55
    [@ocaml.warning "-A"])
56

  
57
and show_mini_vhdl_component_instantiation_t :
58
  mini_vhdl_component_instantiation_t -> Ppx_deriving_runtime.string =
59
  fun x  -> Format.asprintf "%a" pp_mini_vhdl_component_instantiation_t x
60

  
61
let rec pp_mini_vhdl_concurrent_stmt_t :
62
  Format.formatter ->
63
    mini_vhdl_concurrent_stmt_t -> Ppx_deriving_runtime.unit
64
  =
65
  let __3 () = pp_mini_vhdl_component_instantiation_t
66
  
67
  and __2 () = pp_vhdl_selected_signal_t
68
  
69
  and __1 () = pp_vhdl_process_t
70
  
71
  and __0 () = pp_vhdl_conditional_signal_t
72
   in
73
  ((let open! Ppx_deriving_runtime in
74
      fun fmt  ->
75
        function
76
        | SigAssign a0 ->
77
             ((__0 ()) fmt) a0;
78
        | Process a0 ->
79
             ((__1 ()) fmt) a0;
80
        | SelectedSig a0 ->
81
             ((__2 ()) fmt) a0;
82
        | ComponentInst a0 ->
83
             ((__3 ()) fmt) a0;
84
    )
85
    [@ocaml.warning "-A"])
86

  
87
and show_mini_vhdl_concurrent_stmt_t :
88
  mini_vhdl_concurrent_stmt_t -> Ppx_deriving_runtime.string =
89
  fun x  -> Format.asprintf "%a" pp_mini_vhdl_concurrent_stmt_t x
90

  
5 91
let rec pp_mini_vhdl_component_t :
6 92
  Format.formatter -> mini_vhdl_component_t -> Ppx_deriving_runtime.unit =
7
  let __6 () = pp_vhdl_concurrent_stmt_t
93
  let __6 () = pp_mini_vhdl_concurrent_stmt_t
8 94
  
9 95
  and __5 () = pp_vhdl_definition_t
10 96
  

Also available in: Unified diff