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open Vhdl_ast

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open Vhdl_ast_pp

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open Mini_vhdl_ast

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open Vhdl_2_mini_vhdl_map

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open Lustre_types

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open Utils

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class virtual mini_vhdl_to_lustre_map =

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object (self)

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method virtual list : 'a . ('a > 'a) > 'a list > 'a list

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method virtual option : 'a . ('a > 'a) > 'a option > 'a option

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method virtual string : string > string

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method virtual int : int > int

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(*

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* Lustre structure constructors

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*)

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method lustre_mk_var_decl : vhdl_port_mode_t > vhdl_name_t list > vhdl_subtype_indication_t > var_decl list=

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fun mode > fun names > fun typ >

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let var_id_list = List.map show_vhdl_name_t names in

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let var_orig = match mode with InPort > true  _ > false in

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let var_dec_type = self#vhdl_subtype_indication_t_type_dec typ in

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let var_dec_clock = {ck_dec_desc = Ckdec_any; ck_dec_loc = Location.dummy_loc } in

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let var_dec_const = false in

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let var_dec_value = None in

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let var_parent_nodeid = None in

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let var_type = self#vhdl_subtype_indication_t typ in

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let var_clock = Clocks.new_ck Cvar false in

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let var_loc = Location.dummy_loc in

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List.map (fun var_id > {var_id;var_orig;var_dec_type;var_dec_clock;var_dec_const;

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var_dec_value;var_parent_nodeid;var_type;var_clock;var_loc}) var_id_list

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method lustre_mk_node : vhdl_name_t list > var_decl list > vhdl_port_t list > mini_vhdl_concurrent_stmt_t list > top_decl_desc=

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fun names > fun node_locals > fun ports > fun c_stmts >

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let node_id = String.concat "__" (List.map show_vhdl_name_t names) in

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let node_type = Types.new_var () in

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let node_clock = Clocks.new_ck Cvar false in

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let in_ports = Mini_vhdl_utils.get_ports ports InPort in

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let inports_names = List.map Mini_vhdl_utils.get_names in_ports in

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let inports_types = List.map (fun x > x.port_typ) in_ports in

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let node_inputs = List.flatten (List.map2 (self#lustre_mk_var_decl InPort) inports_names inports_types) in

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let out_ports = Mini_vhdl_utils.get_ports ports OutPort in

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let outports_names = List.map Mini_vhdl_utils.get_names out_ports in

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let outports_types = List.map (fun x > x.port_typ) out_ports in

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let node_outputs = List.flatten (List.map2 (self#lustre_mk_var_decl OutPort) outports_names outports_types) in

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(* TODO: deal with inout ports *)

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let body = List.map self#mini_vhdl_concurrent_stmt_t c_stmts in

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Node { node_id; node_type; node_clock;

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node_inputs; node_outputs; node_locals;

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node_gencalls = []; node_checks = []; node_asserts = [];

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node_stmts = body; node_dec_stateless = false; node_stateless = None;

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node_spec = None; node_annot = [] }

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(*

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* Mini_vhdl to lustre tranformation

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*)

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method vhdl_port_t : vhdl_port_t > vhdl_port_t= fun x > x

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method vhdl_type_t : vhdl_type_t > vhdl_type_t=

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fun x >

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match x with

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 Base a > let a = self#string a in Base a

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 Range (a,b,c) >

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let a = self#option self#string a in

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let b = self#int b in let c = self#int c in Range (a, b, c)

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 Bit_vector (a,b) >

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let a = self#int a in let b = self#int b in Bit_vector (a, b)

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 Array { indexes; const; definition } >

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let indexes = indexes in

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let const = self#option self#vhdl_constraint_t const in

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(*let definition = self#vhdl_subtype_indication_t definition in*)

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Array { indexes; const; definition }

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 Record a >

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let a = self#list self#vhdl_element_declaration_t a in Record a

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 Enumerated a >

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(*let a = self#list self#vhdl_name_t a in *)

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Enumerated a

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 Void > Void

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method vhdl_element_declaration_t :

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vhdl_element_declaration_t > vhdl_element_declaration_t=

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fun { ed_names; definition } >

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(*let names = self#list self#vhdl_name_t names in

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let definition = self#vhdl_subtype_indication_t definition in*)

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{ ed_names; definition }

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method vhdl_subtype_indication_t :

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vhdl_subtype_indication_t > Types.type_expr=

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fun { si_name; functionName; const } >

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let si_name = self#vhdl_name_t si_name in

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(*let functionName = self#vhdl_name_t functionName in

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let const = self#vhdl_constraint_t const in*)

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let desc = match si_name with

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 "integer" > Types.Tbasic (Tint)

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 "boolean" > Types.Tbasic (Tbool)

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 _ > Tconst (si_name) in

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Types.new_ty desc;

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method vhdl_subtype_indication_t_type_dec :

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vhdl_subtype_indication_t > type_dec=

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fun { si_name; functionName; const } >

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let si_name = self#vhdl_name_t si_name in

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(*let functionName = self#vhdl_name_t functionName in

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let const = self#vhdl_constraint_t const in*)

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{ty_dec_desc = Tydec_const si_name;

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ty_dec_loc = Location.dummy_loc }

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method vhdl_discrete_range_t :

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vhdl_discrete_range_t > vhdl_discrete_range_t=

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fun x >

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match x with

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 SubDiscreteRange a >

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(*let a = self#vhdl_subtype_indication_t a in *)

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SubDiscreteRange a

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 NamedRange a >

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(*let a = self#vhdl_name_t a in *)

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NamedRange a

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 DirectedRange { direction; from; _to } >

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let direction = self#string direction in

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let from = self#vhdl_expr_t from in

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let _to = self#vhdl_expr_t _to in

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DirectedRange { direction; from; _to }

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method vhdl_constraint_t : vhdl_constraint_t > vhdl_constraint_t=

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fun x >

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x

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(* match x with

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 RefConstraint { ref_name } >

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let ref_name = self#vhdl_name_t ref_name in

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RefConstraint { ref_name }

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 RangeConstraint { range } >

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let range = self#vhdl_discrete_range_t range in

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RangeConstraint { range }

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 IndexConstraint { ranges } >

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let ranges = self#list self#vhdl_discrete_range_t ranges in

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IndexConstraint { ranges }

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 ArrayConstraint { ranges; sub } >

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let ranges = self#list self#vhdl_discrete_range_t ranges in

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let sub = self#vhdl_constraint_t sub in

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ArrayConstraint { ranges; sub }

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 RecordConstraint > RecordConstraint

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 NoConstraint > NoConstraint*)

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method vhdl_definition_t : vhdl_definition_t > vhdl_definition_t=

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fun x >

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x

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(* match x with

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 Type { name; definition } >

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let name = self#vhdl_name_t name in

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let definition = self#vhdl_type_t definition in

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Type { name; definition }

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 Subtype { name; typ } >

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let name = self#vhdl_name_t name in

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let typ = self#vhdl_subtype_indication_t typ in

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Subtype { name; typ }*)

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method vhdl_expr_t : vhdl_expr_t > vhdl_expr_t=

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fun x >

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x

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(* match x with

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 Call a > let a = self#vhdl_name_t a in Call a

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 Cst { value; unit_name } >

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let value = self#vhdl_cst_val_t value in

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let unit_name = self#option self#vhdl_name_t unit_name in

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Cst { value; unit_name }

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 Op { id; args } >

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let id = self#string id in

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let args = self#list self#vhdl_expr_t args in Op { id; args }

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 IsNull > IsNull

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 Time { value; phy_unit } >

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let value = self#int value in

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let phy_unit = self#string phy_unit in Time { value; phy_unit }

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 Sig { name; att } >

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let name = self#vhdl_name_t name in

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let att = self#option self#vhdl_signal_attributes_t att in

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Sig { name; att }

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 SuffixMod { expr; selection } >

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let expr = self#vhdl_expr_t expr in

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let selection = self#vhdl_suffix_selection_t selection in

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SuffixMod { expr; selection }

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 Aggregate { elems } >

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let elems = self#list self#vhdl_element_assoc_t elems in

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Aggregate { elems }

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 QualifiedExpression { type_mark; aggregate; expression } >

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let type_mark = self#vhdl_name_t type_mark in

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let aggregate = self#list self#vhdl_element_assoc_t aggregate in

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let expression = self#option self#vhdl_expr_t expression in

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QualifiedExpression { type_mark; aggregate; expression }

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 Others > Others*)

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method vhdl_name_t : vhdl_name_t > string=

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fun x >

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show_vhdl_name_t x

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method vhdl_assoc_element_t :

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vhdl_assoc_element_t > vhdl_assoc_element_t=

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fun

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{ formal_name; formal_arg; actual_name; actual_designator;

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actual_expr }

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(* At this point of the transformation, association elements have been resolved.

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* formal_[namearg] are empty

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* A simple variable name is of the form: actual_designator

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* A function call is of the form: actual_name ( [actual_designator  actual_expr] )

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* A conversion function is of the form: actual_name ( [actual_designator  actual_expr] )

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*)

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>

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(* let formal_name = self#option self#vhdl_name_t formal_name in

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let formal_arg = self#option self#vhdl_name_t formal_arg in

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let actual_name = self#option self#vhdl_name_t actual_name in

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let actual_designator =

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self#option self#vhdl_name_t actual_designator in

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let actual_expr = self#option self#vhdl_expr_t actual_expr in*)

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{

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formal_name;

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formal_arg;

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actual_name;

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actual_designator;

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actual_expr

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}

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method vhdl_element_assoc_t :

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vhdl_element_assoc_t > vhdl_element_assoc_t=

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fun { choices; expr } >

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let choices = self#list self#vhdl_expr_t choices in

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let expr = self#vhdl_expr_t expr in { choices; expr }

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method vhdl_array_attributes_t :

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vhdl_array_attributes_t > vhdl_array_attributes_t=

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fun x >

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match x with

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 AAttInt { id; arg } >

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let id = self#string id in

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let arg = self#int arg in AAttInt { id; arg }

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 AAttAscending > AAttAscending

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method vhdl_signal_attributes_t :

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vhdl_signal_attributes_t > vhdl_signal_attributes_t=

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fun x > match x with  SigAtt a > let a = self#string a in SigAtt a

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method vhdl_string_attributes_t :

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vhdl_string_attributes_t > vhdl_string_attributes_t=

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fun x >

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match x with  StringAtt a > let a = self#string a in StringAtt a

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method vhdl_suffix_selection_t :

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vhdl_suffix_selection_t > vhdl_suffix_selection_t=

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fun x >

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match x with

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 Idx a > let a = self#int a in Idx a

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 SuffixRange (a,b) >

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let a = self#int a in let b = self#int b in SuffixRange (a, b)

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(* TODO *)

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method mini_vhdl_sequential_stmt_t :

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mini_vhdl_sequential_stmt_t > mini_vhdl_sequential_stmt_t=

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fun x >

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x

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(* match x with

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 VarAssign { label; lhs; rhs } >

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let label = self#option self#vhdl_name_t label in

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let lhs = self#vhdl_name_t lhs in

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let rhs = self#vhdl_expr_t rhs in VarAssign { label; lhs; rhs }

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 SigSeqAssign { label; lhs; rhs } >

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let label = self#option self#vhdl_name_t label in

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let lhs = self#vhdl_name_t lhs in

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let rhs = self#list self#vhdl_waveform_element_t rhs in

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SigSeqAssign { label; lhs; rhs }

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 SigCondAssign { label; lhs; rhs; delay } >

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let label = self#option self#vhdl_name_t label in

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let lhs = self#vhdl_name_t lhs in

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let rhs = self#list self#vhdl_signal_condition_t rhs in

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let delay = self#option self#vhdl_expr_t delay in

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SigCondAssign { label; lhs; rhs; delay }

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 SigSelectAssign { label; lhs; sel; branches; delay } >

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let label = self#option self#vhdl_name_t label in

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let lhs = self#vhdl_name_t lhs in

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let sel = self#vhdl_expr_t sel in

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let branches = self#list self#vhdl_signal_selection_t branches

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in

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let delay = self#option self#vhdl_expr_t delay in

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SigSelectAssign { label; lhs; sel; branches; delay }

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 If { label; if_cases; default } >

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let label = self#option self#vhdl_name_t label in

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let if_cases = self#list self#mini_vhdl_if_case_t if_cases in

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let default = self#list self#mini_vhdl_sequential_stmt_t default

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in

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If { label; if_cases; default }

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 Case { label; guard; branches } >

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let label = self#option self#vhdl_name_t label in

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let guard = self#vhdl_expr_t guard in

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let branches = self#list self#mini_vhdl_case_item_t branches in

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Case { label; guard; branches }

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 Exit { label; loop_label; condition } >

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let label = self#option self#vhdl_name_t label in

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let loop_label = self#option self#string loop_label in

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let condition = self#option self#vhdl_expr_t condition in

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Exit { label; loop_label; condition }

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 Assert { label; cond; report; severity } >

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let label = self#option self#vhdl_name_t label in

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let cond = self#vhdl_expr_t cond in

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let report = self#vhdl_expr_t report in

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let severity = self#vhdl_expr_t severity in

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Assert { label; cond; report; severity }

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 ProcedureCall { label; name; assocs } >

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let label = self#option self#vhdl_name_t label in

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let name = self#vhdl_name_t name in

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let assocs = self#list self#vhdl_assoc_element_t assocs in

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ProcedureCall { label; name; assocs }

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 Wait > Wait

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 Null { label } >

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let label = self#option self#vhdl_name_t label in Null { label }

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 Return { label; expr } >

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let label = self#option self#vhdl_name_t label in

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let expr = self#option self#vhdl_expr_t expr in

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Return { label; expr }*)

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method mini_vhdl_if_case_t : mini_vhdl_if_case_t > mini_vhdl_if_case_t=

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fun { if_cond; if_block_mini } >

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let if_cond = self#vhdl_expr_t if_cond in

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let if_block_mini = self#list self#mini_vhdl_sequential_stmt_t if_block_mini

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in

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{ if_cond; if_block_mini }

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method mini_vhdl_case_item_t :

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mini_vhdl_case_item_t > mini_vhdl_case_item_t=

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fun { when_cond; when_stmt_mini } >

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let when_cond = self#list self#vhdl_expr_t when_cond in

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let when_stmt_mini = self#list self#mini_vhdl_sequential_stmt_t when_stmt_mini

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in

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{ when_cond; when_stmt_mini }

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method mini_vhdl_declaration_t :

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mini_vhdl_declaration_t > var_decl list=

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fun x >

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match x with

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 MiniVarDecl { names; typ; init_val } >

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self#lustre_mk_var_decl InPort names typ

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(* let names = self#list self#vhdl_name_t names in

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let typ = self#vhdl_subtype_indication_t typ in

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let init_val = self#vhdl_expr_t init_val in

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VarDecl { names; typ; init_val }*)

343

 MiniCstDecl { names; typ; init_val } >

344

self#lustre_mk_var_decl InPort names typ

345

(* let names = self#list self#vhdl_name_t names in

346

let typ = self#vhdl_subtype_indication_t typ in

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let init_val = self#vhdl_expr_t init_val in

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CstDecl { names; typ; init_val }*)

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 MiniSigDecl { names; typ; init_val } >

350

self#lustre_mk_var_decl InPort names typ

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(* let names = self#list self#vhdl_name_t names in

352

let typ = self#vhdl_subtype_indication_t typ in

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let init_val = self#vhdl_expr_t init_val in

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SigDecl { names; typ; init_val }*)

355

 MiniComponentDecl { name; generics; ports } >

356

[]

357

(* let name = self#vhdl_name_t name in

358

let generics = self#list self#vhdl_port_t generics in

359

let ports = self#list self#vhdl_port_t ports in

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ComponentDecl { name; generics; ports }*)

361

 MiniSubprogram { spec; decl_part; stmts } >

362

[]

363

(* let spec = self#vhdl_subprogram_spec_t spec in

364

let decl_part = self#list self#mini_vhdl_declaration_t decl_part

365

in

366

let stmts = self#list self#mini_vhdl_sequential_stmt_t stmts in

367

Subprogram { spec; decl_part; stmts }*)

368


369

method vhdl_load_t : vhdl_load_t > vhdl_load_t=

370

fun x > x

371


372

method mini_vhdl_declarative_item_t :

373

mini_vhdl_declarative_item_t > mini_vhdl_declarative_item_t=

374

fun { use_clause; declaration; definition } >

375

let use_clause = self#option self#vhdl_load_t use_clause in

376

(* let declaration = self#option self#mini_vhdl_declaration_t declaration in *)

377

let definition = self#option self#vhdl_definition_t definition in

378

{ use_clause; declaration; definition }

379


380

(* TODO : transform this as a new node *)

381

method mini_vhdl_process_t : mini_vhdl_process_t > mini_vhdl_process_t=

382

fun { id; p_declarations; active_sigs; p_body; postponed; label } >

383

(* let id = self#vhdl_name_t id in

384

let declarations =

385

self#list self#mini_vhdl_declarative_item_t declarations in

386

let active_sigs = self#list self#vhdl_name_t active_sigs in

387

let body = self#list self#mini_vhdl_sequential_stmt_t body in

388

let postponed = self#bool postponed in

389

let label = self#option self#vhdl_name_t label in *)

390

{ id; p_declarations; active_sigs; p_body; postponed; label }

391


392

(* TODO : transform this as a node call *)

393

method mini_vhdl_component_instantiation_t :

394

mini_vhdl_component_instantiation_t > statement=

395

fun { ci_name; archi; entity; generic_map; port_map } >

396

let ci_name = self#vhdl_name_t ci_name in

397

(*let archi = archi in

398

let entity = entity in

399

let generic_map = self#list self#vhdl_assoc_element_t generic_map in

400

let port_map = self#list self#vhdl_assoc_element_t port_map in*)

401

Eq {eq_lhs=[ci_name];

402

eq_rhs={expr_tag=Utils.new_tag (); expr_desc=Expr_ident "toto";

403

expr_type={tdesc=Tconst "cst"; tid=0}; expr_clock={cdesc=Cvar;cscoped=false;cid=0};

404

expr_delay={ddesc=Dundef;did=0}; expr_annot=None; expr_loc=Location.dummy_loc};

405

eq_loc=Location.dummy_loc}

406


407

(* TODO : Process is a new node; ComponentInst is a node call *)

408

method mini_vhdl_concurrent_stmt_t :

409

mini_vhdl_concurrent_stmt_t > statement=

410

fun x >

411

match x with

412

 MiniProcess a > (*let a = self#mini_vhdl_process_t a in*)

413

Eq {eq_lhs=["Process"];

414

eq_rhs={expr_tag=Utils.new_tag (); expr_desc=Expr_ident "toto";

415

expr_type={tdesc=Tconst "cst"; tid=0}; expr_clock={cdesc=Cvar;cscoped=false;cid=0};

416

expr_delay={ddesc=Dundef;did=0}; expr_annot=None; expr_loc=Location.dummy_loc};

417

eq_loc=Location.dummy_loc}

418

 MiniComponentInst a >

419

let a = self#mini_vhdl_component_instantiation_t a in a

420


421

method mini_vhdl_package_t : mini_vhdl_package_t > top_decl_desc=

422

fun { p_name; shared_defs; shared_decls; shared_uses } >

423

let node_id = self#vhdl_name_t p_name in

424

(*let shared_defs = self#list self#vhdl_definition_t shared_defs in

425

let shared_decls = List.map self#mini_vhdl_declaration_t shared_decls in

426

let shared_uses = self#list self#vhdl_load_t shared_uses in*)

427

let node_type = Types.new_var () in

428

let node_clock = Clocks.new_ck Cvar false in

429

Node { node_id; node_type; node_clock;

430

node_inputs=[]; node_outputs = []; node_locals = [];

431

node_gencalls = []; node_checks = []; node_asserts = [];

432

node_stmts = []; node_dec_stateless = false; node_stateless = None;

433

node_spec = None; node_annot = [] }

434


435

method mini_vhdl_component_t :

436

mini_vhdl_component_t > top_decl_desc =

437

fun

438

{ names; generics; ports; contexts; c_declarations; definitions; c_body }

439

>

440

(*let generics = self#list self#vhdl_port_t generics in*)

441

let ports = self#list self#vhdl_port_t ports in

442

(*let contexts = self#list self#vhdl_load_t contexts in*)

443

let c_declarations = List.flatten (List.map self#mini_vhdl_declaration_t c_declarations) in

444

(*let definitions = List.map self#vhdl_definition_t definitions in (* TODO: add the result of this transformation to mk_node call *)

445

let node_id = String.concat "__" (List.map show_vhdl_name_t names) in

446

let node_type = Types.new_var () in

447

let node_clock = Clocks.new_ck Cvar false in*)

448

self#lustre_mk_node names c_declarations ports c_body

449


450

method mini_vhdl_design_file_t :

451

mini_vhdl_design_file_t > program_t =

452

fun { components; packages } >

453

let components = List.map self#mini_vhdl_component_t components in

454

let packages = List.map self#mini_vhdl_package_t packages in

455

let desc x = { top_decl_desc = x;

456

top_decl_owner = "";

457

top_decl_itf = false;

458

top_decl_loc = Location.dummy_loc } in

459

let desc1 = List.map desc components in

460

let desc2 = List.map desc packages in

461

desc1 @ desc2

462

end
