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Revision 92aface4

Added by Arnaud Dieumegard over 3 years ago

Removed warnings and solved bug for visitors iterators references between vhdl_ast and mini_vhdl_ast

View differences:

src/backends/VHDL/mini_vhdl_ast.ml
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open Vhdl_ast
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type mini_vhdl_sequential_stmt_t = 
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  | VarAssign of {
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  | MiniVarAssign of {
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      label: vhdl_name_t option;
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      lhs: vhdl_name_t;
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      rhs: vhdl_expr_t }
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  | SigSeqAssign of {
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  | MiniSigSeqAssign of {
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      label: vhdl_name_t option;
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      lhs: vhdl_name_t;
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      rhs: vhdl_waveform_element_t list}
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  | SigCondAssign of {
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  | MiniSigCondAssign of {
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      label: vhdl_name_t option;
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      lhs: vhdl_name_t;
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      rhs: vhdl_signal_condition_t list;
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      delay: vhdl_expr_t option}
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  | SigSelectAssign of {
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  | MiniSigSelectAssign of {
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      label: vhdl_name_t option;
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      lhs: vhdl_name_t;
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      sel: vhdl_expr_t;
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      branches: vhdl_signal_selection_t list;
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      delay: vhdl_expr_t option}
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  | If of {
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  | MiniIf of {
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      label: vhdl_name_t option;
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      if_cases: mini_vhdl_if_case_t list;
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      default: mini_vhdl_sequential_stmt_t list}
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  | Case of {
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  | MiniCase of {
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      label: vhdl_name_t option;
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      guard: vhdl_expr_t;
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      branches: mini_vhdl_case_item_t list }
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  | Exit of {
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  | MiniExit of {
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      label: vhdl_name_t option;
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      loop_label: string option;
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      condition: vhdl_expr_t option}
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  | Assert of {
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  | MiniAssert of {
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      label: vhdl_name_t option;
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      cond: vhdl_expr_t;
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      report: vhdl_expr_t;
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      severity: vhdl_expr_t}
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  | ProcedureCall of {
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  | MiniProcedureCall of {
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      label: vhdl_name_t option;
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      name: vhdl_name_t;
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      assocs: vhdl_assoc_element_t list }
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  | Wait
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  | Null of {
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  | MiniWait
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  | MiniNull of {
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      label: vhdl_name_t option}
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  | Return of {
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  | MiniReturn of {
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     label: vhdl_name_t option;
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     expr: vhdl_expr_t option}
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and mini_vhdl_if_case_t =
......
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  }
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and mini_vhdl_declaration_t =
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  | VarDecl of {
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  | MiniVarDecl of {
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      names : vhdl_name_t list;
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      typ : vhdl_subtype_indication_t;
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      init_val : vhdl_expr_t
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    }
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  | CstDecl of {
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  | MiniCstDecl of {
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      names : vhdl_name_t list;
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      typ : vhdl_subtype_indication_t;
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      init_val : vhdl_expr_t
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    }
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  | SigDecl of {
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  | MiniSigDecl of {
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      names : vhdl_name_t list;
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      typ : vhdl_subtype_indication_t;
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      init_val : vhdl_expr_t
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    }
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  | ComponentDecl of {
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  | MiniComponentDecl of {
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      name: vhdl_name_t;
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      generics: vhdl_port_t list;
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      ports: vhdl_port_t list;
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    }
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  | Subprogram of {
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  | MiniSubprogram of {
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      spec: vhdl_subprogram_spec_t;
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      decl_part: mini_vhdl_declaration_t list;
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      stmts: mini_vhdl_sequential_stmt_t list
......
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  }
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and mini_vhdl_concurrent_stmt_t =
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  | Process of mini_vhdl_process_t
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  | ComponentInst of mini_vhdl_component_instantiation_t
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  | MiniProcess of mini_vhdl_process_t
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  | MiniComponentInst of mini_vhdl_component_instantiation_t
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and mini_vhdl_package_t =
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  {
......
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    packages: mini_vhdl_package_t list;
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  }
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(*[@@deriving show { with_path = false }]*)
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[@@deriving visitors { variety = "iter"; name = "mini_vhdl_iter" }]
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[@@deriving visitors { variety = "iter"; name = "mini_vhdl_iter"; ancestors = ["vhdl_iter"] }]

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