Revision 9195145a
Added by Arnaud Dieumegard almost 5 years ago
src/backends/VHDL/vhdl_2_mini_vhdl_map.ml | ||
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12 | 12 |
mutable architecture_generics: vhdl_port_t list; |
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mutable assigned_signals_names: vhdl_name_t list; |
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mutable functions: (vhdl_name_t * vhdl_parameter_t list * vhdl_name_t) list; |
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mutable memories: vhdl_name_t list; |
|
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mutable contexts: vhdl_load_t list; |
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} |
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|
... | ... | |
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method to_string_vhdl_name_t : vhdl_name_t -> string= |
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fun x -> |
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match x with |
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| Simple a -> "Si:"^a
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| Identifier a -> "Id:"^a
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| Simple a -> a |
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| Identifier a -> a |
|
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| Selected a -> String.concat "." (List.map self#to_string_vhdl_name_t a) |
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| Index { id; exprs } -> self#to_string_vhdl_name_t id |
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| Slice { id; range } -> self#to_string_vhdl_name_t id |
... | ... | |
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*) |
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|
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(***************** |
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* Begin names_t extraction |
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* Begin names_t extraction (assigned signals)
|
|
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*) |
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method mini_vhdl_concurrent_stmt_t_assigned_signals_names : mini_vhdl_concurrent_stmt_t -> vhdl_name_t list= |
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fun x -> |
... | ... | |
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List.flatten (List.map self#mini_vhdl_sequential_stmt_t_assigned_signals_names case_branches_stmts) |
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| ProcedureCall { label; name; assocs } -> [] (* TODO: resolve this *) |
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| _ -> [] |
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|
|
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(**************** |
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*End names_t extraction |
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*) |
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(***************** |
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* Begin Implicit memories extraction |
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*) |
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method mini_vhdl_concurrent_stmt_t_memories : vhdl_name_t list -> mini_vhdl_concurrent_stmt_t -> vhdl_name_t list= |
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fun assigned_signals -> fun x -> |
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match x with |
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| Process a -> List.flatten (List.map (self#memories assigned_signals []) a.body) |
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| ComponentInst a -> [] |
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method memories: vhdl_name_t list -> vhdl_name_t list -> mini_vhdl_sequential_stmt_t -> vhdl_name_t list= |
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fun assigned_signals -> fun mems -> fun x -> |
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match x with |
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| If { label; if_cases; default } -> |
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let if_cases_stmts = List.map (fun x -> x.if_block) if_cases in |
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let if_cases_assigned_signals = |
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List.map self#mini_vhdl_sequential_stmt_t_assigned_signals_names (List.flatten (if_cases_stmts@[default])) in |
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let if_cases_memories = List.flatten (List.map (fun x -> List.flatten (List.map (self#memories assigned_signals []) x)) (if_cases_stmts@[default])) in |
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let mems = if_cases_memories@mems in |
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(match default with |
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| [] -> (List.flatten if_cases_assigned_signals)@mems |
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| _ -> mems) |
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| Case { label; guard; branches } -> |
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let case_branches_stmts = List.map (fun x -> x.when_stmt) branches in |
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let case_assigned_signals = List.map self#mini_vhdl_sequential_stmt_t_assigned_signals_names (List.flatten (case_branches_stmts)) in |
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let cases_memories = List.flatten (List.map (fun x -> List.flatten (List.map (self#memories assigned_signals []) x)) (case_branches_stmts)) in |
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cases_memories@mems |
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| _ -> mems |
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(**************** |
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*End memories extraction |
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*) |
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method vhdl_cst_val_t : vhdl_cst_val_t -> vhdl_cst_val_t= |
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fun x -> |
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match x with |
... | ... | |
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let spec = self#vhdl_subprogram_spec_t spec in |
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let decl_part = List.map self#vhdl_declaration_t decl_part in |
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let stmts = List.map self#vhdl_sequential_stmt_t stmts in |
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(* TODO: Explicit memories *) |
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Subprogram { spec; decl_part; stmts } |
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|
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method vhdl_declarative_item_t : |
... | ... | |
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let declarations = List.map self#vhdl_declarative_item_t declarations in |
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let active_sigs = self#list self#lower_vhdl_name_t active_sigs in |
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let body = List.map self#vhdl_sequential_stmt_t body in |
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(* TODO: Explicit memories *) |
|
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let postponed = false in |
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let label = None in |
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{ id; declarations; active_sigs; body; postponed; label } |
... | ... | |
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let functions = List.map ( |
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fun x -> match x with Subprogram (s) -> (Simple s.spec.name, s.spec.parameters, s.spec.typeMark) | _ -> failwith "Unreachable error" |
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) subprograms in |
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(* TODO: Flatten component instantiation from here *)
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let memories = List.flatten (List.map (self#mini_vhdl_concurrent_stmt_t_memories assigned_signals_names) body) in
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self#db_add_tuple { entity=ref_ent; |
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architecture=arch; |
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architecture_signals=signals; |
... | ... | |
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architecture_generics=generics; |
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assigned_signals_names=assigned_signals_names; |
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functions=functions; |
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memories=memories; |
|
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contexts=contexts; |
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}; |
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{ names; |
Also available in: Unified diff
First version of implicit memories explicitation