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-- An integrator with reset
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node integrator_reset ( Fx  : real ; ResetLevel  : bool ; x0  : real  )  returns (o  : real  ) ;
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  let
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   o  = x0 -> if ( ResetLevel  ) then x0 else ( Fx * 1.000000  ) + pre ( o );
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  tel 
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node ANGL_sign ( SigIn_Out1_137  : real  ) returns ( Out2_In1_203  : real  ) ;
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 var Switch1_Out1_182  : real ;
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  let
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   Switch1_Out1_182  = if 0.000000 = SigIn_Out1_137 then 0.000000 else - 1.000000;
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  Out2_In1_203  = if SigIn_Out1_137 > 0.000000 then 1.000000 else Switch1_Out1_182;
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 tel 
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node ANGL ( in_Out1_76  : real  ) returns ( _180_In1_238  : real  ) ;
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var Abs_Out1_79  : real ;
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 Relational_Operator_ANGL_Out1_101  : bool ;
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 Sum6_Out1_111  : real ;
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 Switch1_ANGL_Out1_120  : real ;
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 sign_Out1_127  : real ;
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 times360_Out1_226  : real ;
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 Abs_In1_78  : real ;
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 Relational_Operator_ANGL_In1_99  : real ;
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 Sum6_In1_109  : real ;
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 Sum6_In2_110  : real ;
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 Switch1_ANGL_In1_117  : real ;
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 Switch1_ANGL_In2_118  : bool ;
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 Switch1_ANGL_In3_119  : real ;
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 sign_In1_126  : real ;
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let
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Abs_Out1_79  = if Abs_In1_78 < 0.000000 then - Abs_In1_78 else Abs_In1_78;
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Relational_Operator_ANGL_Out1_101  = Relational_Operator_ANGL_In1_99 > 180.000000;
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Sum6_Out1_111  = - Sum6_In1_109 + Sum6_In2_110;
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Switch1_ANGL_Out1_120  = if Switch1_ANGL_In2_118 then Switch1_ANGL_In1_117 else Switch1_ANGL_In3_119;
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sign_Out1_127  = ANGL_sign ( sign_In1_126  );
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times360_Out1_226  = 360.000000 * sign_Out1_127;
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Relational_Operator_ANGL_In1_99  = Abs_Out1_79;
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Abs_In1_78  = in_Out1_76;
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Switch1_ANGL_In3_119  = in_Out1_76;
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Sum6_In2_110  = in_Out1_76;
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sign_In1_126  = in_Out1_76;
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_180_In1_238  = Switch1_ANGL_Out1_120;
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Sum6_In1_109  = times360_Out1_226;
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Switch1_ANGL_In1_117  = Sum6_Out1_111;
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Switch1_ANGL_In2_118  = Relational_Operator_ANGL_Out1_101;
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 tel 
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node DynamicSaturation ( up_Out1_293  : real ; u_Out1_303  : real ; lo_Out1_313  : real  ) 
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   returns ( y1_In1_355  : real  ) ;
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var LowerRelop1_Out1_319  : bool ;
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 UpperRelop_Out1_325  : bool ;
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 switch2_1_Out1_334  : real ;
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 switch2_2_Out1_343  : real ;
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 LowerRelop1_In1_317  : real ;
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 LowerRelop1_In2_318  : real ;
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 UpperRelop_In1_323  : real ;
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 UpperRelop_In2_324  : real ;
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 switch2_1_In1_331  : real ;
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 switch2_1_In2_332  : bool ;
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 switch2_1_In3_333  : real ;
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 switch2_2_In1_340  : real ;
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 switch2_2_In2_341  : bool ;
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 switch2_2_In3_342  : real ;
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let
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LowerRelop1_Out1_319  = LowerRelop1_In1_317 > LowerRelop1_In2_318;
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UpperRelop_Out1_325  = UpperRelop_In1_323 < UpperRelop_In2_324;
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switch2_1_Out1_334  = if switch2_1_In2_332 then switch2_1_In1_331 else switch2_1_In3_333;
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switch2_2_Out1_343  = if switch2_2_In2_341 then switch2_2_In1_340 else switch2_2_In3_342;
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switch2_2_In1_340  = up_Out1_293;
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LowerRelop1_In2_318  = up_Out1_293;
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switch2_1_In3_333  = u_Out1_303;
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LowerRelop1_In1_317  = u_Out1_303;
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UpperRelop_In1_323  = u_Out1_303;
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switch2_1_In1_331  = lo_Out1_313;
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UpperRelop_In2_324  = lo_Out1_313;
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switch2_2_In3_342  = switch2_1_Out1_334;
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y1_In1_355  = switch2_2_Out1_343;
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switch2_2_In2_341  = LowerRelop1_Out1_319;
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switch2_1_In2_332  = UpperRelop_Out1_325;
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 tel 
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node Saturation ( signal  : real  ) returns ( saturated_signal  : real  ) ;
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var low_lim  : real ; 
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let
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  saturated_signal  = if ( low_lim <= 1000.000000  ) then low_lim else 1000.000000;
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  low_lim  = if ( 0.000100 >= signal  ) then 0.000100 else signal;
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 tel 
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node HgdCmdProcessor ( Vt_Out1_19  : real ; HdgCmdMCP_Out1_29  : real ; Heading_Out1_39  : real  ) 
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   returns ( HdgCmd_In1_947  : real ; HdgRteCmd_In1_959  : real  ) ;
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var var2zetaOmega_Out1_59  : real ;
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 ANGL_Out1_66  : real ;
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 Divide_Out1_262  : real ;
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 Divide1_Out1_274  : real ;
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 DynamicSaturation_Out1_283  : real ;
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 Integrator1_Out1_380  : real ;
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 Logical_Operator_Out1_385  : bool ;
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 Product_Out1_397  : real ;
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 Product1_Out1_409  : real ;
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 Saturation1_Out1_416  : real ;
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 Sum2_Out1_489  : real ;
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 Sum3_Out1_499  : real ;
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 Trigonometric_Function_Out1_504  : real ;
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 k_Out1_723  : real ;
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 k1_Out1_732  : real ;
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 k2_Out1_741  : real ;
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 k4_Out1_750  : real ;
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 k6_Out1_759  : real ;
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 omegaSq_Out1_771  : real ;
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 omegaSq2_Out1_783  : real ;
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 omega_calc_Out1_790  : real ;
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 rateLim_calc_Out1_875  : real ;
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 times514dot8_Out1_890  : real ;
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 Integrator1_1_Out1_598  : real ;
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 Logical_Operator1_1_Out1_604  : bool ;
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 Logical_Operator1_2_Out1_610  : bool ;
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 Logical_Operator1_3_Out1_616  : bool ;
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 Relational_Operator_Out1_622  : bool ;
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 Relational_Operator1_Out1_628  : bool ;
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 Relational_Operator2_Out1_634  : bool ;
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 Relational_Operator3_Out1_640  : bool ;
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 Switch1_Out1_649  : real ;
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 Switch2_Out1_658  : real ;
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 Switch3_Out1_667  : real ;
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 var2zetaOmega_In1_57  : real ;
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 var2zetaOmega_In2_58  : real ;
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 ANGL_In1_65  : real ;
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 DynamicSaturation_In1_280  : real ;
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 DynamicSaturation_In2_281  : real ;
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 DynamicSaturation_In3_282  : real ;
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 Integrator1_In1_377  : real ;
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 Integrator1_In2_378  : bool ;
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 Integrator1_In3_379  : real ;
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 Logical_Operator_In1_384  : bool ;
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 Product_In2_396  : real ;
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 Product1_In1_407  : real ;
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 Product1_In2_408  : real ;
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 Saturation1_In1_415  : real ;
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 Sum2_In1_487  : real ;
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 Sum2_In2_488  : real ;
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 Sum3_In1_497  : real ;
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 Sum3_In2_498  : real ;
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 Trigonometric_Function_In1_503  : real ;
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 k_In1_722  : real ;
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 k1_In1_731  : real ;
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 k2_In1_740  : real ;
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 k4_In1_749  : real ;
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 k6_In1_758  : real ;
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 omegaSq_In1_769  : real ;
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 omegaSq_In2_770  : real ;
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 omegaSq2_In1_781  : real ;
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 omegaSq2_In2_782  : real ;
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 omega_calc_In1_789  : real ;
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 rateLim_calc_In1_873  : real ;
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 rateLim_calc_In2_874  : real ;
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 times514dot8_In1_889  : real ;
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 Integrator1_1_In1_595  : real ;
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 Integrator1_1_In2_596  : bool ;
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 Logical_Operator1_1_In1_602  : bool ;
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 Logical_Operator1_1_In2_603  : bool ;
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 Logical_Operator1_2_In1_608  : bool ;
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 Logical_Operator1_2_In2_609  : bool ;
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 Logical_Operator1_3_In1_614  : bool ;
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 Logical_Operator1_3_In2_615  : bool ;
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 Relational_Operator_In1_620  : real ;
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 Relational_Operator_In2_621  : real ;
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 Relational_Operator1_In1_626  : real ;
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 Relational_Operator1_In2_627  : real ;
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 Relational_Operator2_In1_632  : real ;
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 Relational_Operator3_In1_638  : real ;
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 Switch1_In1_646  : real ;
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 Switch1_In2_647  : bool ;
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 Switch1_In3_648  : real ;
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 Switch2_In1_655  : real ;
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 Switch2_In2_656  : bool ;
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 Switch2_In3_657  : real ;
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 Switch3_In2_665  : bool ;
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 Switch3_In3_666  : real ;
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 integrator_out_1  : real ;
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 integrator_out_2  : real ;
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let
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  assert true;
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tel 
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node HeadingControl ( HdgCmdMCP_Out1_19  : real ; Heading_Out1_29  : real ; psidot_Out1_39  : real ; Vt_Out1_49  : real ; Roll_Out1_59  : real ; HeadEng_Out1_69  : bool ; rollLimitinput_Out1_79  : real  ) 
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   returns ( RollCmd_In1_1442  : real  ) ;
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var HdgCmdProcessor_Out1_88  : real ;
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 HdgCmdProcessor_Out2_89  : real ;
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 Khdg_Out1_1105  : real ;
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 Khdg1_Out1_1114  : real ;
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 Khdg2_Out1_1123  : real ;
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 Khdgrte_Out1_1132  : real ;
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 Logical_Operator_Out1_1137  : bool ;
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 Max_Out1_1147  : real ;
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 Min_Out1_1157  : real ;
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 Mux_Out1_1161_0  : real ;
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 Mux_Out1_1161_1  : real ;
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 Sum_Out1_1171  : real ;
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 Sum1_Out1_1181  : real ;
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 Sum2_Out1_1191  : real ;
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 Sum3_Out1_1201  : real ;
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 Sum4_Out1_1211  : real ;
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 -- sgn_Out1_1430  : real ;
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 Integrator1_1_Out1_1305  : real ;
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 Logical_Operator1_1_Out1_1311  : bool ;
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 Logical_Operator1_2_Out1_1317  : bool ;
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 Logical_Operator1_3_Out1_1323  : bool ;
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 Relational_Operator_Out1_1329  : bool ;
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 Relational_Operator1_Out1_1335  : bool ;
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 Relational_Operator2_Out1_1341  : bool ;
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 Relational_Operator3_Out1_1347  : bool ;
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 Switch1_Out1_1356  : real ;
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 Switch2_Out1_1365  : real ;
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 Switch3_Out1_1374  : real ;
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 HdgCmdProcessor_In1_85  : real ;
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 HdgCmdProcessor_In2_86  : real ;
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 HdgCmdProcessor_In3_87  : real ;
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 Khdg_In1_1104  : real ;
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 Khdg1_In1_1113  : real ;
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 Khdg2_In1_1122  : real ;
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 Khdgrte_In1_1131  : real ;
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 Logical_Operator_In1_1136  : bool ;
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 Max_In1_1145  : real ;
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 Max_In2_1146  : real ;
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 Min_In1_1155  : real ;
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 Min_In2_1156  : real ;
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 Mux_In1_1159  : real ;
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 Mux_In2_1160  : real ;
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 Sum_In1_1169  : real ;
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 Sum_In2_1170  : real ;
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 Sum1_In1_1179  : real ;
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 Sum1_In2_1180  : real ;
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 Sum2_In1_1189  : real ;
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 Sum2_In2_1190  : real ;
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 Sum3_In1_1199  : real ;
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 Sum3_In2_1200  : real ;
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 Sum4_In1_1209  : real ;
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 Sum4_In2_1210  : real ;
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 -- sgn_In1_1429  : real ;
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 Integrator1_1_In1_1302  : real ;
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 Integrator1_1_In2_1303  : bool ;
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 Integrator1_1_In3_1304  : real ;
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 Logical_Operator1_1_In1_1309  : bool ;
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 Logical_Operator1_1_In2_1310  : bool ;
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 Logical_Operator1_2_In1_1315  : bool ;
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 Logical_Operator1_2_In2_1316  : bool ;
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 Logical_Operator1_3_In1_1321  : bool ;
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 Logical_Operator1_3_In2_1322  : bool ;
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 -- Relational_Operator_In1_1327  : real ;
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 Relational_Operator_In2_1328  : real ;
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 -- Relational_Operator1_In1_1333  : real ;
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 Relational_Operator1_In2_1334  : real ;
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 Relational_Operator2_In1_1339  : real ;
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 -- Relational_Operator2_In2_1340  : real ;
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 Relational_Operator3_In1_1345  : real ;
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 -- Relational_Operator3_In2_1346  : real ;
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 -- Switch1_In1_1353  : real ;
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 Switch1_In2_1354  : bool ;
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 Switch1_In3_1355  : real ;
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 -- Switch2_In1_1362  : real ;
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 Switch2_In2_1363  : bool ;
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 Switch2_In3_1364  : real ;
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 -- Switch3_In1_1371  : real ;
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 Switch3_In2_1372  : bool ;
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 Switch3_In3_1373  : real ;
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 integrator_out : real ;
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let
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HdgCmdProcessor_Out1_88 , HdgCmdProcessor_Out2_89  = HgdCmdProcessor ( HdgCmdProcessor_In1_85 , HdgCmdProcessor_In2_86 , HdgCmdProcessor_In3_87  );
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Khdg_Out1_1105  = 0.050000 * Khdg_In1_1104;
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-- Khdg1_Out1_1114  = int_to_real ( 1  ) *Khdg1_In1_1113;
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Khdg1_Out1_1114  = Khdg1_In1_1113;
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-- Khdg2_Out1_1123  = int_to_real ( 1  ) * Khdg2_In1_1122;
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Khdg2_Out1_1123  = Khdg2_In1_1122;
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Khdgrte_Out1_1132  = 3.0 * Khdgrte_In1_1131;
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Logical_Operator_Out1_1137  = not Logical_Operator_In1_1136;
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Max_Out1_1147  = if Max_In1_1145 >= Max_In2_1146 then Max_In2_1146 else Max_In1_1145;
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Min_Out1_1157  = if Min_In1_1155 <= Min_In2_1156 then Min_In1_1155 else Min_In2_1156;
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-- [ Mux_Out1_1161_0 , Mux_Out1_1161_1  ]  = [ Mux_In1_1159 , Mux_In2_1160  ];
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Mux_Out1_1161_0  = Mux_In1_1159 ;
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Mux_Out1_1161_1  =  Mux_In2_1160 ;  
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Sum_Out1_1171  = Sum_In1_1169 + - Sum_In2_1170;
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Sum1_Out1_1181  = Sum1_In1_1179 + Sum1_In2_1180;
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Sum2_Out1_1191  = Sum2_In1_1189 + - Sum2_In2_1190;
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Sum3_Out1_1201  = - Sum3_In1_1199 + - Sum3_In2_1200;
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Sum4_Out1_1211  = Sum4_In1_1209 + - Sum4_In2_1210;
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-- sgn_Out1_1430  = int_to_real ( - 1  ) * sgn_In1_1429;
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-- sgn_Out1_1430  = - 30.0;
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integrator_out = integrator_reset ( Integrator1_1_In1_1302 , Integrator1_1_In2_1303 , Integrator1_1_In3_1304);
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Integrator1_1_Out1_1305  = Integrator1_1_In3_1304 -> pre (integrator_out);
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Logical_Operator1_1_Out1_1311  = Logical_Operator1_1_In1_1309 and Logical_Operator1_1_In2_1310;
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Logical_Operator1_2_Out1_1317  = Logical_Operator1_2_In1_1315 and Logical_Operator1_2_In2_1316;
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Logical_Operator1_3_Out1_1323  = Logical_Operator1_3_In1_1321 or Logical_Operator1_3_In2_1322;
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-- Relational_Operator_Out1_1329  = Relational_Operator_In1_1327 <= Relational_Operator_In2_1328;
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Relational_Operator_Out1_1329  = rollLimitinput_Out1_79 <= Relational_Operator_In2_1328;
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-- Relational_Operator1_Out1_1335  = Relational_Operator1_In1_1333 >= Relational_Operator1_In2_1334;
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Relational_Operator1_Out1_1335  = -rollLimitinput_Out1_79 >= Relational_Operator1_In2_1334;
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-- Relational_Operator2_Out1_1341  = Relational_Operator2_In1_1339 > Relational_Operator2_In2_1340;
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Relational_Operator2_Out1_1341  = Relational_Operator2_In1_1339 > 0.0;
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-- Relational_Operator3_Out1_1347  = Relational_Operator3_In1_1345 < Relational_Operator3_In2_1346;
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Relational_Operator3_Out1_1347  = Relational_Operator3_In1_1345 < 0.0;
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-- Switch1_Out1_1356  = if Switch1_In2_1354 then Switch1_In1_1353 else Switch1_In3_1355;
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Switch1_Out1_1356  = if Switch1_In2_1354 then rollLimitinput_Out1_79 else Switch1_In3_1355;
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-- Switch2_Out1_1365  = if Switch2_In2_1363 then Switch2_In1_1362 else Switch2_In3_1364;
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Switch2_Out1_1365  = if Switch2_In2_1363 then -rollLimitinput_Out1_79 else Switch2_In3_1364;
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Switch3_Out1_1374  = if Switch3_In2_1372 then 0.0 else Switch3_In3_1373;
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HdgCmdProcessor_In3_87  = Heading_Out1_29;
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Sum_In2_1170  = Heading_Out1_29;
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Sum_In1_1169  = HdgCmdProcessor_Out1_88;
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Mux_In2_1160  = HdgCmdProcessor_Out1_88;
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Khdg_In1_1104  = Sum_Out1_1171;
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Sum1_In1_1179  = Khdg_Out1_1105;
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Sum1_In2_1180  = Sum2_Out1_1191;
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Sum2_In1_1189  = HdgCmdProcessor_Out2_89;
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Sum2_In2_1190  = psidot_Out1_39;
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HdgCmdProcessor_In1_85  = Vt_Out1_49;
320
HdgCmdProcessor_In2_86  = HdgCmdMCP_Out1_19;
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Mux_In1_1159  = HdgCmdMCP_Out1_19;
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RollCmd_In1_1442  = Switch2_Out1_1365;
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Sum3_In1_1199  = Switch2_Out1_1365;
324
Sum4_In2_1210  = Switch2_Out1_1365;
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-- sgn_In1_1429  = 30.0;
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Khdgrte_In1_1131  = Sum1_Out1_1181;
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Min_In1_1155  = Max_Out1_1147;
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Logical_Operator_In1_1136  = HeadEng_Out1_69;
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Khdg1_In1_1113  = Sum3_Out1_1201;
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Khdg2_In1_1122  = Sum4_Out1_1211;
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Max_In2_1146  = Khdg1_Out1_1114;
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Min_In2_1156  = Khdg2_Out1_1123;
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Max_In1_1145  = Khdgrte_Out1_1132;
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Sum3_In2_1200  = rollLimitinput_Out1_79;
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Sum4_In1_1209  = rollLimitinput_Out1_79;
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-- Relational_Operator1_In1_1333  = sgn_Out1_1430;
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-- Switch2_In1_1362  = sgn_Out1_1430;
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-- Relational_Operator1_In1_1333  = -30.0;
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-- Switch2_In1_1362  = -30.0;
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Integrator1_1_In3_1304  = Roll_Out1_59;
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Integrator1_1_In2_1303  = Logical_Operator_Out1_1137;
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Switch3_In3_1373  = Min_Out1_1157;
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Relational_Operator3_In1_1345  = Min_Out1_1157;
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Relational_Operator2_In1_1339  = Min_Out1_1157;
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-- Relational_Operator_In1_1327  = 30.0;
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-- Switch1_In1_1353  =  30.0  ;
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Logical_Operator1_2_In2_1316  = Relational_Operator1_Out1_1335;
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Switch2_In2_1363  = Relational_Operator1_Out1_1335;
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Switch2_In3_1364  = Switch1_Out1_1356;
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Relational_Operator1_In2_1334  = Switch1_Out1_1356;
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-- Relational_Operator3_In2_1346  = 0.0 ;
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Logical_Operator1_2_In1_1315  = Relational_Operator3_Out1_1347;
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Logical_Operator1_3_In2_1322  = Logical_Operator1_2_Out1_1317;
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Logical_Operator1_3_In1_1321  = Logical_Operator1_1_Out1_1311;
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Switch3_In2_1372  = Logical_Operator1_3_Out1_1323;
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Logical_Operator1_1_In2_1310  = Relational_Operator2_Out1_1341;
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-- Relational_Operator2_In2_1340  = 0.0;
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-- Switch3_In1_1371  = 0.0 ;
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Integrator1_1_In1_1302  = Switch3_Out1_1374;
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Logical_Operator1_1_In1_1309  = Relational_Operator_Out1_1329;
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Switch1_In2_1354  = Relational_Operator_Out1_1329;
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Relational_Operator_In2_1328  = Integrator1_1_Out1_1305;
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Switch1_In3_1355  = Integrator1_1_Out1_1305;
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 tel 
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node top ( HdgCmdMCP: real ; Heading : real ; psidot : real ; Vt : real ; Roll : real ; HeadEng : bool ; rollLimitInput : real  ) 
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   returns (obs : bool);
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  var  RollCmd : real;
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let
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373
  RollCmd =  HeadingControl ( HdgCmdMCP , Heading , psidot , Vt , Roll , HeadEng , rollLimitInput);
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375
  -- Put properties here
376

    
377
  assert HeadEng; 
378

    
379
  assert (rollLimitInput > 0) and (rollLimitInput <= 30);
380
  assert true -> (rollLimitInput = pre (rollLimitInput));
381
  -- assert (Roll >= -rollLimitInput) and (Roll <= rollLimitInput); 
382

    
383
  obs = (RollCmd >= -rollLimitInput) and (RollCmd <= rollLimitInput); 
384

    
385
  --!MAIN : true;
386
  --!PROPERTY: obs = true;
387
tel
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