Revision 27332198
Added by Arnaud Dieumegard over 6 years ago
src/backends/VHDL/vhdl_ast.ml | ||
---|---|---|
248 | 248 |
delay: vhdl_expr_t option; |
249 | 249 |
} |
250 | 250 |
[@@deriving show { with_path = false }, yojson {strict = false}];; |
251 |
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251 |
|
|
252 |
type vhdl_component_instantiation_t = |
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253 |
{ |
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254 |
name: vhdl_name_t; |
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255 |
inst_unit: vhdl_name_t; |
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256 |
generic_map: vhdl_assoc_element_t option [@default None]; |
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257 |
port_map: vhdl_assoc_element_t option [@default None]; |
|
258 |
} |
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259 |
[@@deriving show { with_path = false }, yojson {strict = false}];; |
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260 |
|
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252 | 261 |
type vhdl_concurrent_stmt_t = |
253 | 262 |
| SigAssign of vhdl_conditional_signal_t [@name "CONDITIONAL_SIGNAL_ASSIGNMENT"] |
254 | 263 |
| Process of vhdl_process_t [@name "PROCESS_STATEMENT"] |
255 | 264 |
| SelectedSig of vhdl_selected_signal_t [@name "SELECTED_SIGNAL_ASSIGNMENT"] |
265 |
| ComponentInst of vhdl_component_instantiation_t [@name "COMPONENT_INSTANTIATION_STATEMENT"] |
|
256 | 266 |
[@@deriving show { with_path = false }, yojson {strict = false}];; |
257 | 267 |
(* |
258 | 268 |
type vhdl_statement_t = |
src/backends/VHDL/vhdl_ast_deriving.ml | ||
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4747 | 4747 |
| _ -> Result.Error "Vhdl_ast.vhdl_selected_signal_t") |
4748 | 4748 |
[@ocaml.warning "-A"]) |
4749 | 4749 |
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4750 |
type vhdl_component_instantiation_t = |
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4751 |
{ |
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4752 |
name: vhdl_name_t ; |
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4753 |
inst_unit: vhdl_name_t ; |
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4754 |
generic_map: vhdl_assoc_element_t option [@default None]; |
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4755 |
port_map: vhdl_assoc_element_t option [@default None]}[@@deriving |
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4756 |
((show |
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4757 |
{ |
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with_path = |
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false |
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}), |
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(yojson |
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{ |
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strict = |
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false |
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4765 |
}))] |
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(* TODO *) |
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4767 |
let rec pp_vhdl_component_instantiation_t : |
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4768 |
Format.formatter -> |
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vhdl_component_instantiation_t -> Ppx_deriving_runtime.unit |
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= |
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4771 |
let __3 () = pp_vhdl_assoc_element_t |
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4772 |
|
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4773 |
and __2 () = pp_vhdl_assoc_element_t |
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4774 |
|
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and __1 () = pp_vhdl_name_t |
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4776 |
|
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and __0 () = pp_vhdl_name_t |
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in |
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4779 |
((let open! Ppx_deriving_runtime in |
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4780 |
fun fmt -> |
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4781 |
fun x -> |
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4782 |
Format.fprintf fmt "@[<2>{ "; |
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((((Format.fprintf fmt "@[%s =@ " "name"; |
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((__0 ()) fmt) x.name; |
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Format.fprintf fmt "@]"); |
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4786 |
Format.fprintf fmt ";@ "; |
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Format.fprintf fmt "@[%s =@ " "inst_unit"; |
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((__1 ()) fmt) x.inst_unit; |
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Format.fprintf fmt "@]"); |
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4790 |
Format.fprintf fmt ";@ "; |
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Format.fprintf fmt "@[%s =@ " "generic_map"; |
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((function |
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4793 |
| None -> Format.pp_print_string fmt "None" |
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| Some x -> |
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(Format.pp_print_string fmt "(Some "; |
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((__2 ()) fmt) x; |
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Format.pp_print_string fmt ")"))) x.generic_map; |
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Format.fprintf fmt "@]"); |
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Format.fprintf fmt ";@ "; |
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Format.fprintf fmt "@[%s =@ " "port_map"; |
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((function |
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4802 |
| None -> Format.pp_print_string fmt "None" |
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4803 |
| Some x -> |
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4804 |
(Format.pp_print_string fmt "(Some "; |
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((__3 ()) fmt) x; |
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Format.pp_print_string fmt ")"))) x.port_map; |
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4807 |
Format.fprintf fmt "@]"); |
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4808 |
Format.fprintf fmt "@ }@]") |
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4809 |
[@ocaml.warning "-A"]) |
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4810 |
|
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4811 |
and show_vhdl_component_instantiation_t : |
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4812 |
vhdl_component_instantiation_t -> Ppx_deriving_runtime.string = |
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fun x -> Format.asprintf "%a" pp_vhdl_component_instantiation_t x |
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4814 |
|
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let rec (vhdl_component_instantiation_t_to_yojson : |
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vhdl_component_instantiation_t -> Yojson.Safe.json) |
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= |
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((let open! Ppx_deriving_yojson_runtime in |
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fun x -> |
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let fields = [] in |
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4821 |
let fields = |
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4822 |
if x.port_map = None |
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4823 |
then fields |
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else |
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("port_map", |
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(((function |
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| None -> `Null |
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| Some x -> ((fun x -> vhdl_assoc_element_t_to_yojson x)) x)) |
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x.port_map)) |
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4830 |
:: fields |
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in |
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let fields = |
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4833 |
if x.generic_map = None |
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4834 |
then fields |
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else |
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("generic_map", |
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4837 |
(((function |
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4838 |
| None -> `Null |
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4839 |
| Some x -> ((fun x -> vhdl_assoc_element_t_to_yojson x)) x)) |
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x.generic_map)) |
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4841 |
:: fields |
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in |
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4843 |
let fields = |
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("inst_unit", ((fun x -> vhdl_name_t_to_yojson x) x.inst_unit)) :: |
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fields in |
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let fields = ("name", ((fun x -> vhdl_name_t_to_yojson x) x.name)) |
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:: fields in |
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`Assoc fields) |
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[@ocaml.warning "-A"]) |
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4850 |
|
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and (vhdl_component_instantiation_t_of_yojson : |
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4852 |
Yojson.Safe.json -> |
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vhdl_component_instantiation_t Ppx_deriving_yojson_runtime.error_or) |
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= |
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((let open! Ppx_deriving_yojson_runtime in |
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function |
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| `Assoc xs -> |
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let rec loop xs ((arg0,arg1,arg2,arg3) as _state) = |
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match xs with |
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4860 |
| ("name",x)::xs -> |
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loop xs |
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(((fun x -> vhdl_name_t_of_yojson x) x), arg1, arg2, arg3) |
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4863 |
| ("inst_unit",x)::xs -> |
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loop xs |
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(arg0, ((fun x -> vhdl_name_t_of_yojson x) x), arg2, arg3) |
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4866 |
| ("generic_map",x)::xs -> |
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loop xs |
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(arg0, arg1, |
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((function |
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4870 |
| `Null -> Result.Ok None |
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4871 |
| x -> |
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((fun x -> vhdl_assoc_element_t_of_yojson x) x) |
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>>= ((fun x -> Result.Ok (Some x)))) x), arg3) |
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| ("port_map",x)::xs -> |
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loop xs |
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(arg0, arg1, arg2, |
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((function |
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4878 |
| `Null -> Result.Ok None |
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4879 |
| x -> |
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((fun x -> vhdl_assoc_element_t_of_yojson x) x) |
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>>= ((fun x -> Result.Ok (Some x)))) x)) |
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| [] -> |
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arg3 >>= |
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((fun arg3 -> |
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arg2 >>= |
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(fun arg2 -> |
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4887 |
arg1 >>= |
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(fun arg1 -> |
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4889 |
arg0 >>= |
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(fun arg0 -> |
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Result.Ok |
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4892 |
{ |
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name = arg0; |
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inst_unit = arg1; |
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generic_map = arg2; |
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port_map = arg3 |
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}))))) |
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4898 |
| _::xs -> loop xs _state in |
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loop xs |
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((Result.Error "Vhdl_ast.vhdl_component_instantiation_t.name"), |
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(Result.Error |
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"Vhdl_ast.vhdl_component_instantiation_t.inst_unit"), |
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(Result.Ok None), (Result.Ok None)) |
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4904 |
| _ -> Result.Error "Vhdl_ast.vhdl_component_instantiation_t") |
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4905 |
[@ocaml.warning "-A"]) |
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4750 | 4906 |
type vhdl_concurrent_stmt_t = |
4751 | 4907 |
| SigAssign of vhdl_conditional_signal_t |
4752 | 4908 |
[@name "CONDITIONAL_SIGNAL_ASSIGNMENT"] |
4753 | 4909 |
| Process of vhdl_process_t [@name "PROCESS_STATEMENT"] |
4754 | 4910 |
| SelectedSig of vhdl_selected_signal_t |
4755 | 4911 |
[@name "SELECTED_SIGNAL_ASSIGNMENT"] |
4912 |
| ComponentInst of vhdl_component_instantiation_t |
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4913 |
[@name "COMPONENT_INSTANTIATION_STATEMENT"] |
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4756 | 4914 |
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4757 | 4915 |
let rec pp_vhdl_concurrent_stmt_t : |
4758 | 4916 |
Format.formatter -> vhdl_concurrent_stmt_t -> Ppx_deriving_runtime.unit = |
4759 |
let __2 () = pp_vhdl_selected_signal_t |
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4917 |
let __3 () = pp_vhdl_component_instantiation_t |
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4918 |
|
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and __2 () = pp_vhdl_selected_signal_t |
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4760 | 4920 |
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4761 | 4921 |
and __1 () = pp_vhdl_process_t |
4762 | 4922 |
|
... | ... | |
4771 | 4931 |
((__1 ()) fmt) a0; |
4772 | 4932 |
| SelectedSig a0 -> |
4773 | 4933 |
((__2 ()) fmt) a0; |
4934 |
| ComponentInst a0 -> |
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4935 |
((__3 ()) fmt) a0; |
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4774 | 4936 |
) |
4775 | 4937 |
[@ocaml.warning "-A"]) |
4776 | 4938 |
|
... | ... | |
4794 | 4956 |
| SelectedSig arg0 -> |
4795 | 4957 |
`List |
4796 | 4958 |
[`String "SELECTED_SIGNAL_ASSIGNMENT"; |
4797 |
((fun x -> vhdl_selected_signal_t_to_yojson x)) arg0]) |
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4959 |
((fun x -> vhdl_selected_signal_t_to_yojson x)) arg0] |
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4960 |
| ComponentInst arg0 -> |
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4961 |
`List |
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4962 |
[`String "COMPONENT_INSTANTIATION_STATEMENT"; |
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4963 |
((fun x -> vhdl_component_instantiation_t_to_yojson x)) arg0]) |
|
4798 | 4964 |
[@ocaml.warning "-A"]) |
4799 | 4965 |
|
4800 | 4966 |
and (vhdl_concurrent_stmt_t_of_yojson : |
... | ... | |
4812 | 4978 |
| `List ((`String "SELECTED_SIGNAL_ASSIGNMENT")::arg0::[]) -> |
4813 | 4979 |
((fun x -> vhdl_selected_signal_t_of_yojson x) arg0) >>= |
4814 | 4980 |
((fun arg0 -> Result.Ok (SelectedSig arg0))) |
4981 |
| `List ((`String "COMPONENT_INSTANTIATION_STATEMENT")::arg0::[]) -> |
|
4982 |
((fun x -> vhdl_component_instantiation_t_of_yojson x) arg0) >>= |
|
4983 |
((fun arg0 -> Result.Ok (ComponentInst arg0))) |
|
4815 | 4984 |
| _ -> Result.Error "Vhdl_ast.vhdl_concurrent_stmt_t") |
4816 | 4985 |
[@ocaml.warning "-A"]) |
4817 | 4986 |
|
src/backends/VHDL/vhdl_ast_map.ml | ||
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27 | 27 |
let _ = fun (_ : vhdl_process_t) -> () |
28 | 28 |
let _ = fun (_ : vhdl_selected_signal_t) -> () |
29 | 29 |
let _ = fun (_ : vhdl_port_mode_t) -> () |
30 |
let _ = fun (_ : vhdl_component_instantiation_t) -> () |
|
30 | 31 |
let _ = fun (_ : vhdl_concurrent_stmt_t) -> () |
31 | 32 |
let _ = fun (_ : vhdl_port_t) -> () |
32 | 33 |
let _ = fun (_ : vhdl_entity_t) -> () |
... | ... | |
65 | 66 |
method virtual vhdl_subprogram_spec_t : vhdl_subprogram_spec_t -> vhdl_subprogram_spec_t |
66 | 67 |
method virtual vhdl_discrete_range_t : vhdl_discrete_range_t -> vhdl_discrete_range_t |
67 | 68 |
method virtual vhdl_parameter_t : vhdl_parameter_t -> vhdl_parameter_t |
69 |
method virtual vhdl_component_instantiation_t : vhdl_component_instantiation_t -> vhdl_component_instantiation_t |
|
68 | 70 |
method virtual vhdl_concurrent_stmt_t : vhdl_concurrent_stmt_t -> vhdl_concurrent_stmt_t |
69 | 71 |
method virtual vhdl_declaration_t : vhdl_declaration_t -> vhdl_declaration_t |
70 | 72 |
method virtual vhdl_architecture_t : vhdl_architecture_t -> vhdl_architecture_t |
... | ... | |
398 | 400 |
method vhdl_port_mode_t : vhdl_port_mode_t -> vhdl_port_mode_t= |
399 | 401 |
fun x -> x |
400 | 402 |
|
403 |
method vhdl_component_instantiation_t : |
|
404 |
vhdl_component_instantiation_t -> vhdl_component_instantiation_t= |
|
405 |
fun { name; inst_unit; generic_map; port_map } -> |
|
406 |
let name = self#vhdl_name_t name in |
|
407 |
let inst_unit = self#vhdl_name_t inst_unit in |
|
408 |
let generic_map = self#option self#vhdl_assoc_element_t generic_map |
|
409 |
in |
|
410 |
let port_map = self#option self#vhdl_assoc_element_t port_map in |
|
411 |
{ name; inst_unit; generic_map; port_map } |
|
412 |
|
|
401 | 413 |
method vhdl_concurrent_stmt_t : |
402 | 414 |
vhdl_concurrent_stmt_t -> vhdl_concurrent_stmt_t= |
403 | 415 |
fun x -> |
... | ... | |
405 | 417 |
| SigAssign a -> let a = self#vhdl_conditional_signal_t a in SigAssign a |
406 | 418 |
| Process a -> let a = self#vhdl_process_t a in Process a |
407 | 419 |
| SelectedSig a -> let a = self#vhdl_selected_signal_t a in SelectedSig a |
420 |
| ComponentInst a -> let a = self#vhdl_component_instantiation_t a in ComponentInst a |
|
408 | 421 |
|
409 | 422 |
method vhdl_port_t : vhdl_port_t -> vhdl_port_t= |
410 | 423 |
fun { names; mode; typ; expr } -> |
src/tools/importer/vhdl_to_lustre.ml | ||
---|---|---|
29 | 29 |
let _ = fun (_ : vhdl_process_t) -> () |
30 | 30 |
let _ = fun (_ : vhdl_selected_signal_t) -> () |
31 | 31 |
let _ = fun (_ : vhdl_port_mode_t) -> () |
32 |
let _ = fun (_ : vhdl_component_instantiation_t) -> () |
|
32 | 33 |
let _ = fun (_ : vhdl_concurrent_stmt_t) -> () |
33 | 34 |
let _ = fun (_ : vhdl_port_t) -> () |
34 | 35 |
let _ = fun (_ : vhdl_entity_t) -> () |
... | ... | |
67 | 68 |
method virtual vhdl_subprogram_spec_t : vhdl_subprogram_spec_t -> vhdl_subprogram_spec_t |
68 | 69 |
method virtual vhdl_discrete_range_t : vhdl_discrete_range_t -> vhdl_discrete_range_t |
69 | 70 |
method virtual vhdl_parameter_t : vhdl_parameter_t -> vhdl_parameter_t |
71 |
method virtual vhdl_component_instantiation_t : vhdl_component_instantiation_t -> vhdl_component_instantiation_t |
|
70 | 72 |
method virtual vhdl_concurrent_stmt_t : vhdl_concurrent_stmt_t -> vhdl_concurrent_stmt_t |
71 | 73 |
method virtual vhdl_declaration_t : vhdl_declaration_t -> vhdl_declaration_t |
72 | 74 |
method virtual vhdl_architecture_t : vhdl_architecture_t -> vhdl_architecture_t |
... | ... | |
400 | 402 |
method vhdl_port_mode_t : vhdl_port_mode_t -> vhdl_port_mode_t= |
401 | 403 |
fun x -> x |
402 | 404 |
|
405 |
method vhdl_component_instantiation_t : |
|
406 |
vhdl_component_instantiation_t -> vhdl_component_instantiation_t= |
|
407 |
fun { name; inst_unit; generic_map; port_map } -> |
|
408 |
let name = self#vhdl_name_t name in |
|
409 |
let inst_unit = self#vhdl_name_t inst_unit in |
|
410 |
let generic_map = self#option self#vhdl_assoc_element_t generic_map |
|
411 |
in |
|
412 |
let port_map = self#option self#vhdl_assoc_element_t port_map in |
|
413 |
{ name; inst_unit; generic_map; port_map } |
|
414 |
|
|
403 | 415 |
method vhdl_concurrent_stmt_t : |
404 | 416 |
vhdl_concurrent_stmt_t -> vhdl_concurrent_stmt_t= |
405 | 417 |
fun x -> |
... | ... | |
407 | 419 |
| SigAssign a -> let a = self#vhdl_conditional_signal_t a in SigAssign a |
408 | 420 |
| Process a -> let a = self#vhdl_process_t a in Process a |
409 | 421 |
| SelectedSig a -> let a = self#vhdl_selected_signal_t a in SelectedSig a |
422 |
| ComponentInst a -> let a = self#vhdl_component_instantiation_t a in ComponentInst a |
|
410 | 423 |
|
411 | 424 |
method vhdl_port_t : vhdl_port_t -> vhdl_port_t= |
412 | 425 |
fun { names; mode; typ; expr } -> |
Also available in: Unified diff
Added support for component instantiation