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open Vhdl_ast
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let _ = fun (_ : vhdl_cst_val_t) -> ()
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let _ = fun (_ : vhdl_type_t) -> ()
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let _ = fun (_ : vhdl_element_declaration_t) -> ()
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let _ = fun (_ : vhdl_subtype_indication_t) -> ()
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let _ = fun (_ : vhdl_discrete_range_t) -> ()
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let _ = fun (_ : vhdl_constraint_t) -> ()
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let _ = fun (_ : vhdl_definition_t) -> ()
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let _ = fun (_ : vhdl_expr_t) -> ()
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let _ = fun (_ : vhdl_name_t) -> ()
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let _ = fun (_ : vhdl_assoc_element_t) -> ()
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let _ = fun (_ : vhdl_element_assoc_t) -> ()
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let _ = fun (_ : vhdl_array_attributes_t) -> ()
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let _ = fun (_ : vhdl_signal_attributes_t) -> ()
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let _ = fun (_ : vhdl_string_attributes_t) -> ()
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let _ = fun (_ : vhdl_suffix_selection_t) -> ()
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(*let _ = fun (_ : 'basetype vhdl_type_attributes_t) -> () *)
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let _ = fun (_ : vhdl_parameter_t) -> ()
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let _ = fun (_ : vhdl_subprogram_spec_t) -> ()
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let _ = fun (_ : vhdl_waveform_element_t) -> ()
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let _ = fun (_ : vhdl_sequential_stmt_t) -> ()
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let _ = fun (_ : vhdl_if_case_t) -> ()
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let _ = fun (_ : vhdl_case_item_t) -> ()
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let _ = fun (_ : vhdl_port_mode_t) -> ()
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let _ = fun (_ : vhdl_port_t) -> ()
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let _ = fun (_ : vhdl_declaration_t) -> ()
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let _ = fun (_ : vhdl_load_t) -> ()
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let _ = fun (_ : vhdl_declarative_item_t) -> ()
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let _ = fun (_ : vhdl_signal_condition_t) -> ()
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let _ = fun (_ : vhdl_signal_selection_t) -> ()
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let _ = fun (_ : vhdl_conditional_signal_t) -> ()
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let _ = fun (_ : vhdl_process_t) -> ()
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let _ = fun (_ : vhdl_selected_signal_t) -> ()
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let _ = fun (_ : vhdl_component_instantiation_t) -> ()
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let _ = fun (_ : vhdl_concurrent_stmt_t) -> ()
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let _ = fun (_ : vhdl_entity_t) -> ()
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let _ = fun (_ : vhdl_package_t) -> ()
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let _ = fun (_ : vhdl_architecture_t) -> ()
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let _ = fun (_ : vhdl_configuration_t) -> ()
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let _ = fun (_ : vhdl_library_unit_t) -> ()
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let _ = fun (_ : vhdl_design_unit_t) -> ()
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let _ = fun (_ : vhdl_design_file_t) -> ()
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let _ = fun (_ : vhdl_file_t) -> ()
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class virtual ['acc] fold_sensitivity =
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object (self)
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method list : 'a. ('a -> 'acc -> 'acc) -> 'a list -> 'acc -> 'acc=
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fun f -> fun l -> fun acc -> List.fold_right f l acc
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method option : 'a. ('a -> 'acc -> 'acc) -> 'a option -> 'acc -> 'acc=
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fun f -> fun e -> fun acc -> match e with None -> acc | Some e -> f e acc
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method string : string -> 'acc -> 'acc=
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fun e -> fun acc -> acc
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method int : int -> 'acc -> 'acc=
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fun e -> fun acc -> acc
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method bool : bool -> 'acc -> 'acc=
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fun e -> fun acc -> acc
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method vhdl_cst_val_t : vhdl_cst_val_t -> 'acc -> 'acc=
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fun x ->
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fun acc -> acc
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method vhdl_type_t : vhdl_type_t -> 'acc -> 'acc=
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fun x ->
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fun acc -> acc
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method vhdl_element_declaration_t :
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vhdl_element_declaration_t -> 'acc -> 'acc=
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fun { ed_names; definition } ->
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fun acc -> acc
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method vhdl_subtype_indication_t :
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vhdl_subtype_indication_t -> 'acc -> 'acc=
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fun { si_name; functionName; const } ->
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fun acc ->
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let acc = self#vhdl_name_t si_name acc in
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let acc = self#vhdl_name_t functionName acc in
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let acc = self#vhdl_constraint_t const acc in acc
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method vhdl_discrete_range_t : vhdl_discrete_range_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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| SubDiscreteRange a -> self#vhdl_subtype_indication_t a acc
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| NamedRange a -> self#vhdl_name_t a acc
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| DirectedRange { direction; from; _to } ->
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let acc = self#vhdl_expr_t from acc in
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let acc = self#vhdl_expr_t _to acc in acc
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method vhdl_constraint_t : vhdl_constraint_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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| RefConstraint { ref_name } -> self#vhdl_name_t ref_name acc
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| RangeConstraint { range } -> self#vhdl_discrete_range_t range acc
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| IndexConstraint { ranges } ->
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self#list self#vhdl_discrete_range_t ranges acc
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| ArrayConstraint { ranges; sub } ->
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let acc = self#list self#vhdl_discrete_range_t ranges acc in
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let acc = self#vhdl_constraint_t sub acc in acc
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| RecordConstraint -> acc
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| NoConstraint -> acc
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method vhdl_definition_t : vhdl_definition_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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| Type { name; definition } ->
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let acc = self#vhdl_name_t name acc in
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let acc = self#vhdl_type_t definition acc in acc
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| Subtype { name; typ } ->
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let acc = self#vhdl_name_t name acc in
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let acc = self#vhdl_subtype_indication_t typ acc in acc
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method vhdl_expr_t : vhdl_expr_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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| Call a -> a::acc
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| Cst { value; unit_name } ->
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let acc = self#vhdl_cst_val_t value acc in
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let acc = self#option self#vhdl_name_t unit_name acc in acc
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| Op { id; args } ->
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let acc = self#string id acc in
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let acc = self#list self#vhdl_expr_t args acc in acc
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| IsNull -> acc
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| Time { value; phy_unit } ->
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let acc = self#int value acc in
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let acc = self#string phy_unit acc in acc
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| Sig { name; att } ->
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let acc = name::acc in
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let acc = self#option self#vhdl_signal_attributes_t att acc in
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acc
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| SuffixMod { expr; selection } ->
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let acc = self#vhdl_expr_t expr acc in
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let acc = self#vhdl_suffix_selection_t selection acc in acc
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| Aggregate { elems } ->
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self#list self#vhdl_element_assoc_t elems acc
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| QualifiedExpression { type_mark; aggregate; expression } ->
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let acc = type_mark::acc in
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let acc = self#list self#vhdl_element_assoc_t aggregate acc in
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let acc = self#option self#vhdl_expr_t expression acc in acc
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| Others -> acc
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method vhdl_name_t : vhdl_name_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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| Simple a -> x::acc
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| Identifier a -> x::acc
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| Selected a -> a@acc
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| Index { id; exprs } -> x::acc
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| Slice { id; range } -> x::acc
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| Attribute { id; designator; expr } ->
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let acc = x::acc in
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let acc = self#vhdl_expr_t expr acc in acc
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| Function { id; assoc_list } ->
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let acc = x::acc in
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let acc = self#list self#vhdl_assoc_element_t assoc_list acc
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in
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acc
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| Open -> acc
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| NoName -> acc
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method vhdl_assoc_element_t : vhdl_assoc_element_t -> 'acc -> 'acc=
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fun
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{ formal_name; formal_arg; actual_name; actual_designator;
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actual_expr }
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->
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fun acc ->
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let acc = match formal_name with None -> acc | Some a -> a::acc in
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let acc = match formal_arg with None -> acc | Some a -> a::acc in
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let acc = match actual_name with None -> acc | Some a -> a::acc in
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let acc = match actual_designator with None -> acc | Some a -> a::acc in
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let acc = self#option self#vhdl_expr_t actual_expr acc in acc
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method vhdl_element_assoc_t : vhdl_element_assoc_t -> 'acc -> 'acc=
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fun { choices; expr } ->
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fun acc ->
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let acc = self#list self#vhdl_expr_t choices acc in
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let acc = self#vhdl_expr_t expr acc in acc
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method vhdl_array_attributes_t : vhdl_array_attributes_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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| AAttInt { id; arg } ->
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let acc = self#string id acc in
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let acc = self#int arg acc in acc
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| AAttAscending -> acc
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method vhdl_signal_attributes_t :
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vhdl_signal_attributes_t -> 'acc -> 'acc=
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fun x -> fun acc -> match x with | SigAtt a -> self#string a acc
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method vhdl_string_attributes_t :
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vhdl_string_attributes_t -> 'acc -> 'acc=
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fun x -> fun acc -> match x with | StringAtt a -> self#string a acc
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method vhdl_suffix_selection_t : vhdl_suffix_selection_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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| Idx a -> self#int a acc
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| SuffixRange (a,b) ->
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let acc = self#int a acc in let acc = self#int b acc in acc
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(* method vhdl_type_attributes_t :
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'a . ('a -> 'acc -> 'acc) -> 'a vhdl_type_attributes_t -> 'acc -> 'acc=
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fun _basetype ->
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fun x ->
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fun acc ->
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match x with
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| TAttNoArg { id } -> self#string id acc
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| TAttIntArg { id; arg } ->
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let acc = self#string id acc in
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let acc = self#int arg acc in acc
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| TAttValArg { id; arg } ->
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let acc = self#string id acc in
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let acc = _basetype arg acc in acc
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| TAttStringArg { id; arg } ->
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let acc = self#string id acc in
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let acc = self#string arg acc in acc *)
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method vhdl_parameter_t : vhdl_parameter_t -> 'acc -> 'acc=
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fun { parameter_names; parameter_mode; parameter_typ; init_val } ->
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fun acc ->
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let acc = self#list self#vhdl_name_t parameter_names acc in
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let acc = self#list self#string parameter_mode acc in
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let acc = self#vhdl_subtype_indication_t parameter_typ acc in
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let acc = self#option self#vhdl_cst_val_t init_val acc in acc
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method vhdl_subprogram_spec_t : vhdl_subprogram_spec_t -> 'acc -> 'acc=
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fun { ss_name; subprogram_type; typeMark; parameters; isPure } ->
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fun acc ->
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let acc = self#string ss_name acc in
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let acc = self#string subprogram_type acc in
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let acc = self#vhdl_name_t typeMark acc in
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let acc = self#list self#vhdl_parameter_t parameters acc in
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let acc = self#bool isPure acc in acc
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method vhdl_waveform_element_t : vhdl_waveform_element_t -> 'acc -> 'acc=
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fun { value; we_delay } ->
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fun acc ->
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let acc = self#option self#vhdl_expr_t value acc in
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let acc = self#option self#vhdl_expr_t we_delay acc in acc
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method vhdl_sequential_stmt_t : vhdl_sequential_stmt_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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| VarAssign { label; seqs_lhs; rhs } ->
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let acc = self#vhdl_expr_t rhs acc in acc
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| SigSeqAssign { label; seqs_lhs; rhs } ->
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let acc = self#list self#vhdl_waveform_element_t rhs acc in
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acc
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| If { label; if_cases; default } ->
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let acc = self#list self#vhdl_if_case_t if_cases acc in
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let acc = self#list self#vhdl_sequential_stmt_t default acc in
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acc
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| Case { label; guard; branches } ->
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let acc = self#vhdl_expr_t guard acc in
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let acc = self#list self#vhdl_case_item_t branches acc in acc
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| Exit { label; loop_label; condition } ->
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let acc = self#option self#string loop_label acc in
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let acc = self#option self#vhdl_expr_t condition acc in acc
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| Assert { label; cond; report; severity } ->
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let acc = self#vhdl_expr_t cond acc in
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let acc = self#vhdl_expr_t report acc in
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let acc = self#vhdl_expr_t severity acc in acc
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| ProcedureCall { label; name; assocs } ->
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let acc = self#vhdl_name_t name acc in
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let acc = self#list self#vhdl_assoc_element_t assocs acc in
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acc
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| Wait -> acc
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| Null { label } -> acc
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| Return { label; expr } ->
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let acc = self#option self#vhdl_expr_t expr acc in acc
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method vhdl_if_case_t : vhdl_if_case_t -> 'acc -> 'acc=
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fun { if_cond; if_block } ->
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fun acc ->
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let acc = self#vhdl_expr_t if_cond acc in
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let acc = self#list self#vhdl_sequential_stmt_t if_block acc in
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acc
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method vhdl_case_item_t : vhdl_case_item_t -> 'acc -> 'acc=
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fun { when_cond; when_stmt } ->
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fun acc ->
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let acc = self#list self#vhdl_expr_t when_cond acc in
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let acc = self#list self#vhdl_sequential_stmt_t when_stmt acc in
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acc
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method vhdl_port_mode_t : vhdl_port_mode_t -> 'acc -> 'acc=
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fun _ -> fun acc -> acc
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method vhdl_port_t : vhdl_port_t -> 'acc -> 'acc=
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fun { port_names; port_mode; port_typ; port_expr } ->
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fun acc ->
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let acc = self#list self#vhdl_name_t port_names acc in
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let acc = self#vhdl_port_mode_t port_mode acc in
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let acc = self#vhdl_subtype_indication_t port_typ acc in
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let acc = self#vhdl_expr_t port_expr acc in acc
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method vhdl_declaration_t : vhdl_declaration_t -> 'acc -> 'acc=
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fun x ->
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fun acc -> acc
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method vhdl_load_t : vhdl_load_t -> 'acc -> 'acc=
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fun x ->
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fun acc -> acc
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method vhdl_declarative_item_t : vhdl_declarative_item_t -> 'acc -> 'acc=
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fun { use_clause; di_declaration; di_definition } ->
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fun acc -> acc
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method vhdl_signal_condition_t : vhdl_signal_condition_t -> 'acc -> 'acc=
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fun { sc_expr; cond } ->
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fun acc ->
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let acc = self#list self#vhdl_waveform_element_t sc_expr acc in
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let acc = self#option self#vhdl_expr_t cond acc in acc
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method vhdl_signal_selection_t : vhdl_signal_selection_t -> 'acc -> 'acc=
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fun { ss_expr; when_sel } ->
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fun acc ->
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let acc = self#list self#vhdl_waveform_element_t ss_expr acc in
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let acc = self#list self#vhdl_expr_t when_sel acc in acc
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method vhdl_conditional_signal_t :
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vhdl_conditional_signal_t -> 'acc -> 'acc=
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fun { cs_postponed; cs_label; cs_lhs; rhs; cs_delay } ->
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fun acc ->
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let acc = self#list self#vhdl_signal_condition_t rhs acc in
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let acc = self#vhdl_expr_t cs_delay acc in acc
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method vhdl_process_t : vhdl_process_t -> 'acc -> 'acc=
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fun { id; p_declarations; active_sigs; p_body } ->
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fun acc ->
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let acc = self#list self#vhdl_sequential_stmt_t p_body acc in acc
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method vhdl_selected_signal_t : vhdl_selected_signal_t -> 'acc -> 'acc=
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fun { ss_postponed; ss_label; ss_lhs; sel; branches; ss_delay } ->
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fun acc ->
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let acc = self#vhdl_expr_t sel acc in
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let acc = self#list self#vhdl_signal_selection_t branches acc in
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let acc = self#option self#vhdl_expr_t ss_delay acc in acc
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method vhdl_component_instantiation_t :
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vhdl_component_instantiation_t -> 'acc -> 'acc=
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fun
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{ ci_name; inst_unit; inst_unit_type; archi_name; generic_map; port_map
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}
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->
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fun acc -> acc
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method vhdl_concurrent_stmt_t : vhdl_concurrent_stmt_t -> 'acc -> 'acc=
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fun x ->
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fun acc ->
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match x with
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365
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| SigAssign a -> self#vhdl_conditional_signal_t a acc
|
366
|
| Process a -> self#vhdl_process_t a acc
|
367
|
| SelectedSig a -> self#vhdl_selected_signal_t a acc
|
368
|
| ComponentInst a -> self#vhdl_component_instantiation_t a acc
|
369
|
|
370
|
method vhdl_entity_t : vhdl_entity_t -> 'acc -> 'acc=
|
371
|
fun { e_name; generics; ports; e_declaration; stmts } ->
|
372
|
fun acc -> acc
|
373
|
|
374
|
method vhdl_package_t : vhdl_package_t -> 'acc -> 'acc=
|
375
|
fun { p_name; shared_defs; shared_decls; shared_uses } ->
|
376
|
fun acc -> acc
|
377
|
|
378
|
method vhdl_architecture_t : vhdl_architecture_t -> 'acc -> 'acc=
|
379
|
fun { a_name; entity; a_declarations; a_body } ->
|
380
|
fun acc -> acc
|
381
|
|
382
|
method vhdl_configuration_t : vhdl_configuration_t -> 'acc -> 'acc=
|
383
|
fun x -> fun acc -> acc
|
384
|
|
385
|
method vhdl_library_unit_t : vhdl_library_unit_t -> 'acc -> 'acc=
|
386
|
fun x ->
|
387
|
fun acc -> acc
|
388
|
|
389
|
method vhdl_design_unit_t : vhdl_design_unit_t -> 'acc -> 'acc=
|
390
|
fun { contexts; library } ->
|
391
|
fun acc -> acc
|
392
|
|
393
|
method vhdl_design_file_t : vhdl_design_file_t -> 'acc -> 'acc=
|
394
|
fun { design_units } ->
|
395
|
fun acc -> acc
|
396
|
|
397
|
method vhdl_file_t : vhdl_file_t -> 'acc -> 'acc=
|
398
|
fun { design_file } ->
|
399
|
fun acc -> acc
|
400
|
end
|