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lustrec / src / backends / VHDL / vhdl_ast_deriving.ml @ 32614c2d

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# Date Author Comment
32614c2d 07/24/2018 03:17 PM Arnaud Dieumegard

Correction of Procedure declaration pp

eab3066b 07/24/2018 02:43 PM Arnaud Dieumegard

Aggregate pp, correction of element_assoc pp

7f55f63f 07/24/2018 02:35 PM Arnaud Dieumegard

Default value corrections

ec031ed0 07/24/2018 01:31 PM Arnaud Dieumegard

Added support for declarative items

77bdbec5 07/24/2018 10:53 AM Arnaud Dieumegard

Added support for use clause in architecture declarations

9d5959cb 07/24/2018 10:19 AM Arnaud Dieumegard

Update of component instantiation pp

44998c1e 07/23/2018 05:59 PM Arnaud Dieumegard

Corrections on component instantiation

3b8ba4b5 07/23/2018 04:58 PM Arnaud Dieumegard

Added support for Component declarations in packages

21b75edb 07/23/2018 03:40 PM Arnaud Dieumegard

Pretty printing of assert statements

1f15a1b9 07/23/2018 03:32 PM Arnaud Dieumegard

Constant expression printing with units, Format for case statements, process formatting and name

ab6312e7 07/23/2018 02:54 PM Arnaud Dieumegard

Added support for constants units

248eb65e 07/23/2018 01:54 PM Arnaud Dieumegard

Added support for Array,Record,Enumeration constructs

6d3b5007 07/20/2018 04:52 PM Arnaud Dieumegard

Added support for ProcedureCall statements

6f9095f6 07/19/2018 05:42 PM Arnaud Dieumegard

Update of the component instantiation type to add architecture name reference

27332198 07/19/2018 01:40 PM Arnaud Dieumegard

Added support for component instantiation

389493d3 07/18/2018 11:21 AM Arnaud Dieumegard

code cleaning

d4175560 07/17/2018 04:00 PM Arnaud Dieumegard

Correction of Variables,Signals,Constants definitions of initial values. Now uses an expression.

5f3d7be6 07/17/2018 02:00 PM Arnaud Dieumegard

PP correction for separating spaces

3bc26d43 07/17/2018 01:39 PM Arnaud Dieumegard

PP support for concurrent assignment, processes

52323a31 07/17/2018 10:50 AM Arnaud Dieumegard

PP for Exit, Null and Return statements

00970bbf 07/17/2018 10:42 AM Arnaud Dieumegard

Update of default values for some option constructions + added end if and end case closing of if and case blocks

f779d524 07/16/2018 05:48 PM Arnaud Dieumegard

Update of the vhdl pretty printer

40364f53 07/16/2018 10:44 AM Arnaud Dieumegard

New version of the vhdl import + compilation