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lustrec / src / backends / VHDL / vhdl_2_mini_vhdl_map.ml @ a16d29bf

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# Date Author Comment
d5b99b54 08/28/2018 03:51 PM Arnaud Dieumegard

Code cleaning in vhdl to mini-vhdl transformation

010428a7 08/27/2018 05:36 PM Arnaud Dieumegard

DB tuple update to contain assigned elements in component

23b37f25 08/27/2018 02:39 PM Arnaud Dieumegard

Concurrent signal assignment statement transformation to concurrent process statement

4aa05aca 08/24/2018 04:51 PM Arnaud Dieumegard

Building explicit process from concurrent signl assignment

4a92cb37 08/24/2018 01:50 PM Arnaud Dieumegard

Bug fix: resolve entity/arch reference from component instantiation declaration

76f9de64 07/31/2018 11:05 AM Arnaud Dieumegard

mutable object field storing architecture<->entities<->contexts relation, generation of MiniVHDL component instantiation

4a37b02a 07/30/2018 05:33 PM Arnaud Dieumegard

Typo correction

3340aff0 07/30/2018 04:05 PM Arnaud Dieumegard

Some code comments

5bbf7413 07/30/2018 03:59 PM Arnaud Dieumegard

definition of the mini-vhdl types + pp + transformation from vhdl structure