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lustrec-tests / regression_tests / lustre_files / success / Simulink / src_many_files / Delay5_PP.LUSTREC.lus @ cd1faebc

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1 4748b215 hbourbou
-- This file has been generated by CoCoSim2.
2
3
-- Compiler: Lustre compiler 2 (ToLustre.m)
4
-- Time: 03-Dec-2018 22:29:09
5
node  Delay_Delay1_31_064(u : real;
6
	x0 : real;
7
	d : int;
8
	reset : bool;
9
	enable : bool;)
10
returns(pre_u : real;);
11
var pre_u1 : real;
12
	pre_u2 : real;
13
	pre_u3 : real;
14
	pre_u4 : real;
15
	pre_u5 : real;
16
	pre_u6 : real;
17
	pre_u7 : real;
18
	pre_u8 : real;
19
	pre_u9 : real;
20
	pre_u10 : real;
21
	pre_u11 : real;
22
	pre_u12 : real;
23
	pre_u13 : real;
24
	pre_u14 : real;
25
	pre_u15 : real;
26
	pre_u16 : real;
27
	pre_u17 : real;
28
	pre_u18 : real;
29
	pre_u19 : real;
30
	pre_u20 : real;
31
	pre_u21 : real;
32
	pre_u22 : real;
33
	pre_u23 : real;
34
	pre_u24 : real;
35
	pre_u25 : real;
36
	pre_u26 : real;
37
	pre_u27 : real;
38
	pre_u28 : real;
39
	pre_u29 : real;
40
	pre_u30 : real;
41
	pre_u31 : real;
42
	pre_u32 : real;
43
	pre_u33 : real;
44
	pre_u34 : real;
45
	pre_u35 : real;
46
	pre_u36 : real;
47
	pre_u37 : real;
48
	pre_u38 : real;
49
	pre_u39 : real;
50
	pre_u40 : real;
51
	pre_u41 : real;
52
	pre_u42 : real;
53
	pre_u43 : real;
54
	pre_u44 : real;
55
	pre_u45 : real;
56
	pre_u46 : real;
57
	pre_u47 : real;
58
	pre_u48 : real;
59
	pre_u49 : real;
60
	pre_u50 : real;
61
	pre_u51 : real;
62
	pre_u52 : real;
63
	pre_u53 : real;
64
	pre_u54 : real;
65
	pre_u55 : real;
66
	pre_u56 : real;
67
	pre_u57 : real;
68
	pre_u58 : real;
69
	pre_u59 : real;
70
	pre_u60 : real;
71
	pre_u61 : real;
72
	pre_u62 : real;
73
	pre_u63 : real;
74
	pre_u64 : real;
75
	pre_u65 : real;
76
	pre_u66 : real;
77
	pre_u67 : real;
78
	pre_u68 : real;
79
	pre_u69 : real;
80
	pre_u70 : real;
81
	pre_u71 : real;
82
	pre_u72 : real;
83
	pre_u73 : real;
84
	pre_u74 : real;
85
	pre_u75 : real;
86
	pre_u76 : real;
87
	pre_u77 : real;
88
	pre_u78 : real;
89
	pre_u79 : real;
90
	pre_u80 : real;
91
	pre_u81 : real;
92
	pre_u82 : real;
93
	pre_u83 : real;
94
	pre_u84 : real;
95
	pre_u85 : real;
96
	pre_u86 : real;
97
	pre_u87 : real;
98
	pre_u88 : real;
99
	pre_u89 : real;
100
	pre_u90 : real;
101
	pre_u91 : real;
102
	pre_u92 : real;
103
	pre_u93 : real;
104
	pre_u94 : real;
105
	pre_u95 : real;
106
	pre_u96 : real;
107
	pre_u97 : real;
108
	pre_u98 : real;
109
	pre_u99 : real;
110
	pre_u100 : real;
111
let
112
	pre_u1 = (x0 -> if enable then
113
		if reset then
114
		x0
115
	    else (pre pre_u2)
116
	    else (0.0 -> (pre pre_u1)));
117
	pre_u2 = (x0 -> if enable then
118
		if reset then
119
		x0
120
	    else (pre pre_u3)
121
	    else (0.0 -> (pre pre_u2)));
122
	pre_u3 = (x0 -> if enable then
123
		if reset then
124
		x0
125
	    else (pre pre_u4)
126
	    else (0.0 -> (pre pre_u3)));
127
	pre_u4 = (x0 -> if enable then
128
		if reset then
129
		x0
130
	    else (pre pre_u5)
131
	    else (0.0 -> (pre pre_u4)));
132
	pre_u5 = (x0 -> if enable then
133
		if reset then
134
		x0
135
	    else (pre pre_u6)
136
	    else (0.0 -> (pre pre_u5)));
137
	pre_u6 = (x0 -> if enable then
138
		if reset then
139
		x0
140
	    else (pre pre_u7)
141
	    else (0.0 -> (pre pre_u6)));
142
	pre_u7 = (x0 -> if enable then
143
		if reset then
144
		x0
145
	    else (pre pre_u8)
146
	    else (0.0 -> (pre pre_u7)));
147
	pre_u8 = (x0 -> if enable then
148
		if reset then
149
		x0
150
	    else (pre pre_u9)
151
	    else (0.0 -> (pre pre_u8)));
152
	pre_u9 = (x0 -> if enable then
153
		if reset then
154
		x0
155
	    else (pre pre_u10)
156
	    else (0.0 -> (pre pre_u9)));
157
	pre_u10 = (x0 -> if enable then
158
		if reset then
159
		x0
160
	    else (pre pre_u11)
161
	    else (0.0 -> (pre pre_u10)));
162
	pre_u11 = (x0 -> if enable then
163
		if reset then
164
		x0
165
	    else (pre pre_u12)
166
	    else (0.0 -> (pre pre_u11)));
167
	pre_u12 = (x0 -> if enable then
168
		if reset then
169
		x0
170
	    else (pre pre_u13)
171
	    else (0.0 -> (pre pre_u12)));
172
	pre_u13 = (x0 -> if enable then
173
		if reset then
174
		x0
175
	    else (pre pre_u14)
176
	    else (0.0 -> (pre pre_u13)));
177
	pre_u14 = (x0 -> if enable then
178
		if reset then
179
		x0
180
	    else (pre pre_u15)
181
	    else (0.0 -> (pre pre_u14)));
182
	pre_u15 = (x0 -> if enable then
183
		if reset then
184
		x0
185
	    else (pre pre_u16)
186
	    else (0.0 -> (pre pre_u15)));
187
	pre_u16 = (x0 -> if enable then
188
		if reset then
189
		x0
190
	    else (pre pre_u17)
191
	    else (0.0 -> (pre pre_u16)));
192
	pre_u17 = (x0 -> if enable then
193
		if reset then
194
		x0
195
	    else (pre pre_u18)
196
	    else (0.0 -> (pre pre_u17)));
197
	pre_u18 = (x0 -> if enable then
198
		if reset then
199
		x0
200
	    else (pre pre_u19)
201
	    else (0.0 -> (pre pre_u18)));
202
	pre_u19 = (x0 -> if enable then
203
		if reset then
204
		x0
205
	    else (pre pre_u20)
206
	    else (0.0 -> (pre pre_u19)));
207
	pre_u20 = (x0 -> if enable then
208
		if reset then
209
		x0
210
	    else (pre pre_u21)
211
	    else (0.0 -> (pre pre_u20)));
212
	pre_u21 = (x0 -> if enable then
213
		if reset then
214
		x0
215
	    else (pre pre_u22)
216
	    else (0.0 -> (pre pre_u21)));
217
	pre_u22 = (x0 -> if enable then
218
		if reset then
219
		x0
220
	    else (pre pre_u23)
221
	    else (0.0 -> (pre pre_u22)));
222
	pre_u23 = (x0 -> if enable then
223
		if reset then
224
		x0
225
	    else (pre pre_u24)
226
	    else (0.0 -> (pre pre_u23)));
227
	pre_u24 = (x0 -> if enable then
228
		if reset then
229
		x0
230
	    else (pre pre_u25)
231
	    else (0.0 -> (pre pre_u24)));
232
	pre_u25 = (x0 -> if enable then
233
		if reset then
234
		x0
235
	    else (pre pre_u26)
236
	    else (0.0 -> (pre pre_u25)));
237
	pre_u26 = (x0 -> if enable then
238
		if reset then
239
		x0
240
	    else (pre pre_u27)
241
	    else (0.0 -> (pre pre_u26)));
242
	pre_u27 = (x0 -> if enable then
243
		if reset then
244
		x0
245
	    else (pre pre_u28)
246
	    else (0.0 -> (pre pre_u27)));
247
	pre_u28 = (x0 -> if enable then
248
		if reset then
249
		x0
250
	    else (pre pre_u29)
251
	    else (0.0 -> (pre pre_u28)));
252
	pre_u29 = (x0 -> if enable then
253
		if reset then
254
		x0
255
	    else (pre pre_u30)
256
	    else (0.0 -> (pre pre_u29)));
257
	pre_u30 = (x0 -> if enable then
258
		if reset then
259
		x0
260
	    else (pre pre_u31)
261
	    else (0.0 -> (pre pre_u30)));
262
	pre_u31 = (x0 -> if enable then
263
		if reset then
264
		x0
265
	    else (pre pre_u32)
266
	    else (0.0 -> (pre pre_u31)));
267
	pre_u32 = (x0 -> if enable then
268
		if reset then
269
		x0
270
	    else (pre pre_u33)
271
	    else (0.0 -> (pre pre_u32)));
272
	pre_u33 = (x0 -> if enable then
273
		if reset then
274
		x0
275
	    else (pre pre_u34)
276
	    else (0.0 -> (pre pre_u33)));
277
	pre_u34 = (x0 -> if enable then
278
		if reset then
279
		x0
280
	    else (pre pre_u35)
281
	    else (0.0 -> (pre pre_u34)));
282
	pre_u35 = (x0 -> if enable then
283
		if reset then
284
		x0
285
	    else (pre pre_u36)
286
	    else (0.0 -> (pre pre_u35)));
287
	pre_u36 = (x0 -> if enable then
288
		if reset then
289
		x0
290
	    else (pre pre_u37)
291
	    else (0.0 -> (pre pre_u36)));
292
	pre_u37 = (x0 -> if enable then
293
		if reset then
294
		x0
295
	    else (pre pre_u38)
296
	    else (0.0 -> (pre pre_u37)));
297
	pre_u38 = (x0 -> if enable then
298
		if reset then
299
		x0
300
	    else (pre pre_u39)
301
	    else (0.0 -> (pre pre_u38)));
302
	pre_u39 = (x0 -> if enable then
303
		if reset then
304
		x0
305
	    else (pre pre_u40)
306
	    else (0.0 -> (pre pre_u39)));
307
	pre_u40 = (x0 -> if enable then
308
		if reset then
309
		x0
310
	    else (pre pre_u41)
311
	    else (0.0 -> (pre pre_u40)));
312
	pre_u41 = (x0 -> if enable then
313
		if reset then
314
		x0
315
	    else (pre pre_u42)
316
	    else (0.0 -> (pre pre_u41)));
317
	pre_u42 = (x0 -> if enable then
318
		if reset then
319
		x0
320
	    else (pre pre_u43)
321
	    else (0.0 -> (pre pre_u42)));
322
	pre_u43 = (x0 -> if enable then
323
		if reset then
324
		x0
325
	    else (pre pre_u44)
326
	    else (0.0 -> (pre pre_u43)));
327
	pre_u44 = (x0 -> if enable then
328
		if reset then
329
		x0
330
	    else (pre pre_u45)
331
	    else (0.0 -> (pre pre_u44)));
332
	pre_u45 = (x0 -> if enable then
333
		if reset then
334
		x0
335
	    else (pre pre_u46)
336
	    else (0.0 -> (pre pre_u45)));
337
	pre_u46 = (x0 -> if enable then
338
		if reset then
339
		x0
340
	    else (pre pre_u47)
341
	    else (0.0 -> (pre pre_u46)));
342
	pre_u47 = (x0 -> if enable then
343
		if reset then
344
		x0
345
	    else (pre pre_u48)
346
	    else (0.0 -> (pre pre_u47)));
347
	pre_u48 = (x0 -> if enable then
348
		if reset then
349
		x0
350
	    else (pre pre_u49)
351
	    else (0.0 -> (pre pre_u48)));
352
	pre_u49 = (x0 -> if enable then
353
		if reset then
354
		x0
355
	    else (pre pre_u50)
356
	    else (0.0 -> (pre pre_u49)));
357
	pre_u50 = (x0 -> if enable then
358
		if reset then
359
		x0
360
	    else (pre pre_u51)
361
	    else (0.0 -> (pre pre_u50)));
362
	pre_u51 = (x0 -> if enable then
363
		if reset then
364
		x0
365
	    else (pre pre_u52)
366
	    else (0.0 -> (pre pre_u51)));
367
	pre_u52 = (x0 -> if enable then
368
		if reset then
369
		x0
370
	    else (pre pre_u53)
371
	    else (0.0 -> (pre pre_u52)));
372
	pre_u53 = (x0 -> if enable then
373
		if reset then
374
		x0
375
	    else (pre pre_u54)
376
	    else (0.0 -> (pre pre_u53)));
377
	pre_u54 = (x0 -> if enable then
378
		if reset then
379
		x0
380
	    else (pre pre_u55)
381
	    else (0.0 -> (pre pre_u54)));
382
	pre_u55 = (x0 -> if enable then
383
		if reset then
384
		x0
385
	    else (pre pre_u56)
386
	    else (0.0 -> (pre pre_u55)));
387
	pre_u56 = (x0 -> if enable then
388
		if reset then
389
		x0
390
	    else (pre pre_u57)
391
	    else (0.0 -> (pre pre_u56)));
392
	pre_u57 = (x0 -> if enable then
393
		if reset then
394
		x0
395
	    else (pre pre_u58)
396
	    else (0.0 -> (pre pre_u57)));
397
	pre_u58 = (x0 -> if enable then
398
		if reset then
399
		x0
400
	    else (pre pre_u59)
401
	    else (0.0 -> (pre pre_u58)));
402
	pre_u59 = (x0 -> if enable then
403
		if reset then
404
		x0
405
	    else (pre pre_u60)
406
	    else (0.0 -> (pre pre_u59)));
407
	pre_u60 = (x0 -> if enable then
408
		if reset then
409
		x0
410
	    else (pre pre_u61)
411
	    else (0.0 -> (pre pre_u60)));
412
	pre_u61 = (x0 -> if enable then
413
		if reset then
414
		x0
415
	    else (pre pre_u62)
416
	    else (0.0 -> (pre pre_u61)));
417
	pre_u62 = (x0 -> if enable then
418
		if reset then
419
		x0
420
	    else (pre pre_u63)
421
	    else (0.0 -> (pre pre_u62)));
422
	pre_u63 = (x0 -> if enable then
423
		if reset then
424
		x0
425
	    else (pre pre_u64)
426
	    else (0.0 -> (pre pre_u63)));
427
	pre_u64 = (x0 -> if enable then
428
		if reset then
429
		x0
430
	    else (pre pre_u65)
431
	    else (0.0 -> (pre pre_u64)));
432
	pre_u65 = (x0 -> if enable then
433
		if reset then
434
		x0
435
	    else (pre pre_u66)
436
	    else (0.0 -> (pre pre_u65)));
437
	pre_u66 = (x0 -> if enable then
438
		if reset then
439
		x0
440
	    else (pre pre_u67)
441
	    else (0.0 -> (pre pre_u66)));
442
	pre_u67 = (x0 -> if enable then
443
		if reset then
444
		x0
445
	    else (pre pre_u68)
446
	    else (0.0 -> (pre pre_u67)));
447
	pre_u68 = (x0 -> if enable then
448
		if reset then
449
		x0
450
	    else (pre pre_u69)
451
	    else (0.0 -> (pre pre_u68)));
452
	pre_u69 = (x0 -> if enable then
453
		if reset then
454
		x0
455
	    else (pre pre_u70)
456
	    else (0.0 -> (pre pre_u69)));
457
	pre_u70 = (x0 -> if enable then
458
		if reset then
459
		x0
460
	    else (pre pre_u71)
461
	    else (0.0 -> (pre pre_u70)));
462
	pre_u71 = (x0 -> if enable then
463
		if reset then
464
		x0
465
	    else (pre pre_u72)
466
	    else (0.0 -> (pre pre_u71)));
467
	pre_u72 = (x0 -> if enable then
468
		if reset then
469
		x0
470
	    else (pre pre_u73)
471
	    else (0.0 -> (pre pre_u72)));
472
	pre_u73 = (x0 -> if enable then
473
		if reset then
474
		x0
475
	    else (pre pre_u74)
476
	    else (0.0 -> (pre pre_u73)));
477
	pre_u74 = (x0 -> if enable then
478
		if reset then
479
		x0
480
	    else (pre pre_u75)
481
	    else (0.0 -> (pre pre_u74)));
482
	pre_u75 = (x0 -> if enable then
483
		if reset then
484
		x0
485
	    else (pre pre_u76)
486
	    else (0.0 -> (pre pre_u75)));
487
	pre_u76 = (x0 -> if enable then
488
		if reset then
489
		x0
490
	    else (pre pre_u77)
491
	    else (0.0 -> (pre pre_u76)));
492
	pre_u77 = (x0 -> if enable then
493
		if reset then
494
		x0
495
	    else (pre pre_u78)
496
	    else (0.0 -> (pre pre_u77)));
497
	pre_u78 = (x0 -> if enable then
498
		if reset then
499
		x0
500
	    else (pre pre_u79)
501
	    else (0.0 -> (pre pre_u78)));
502
	pre_u79 = (x0 -> if enable then
503
		if reset then
504
		x0
505
	    else (pre pre_u80)
506
	    else (0.0 -> (pre pre_u79)));
507
	pre_u80 = (x0 -> if enable then
508
		if reset then
509
		x0
510
	    else (pre pre_u81)
511
	    else (0.0 -> (pre pre_u80)));
512
	pre_u81 = (x0 -> if enable then
513
		if reset then
514
		x0
515
	    else (pre pre_u82)
516
	    else (0.0 -> (pre pre_u81)));
517
	pre_u82 = (x0 -> if enable then
518
		if reset then
519
		x0
520
	    else (pre pre_u83)
521
	    else (0.0 -> (pre pre_u82)));
522
	pre_u83 = (x0 -> if enable then
523
		if reset then
524
		x0
525
	    else (pre pre_u84)
526
	    else (0.0 -> (pre pre_u83)));
527
	pre_u84 = (x0 -> if enable then
528
		if reset then
529
		x0
530
	    else (pre pre_u85)
531
	    else (0.0 -> (pre pre_u84)));
532
	pre_u85 = (x0 -> if enable then
533
		if reset then
534
		x0
535
	    else (pre pre_u86)
536
	    else (0.0 -> (pre pre_u85)));
537
	pre_u86 = (x0 -> if enable then
538
		if reset then
539
		x0
540
	    else (pre pre_u87)
541
	    else (0.0 -> (pre pre_u86)));
542
	pre_u87 = (x0 -> if enable then
543
		if reset then
544
		x0
545
	    else (pre pre_u88)
546
	    else (0.0 -> (pre pre_u87)));
547
	pre_u88 = (x0 -> if enable then
548
		if reset then
549
		x0
550
	    else (pre pre_u89)
551
	    else (0.0 -> (pre pre_u88)));
552
	pre_u89 = (x0 -> if enable then
553
		if reset then
554
		x0
555
	    else (pre pre_u90)
556
	    else (0.0 -> (pre pre_u89)));
557
	pre_u90 = (x0 -> if enable then
558
		if reset then
559
		x0
560
	    else (pre pre_u91)
561
	    else (0.0 -> (pre pre_u90)));
562
	pre_u91 = (x0 -> if enable then
563
		if reset then
564
		x0
565
	    else (pre pre_u92)
566
	    else (0.0 -> (pre pre_u91)));
567
	pre_u92 = (x0 -> if enable then
568
		if reset then
569
		x0
570
	    else (pre pre_u93)
571
	    else (0.0 -> (pre pre_u92)));
572
	pre_u93 = (x0 -> if enable then
573
		if reset then
574
		x0
575
	    else (pre pre_u94)
576
	    else (0.0 -> (pre pre_u93)));
577
	pre_u94 = (x0 -> if enable then
578
		if reset then
579
		x0
580
	    else (pre pre_u95)
581
	    else (0.0 -> (pre pre_u94)));
582
	pre_u95 = (x0 -> if enable then
583
		if reset then
584
		x0
585
	    else (pre pre_u96)
586
	    else (0.0 -> (pre pre_u95)));
587
	pre_u96 = (x0 -> if enable then
588
		if reset then
589
		x0
590
	    else (pre pre_u97)
591
	    else (0.0 -> (pre pre_u96)));
592
	pre_u97 = (x0 -> if enable then
593
		if reset then
594
		x0
595
	    else (pre pre_u98)
596
	    else (0.0 -> (pre pre_u97)));
597
	pre_u98 = (x0 -> if enable then
598
		if reset then
599
		x0
600
	    else (pre pre_u99)
601
	    else (0.0 -> (pre pre_u98)));
602
	pre_u99 = (x0 -> if enable then
603
		if reset then
604
		x0
605
	    else (pre pre_u100)
606
	    else (0.0 -> (pre pre_u99)));
607
	pre_u100 = (x0 -> if enable then
608
		if reset then
609
		x0
610
	    else (pre u)
611
	    else (0.0 -> (pre pre_u100)));
612
	pre_u = if enable then
613
		if (d < 1) then
614
		u
615
	    else if (d > 100) then
616
		pre_u1
617
	    else if (d = 1) then
618
		pre_u100
619
	    else if (d = 2) then
620
		pre_u99
621
	    else if (d = 3) then
622
		pre_u98
623
	    else if (d = 4) then
624
		pre_u97
625
	    else if (d = 5) then
626
		pre_u96
627
	    else if (d = 6) then
628
		pre_u95
629
	    else if (d = 7) then
630
		pre_u94
631
	    else if (d = 8) then
632
		pre_u93
633
	    else if (d = 9) then
634
		pre_u92
635
	    else if (d = 10) then
636
		pre_u91
637
	    else if (d = 11) then
638
		pre_u90
639
	    else if (d = 12) then
640
		pre_u89
641
	    else if (d = 13) then
642
		pre_u88
643
	    else if (d = 14) then
644
		pre_u87
645
	    else if (d = 15) then
646
		pre_u86
647
	    else if (d = 16) then
648
		pre_u85
649
	    else if (d = 17) then
650
		pre_u84
651
	    else if (d = 18) then
652
		pre_u83
653
	    else if (d = 19) then
654
		pre_u82
655
	    else if (d = 20) then
656
		pre_u81
657
	    else if (d = 21) then
658
		pre_u80
659
	    else if (d = 22) then
660
		pre_u79
661
	    else if (d = 23) then
662
		pre_u78
663
	    else if (d = 24) then
664
		pre_u77
665
	    else if (d = 25) then
666
		pre_u76
667
	    else if (d = 26) then
668
		pre_u75
669
	    else if (d = 27) then
670
		pre_u74
671
	    else if (d = 28) then
672
		pre_u73
673
	    else if (d = 29) then
674
		pre_u72
675
	    else if (d = 30) then
676
		pre_u71
677
	    else if (d = 31) then
678
		pre_u70
679
	    else if (d = 32) then
680
		pre_u69
681
	    else if (d = 33) then
682
		pre_u68
683
	    else if (d = 34) then
684
		pre_u67
685
	    else if (d = 35) then
686
		pre_u66
687
	    else if (d = 36) then
688
		pre_u65
689
	    else if (d = 37) then
690
		pre_u64
691
	    else if (d = 38) then
692
		pre_u63
693
	    else if (d = 39) then
694
		pre_u62
695
	    else if (d = 40) then
696
		pre_u61
697
	    else if (d = 41) then
698
		pre_u60
699
	    else if (d = 42) then
700
		pre_u59
701
	    else if (d = 43) then
702
		pre_u58
703
	    else if (d = 44) then
704
		pre_u57
705
	    else if (d = 45) then
706
		pre_u56
707
	    else if (d = 46) then
708
		pre_u55
709
	    else if (d = 47) then
710
		pre_u54
711
	    else if (d = 48) then
712
		pre_u53
713
	    else if (d = 49) then
714
		pre_u52
715
	    else if (d = 50) then
716
		pre_u51
717
	    else if (d = 51) then
718
		pre_u50
719
	    else if (d = 52) then
720
		pre_u49
721
	    else if (d = 53) then
722
		pre_u48
723
	    else if (d = 54) then
724
		pre_u47
725
	    else if (d = 55) then
726
		pre_u46
727
	    else if (d = 56) then
728
		pre_u45
729
	    else if (d = 57) then
730
		pre_u44
731
	    else if (d = 58) then
732
		pre_u43
733
	    else if (d = 59) then
734
		pre_u42
735
	    else if (d = 60) then
736
		pre_u41
737
	    else if (d = 61) then
738
		pre_u40
739
	    else if (d = 62) then
740
		pre_u39
741
	    else if (d = 63) then
742
		pre_u38
743
	    else if (d = 64) then
744
		pre_u37
745
	    else if (d = 65) then
746
		pre_u36
747
	    else if (d = 66) then
748
		pre_u35
749
	    else if (d = 67) then
750
		pre_u34
751
	    else if (d = 68) then
752
		pre_u33
753
	    else if (d = 69) then
754
		pre_u32
755
	    else if (d = 70) then
756
		pre_u31
757
	    else if (d = 71) then
758
		pre_u30
759
	    else if (d = 72) then
760
		pre_u29
761
	    else if (d = 73) then
762
		pre_u28
763
	    else if (d = 74) then
764
		pre_u27
765
	    else if (d = 75) then
766
		pre_u26
767
	    else if (d = 76) then
768
		pre_u25
769
	    else if (d = 77) then
770
		pre_u24
771
	    else if (d = 78) then
772
		pre_u23
773
	    else if (d = 79) then
774
		pre_u22
775
	    else if (d = 80) then
776
		pre_u21
777
	    else if (d = 81) then
778
		pre_u20
779
	    else if (d = 82) then
780
		pre_u19
781
	    else if (d = 83) then
782
		pre_u18
783
	    else if (d = 84) then
784
		pre_u17
785
	    else if (d = 85) then
786
		pre_u16
787
	    else if (d = 86) then
788
		pre_u15
789
	    else if (d = 87) then
790
		pre_u14
791
	    else if (d = 88) then
792
		pre_u13
793
	    else if (d = 89) then
794
		pre_u12
795
	    else if (d = 90) then
796
		pre_u11
797
	    else if (d = 91) then
798
		pre_u10
799
	    else if (d = 92) then
800
		pre_u9
801
	    else if (d = 93) then
802
		pre_u8
803
	    else if (d = 94) then
804
		pre_u7
805
	    else if (d = 95) then
806
		pre_u6
807
	    else if (d = 96) then
808
		pre_u5
809
	    else if (d = 97) then
810
		pre_u4
811
	    else if (d = 98) then
812
		pre_u3
813
	    else if (d = 99) then
814
		pre_u2
815
	    else if (d = 100) then
816
		pre_u1
817
	    else x0
818
	    else (0.0 -> (pre pre_u));
819
tel
820
821
(*
822
Original block name: Delay5_PP
823
*)
824
node  Delay5_PP(U_1 : real;
825
	U_2 : real;
826
	Enable_1 : real;
827
	Reset_1 : bool;
828
	x0_1 : real;
829
	d_1 : int;)
830
returns(Out5_1 : real;
831
	Out5_2 : real;);
832
var Delay1_1 : real;
833
	Delay1_2 : real;
834
	Reset_Delay1_31_064 : bool;
835
	U_1_Delay1_31_064 : real;
836
	U_2_Delay1_31_064 : real;
837
	__time_step : real;
838
	__nb_step : int;
839
let
840
	Reset_Delay1_31_064 = (false -> ((not Reset_1) and (pre Reset_1)));
841
	U_1_Delay1_31_064 = if (Enable_1 > 0.0) then
842
		U_1
843
	    else (x0_1 -> (pre U_1_Delay1_31_064));
844
	U_2_Delay1_31_064 = if (Enable_1 > 0.0) then
845
		U_2
846
	    else (x0_1 -> (pre U_2_Delay1_31_064));
847
	Delay1_1 = Delay_Delay1_31_064(U_1_Delay1_31_064, x0_1, d_1, Reset_Delay1_31_064, (Enable_1 > 0.0));
848
	Delay1_2 = Delay_Delay1_31_064(U_2_Delay1_31_064, x0_1, d_1, Reset_Delay1_31_064, (Enable_1 > 0.0));
849
	Out5_1 = Delay1_1;
850
	Out5_2 = Delay1_2;
851
	__time_step = (0.0 -> ((pre __time_step) + 0.200000000000000));
852
	__nb_step = (0 -> ((pre __nb_step) + 1));
853
tel