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lustrec-tests / regression_tests / lustre_files / success / Simulink / src_many_files / if_multi_test_PP.LUSTREC.lus @ b58cc410

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-- This file has been generated by CoCoSim2.
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-- Compiler: Lustre compiler 2 (nasa_toLustre.ToLustre.m)
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-- Time: 19-Mar-2019 21:17:11
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(*
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Original block name: if_multi_test_PP/IfActionSubsystem4
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*)
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node  IfActionSubsystem4_9_015_condExecSS(In2_1 : real;
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	In2_2 : real;
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	In2_3 : real;
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	In3_1 : bool;
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	_isEnabled : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out2_1 : bool;
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	Out2_2 : bool;
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	Out2_3 : bool;
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	Out3_1 : real;
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	Out3_2 : real;
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	Out3_3 : real;
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	Out4_1 : bool;
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	Out4_2 : bool;
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	Out4_3 : bool;);
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var pre_Out2_1 : bool;
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	pre_Out2_2 : bool;
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	pre_Out2_3 : bool;
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	pre_Out3_1 : real;
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	pre_Out3_2 : real;
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	pre_Out3_3 : real;
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	pre_Out4_1 : bool;
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	pre_Out4_2 : bool;
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	pre_Out4_3 : bool;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out2_1 = if (__nb_step > 0) then
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		(pre Out2_1)
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	    else false;
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	pre_Out2_2 = if (__nb_step > 0) then
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		(pre Out2_2)
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	    else false;
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	pre_Out2_3 = if (__nb_step > 0) then
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		(pre Out2_3)
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	    else false;
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	pre_Out3_1 = if (__nb_step > 0) then
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		(pre Out3_1)
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	    else 0.0;
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	pre_Out3_2 = if (__nb_step > 0) then
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		(pre Out3_2)
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	    else 0.0;
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	pre_Out3_3 = if (__nb_step > 0) then
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		(pre Out3_3)
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	    else 0.0;
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	pre_Out4_1 = if (__nb_step > 0) then
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		(pre Out4_1)
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	    else false;
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	pre_Out4_2 = if (__nb_step > 0) then
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		(pre Out4_2)
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	    else false;
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	pre_Out4_3 = if (__nb_step > 0) then
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		(pre Out4_3)
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	    else false;
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	_isEnabled_clock = _isEnabled;
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	(Out2_1, Out2_2, Out2_3, Out3_1, Out3_2, Out3_3, Out4_1, Out4_2, Out4_3) = (merge _isEnabled_clock 
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		(true -> IfActionSubsystem4_9_015((In2_1 when _isEnabled_clock), (In2_2 when _isEnabled_clock), (In2_3 when _isEnabled_clock), (In3_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
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		(false -> (pre_Out2_1, pre_Out2_2, pre_Out2_3, pre_Out3_1, pre_Out3_2, pre_Out3_3, pre_Out4_1, pre_Out4_2, pre_Out4_3) when false(_isEnabled_clock)));
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tel
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(*
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Original block name: if_multi_test_PP/IfActionSubsystem4
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*)
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node  IfActionSubsystem4_9_015(In2_1 : real;
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	In2_2 : real;
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	In2_3 : real;
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	In3_1 : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out2_1 : bool;
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	Out2_2 : bool;
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	Out2_3 : bool;
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	Out3_1 : real;
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	Out3_2 : real;
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	Out3_3 : real;
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	Out4_1 : bool;
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	Out4_2 : bool;
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	Out4_3 : bool;);
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var LogicalOperator_1 : bool;
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	LogicalOperator_2 : bool;
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	LogicalOperator_3 : bool;
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	RelationalOperator_1 : bool;
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	RelationalOperator_2 : bool;
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	RelationalOperator_3 : bool;
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let
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	LogicalOperator_1 = ( RelationalOperator_1 and In3_1 );
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	LogicalOperator_2 = ( RelationalOperator_2 and In3_1 );
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	LogicalOperator_3 = ( RelationalOperator_3 and In3_1 );
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	RelationalOperator_1 = (In2_1 <= In2_1);
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	RelationalOperator_2 = (In2_2 <= In2_2);
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	RelationalOperator_3 = (In2_3 <= In2_3);
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	Out2_1 = RelationalOperator_1;
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	Out2_2 = RelationalOperator_2;
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	Out2_3 = RelationalOperator_3;
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	Out3_1 = In2_1;
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	Out3_2 = In2_2;
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	Out3_3 = In2_3;
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	Out4_1 = LogicalOperator_1;
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	Out4_2 = LogicalOperator_2;
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	Out4_3 = LogicalOperator_3;
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tel
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(*
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Original block name: if_multi_test_PP/IfActionSubsystem5
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*)
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node  IfActionSubsystem5_28_018_condExecSS(In1_1 : real;
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	In1_2 : real;
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	In1_3 : real;
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	_isEnabled : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out1_2 : real;
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	Out1_3 : real;);
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var pre_Out1_1 : real;
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	pre_Out1_2 : real;
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	pre_Out1_3 : real;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	pre_Out1_2 = if (__nb_step > 0) then
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		(pre Out1_2)
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	    else 0.0;
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	pre_Out1_3 = if (__nb_step > 0) then
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		(pre Out1_3)
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	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	(Out1_1, Out1_2, Out1_3) = (merge _isEnabled_clock 
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		(true -> IfActionSubsystem5_28_018((In1_1 when _isEnabled_clock), (In1_2 when _isEnabled_clock), (In1_3 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
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		(false -> (pre_Out1_1, pre_Out1_2, pre_Out1_3) when false(_isEnabled_clock)));
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tel
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(*
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Original block name: if_multi_test_PP/IfActionSubsystem5
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*)
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node  IfActionSubsystem5_28_018(In1_1 : real;
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	In1_2 : real;
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	In1_3 : real;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out1_2 : real;
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	Out1_3 : real;);
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let
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	Out1_1 = In1_1;
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	Out1_2 = In1_2;
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	Out1_3 = In1_3;
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tel
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(*
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Original block name: if_multi_test_PP/IfActionSubsystem6
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*)
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node  IfActionSubsystem6_33_026_condExecSS(In1_1 : bool;
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	_isEnabled : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : bool;);
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var pre_Out1_1 : bool;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else false;
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	_isEnabled_clock = _isEnabled;
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	Out1_1 = (merge _isEnabled_clock 
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		(true -> IfActionSubsystem6_33_026((In1_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
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		(false -> (pre_Out1_1) when false(_isEnabled_clock)));
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tel
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(*
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Original block name: if_multi_test_PP/IfActionSubsystem6
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*)
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node  IfActionSubsystem6_33_026(In1_1 : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : bool;);
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let
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	Out1_1 = In1_1;
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tel
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(*
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Original block name: if_multi_test_PP/IfActionSubsystem7
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*)
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node  IfActionSubsystem7_38_022_condExecSS(In1_1 : real;
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	In1_2 : real;
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	In1_3 : real;
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	In1_4 : real;
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	_isEnabled : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out1_2 : real;
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	Out1_3 : real;
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	Out1_4 : real;);
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var pre_Out1_1 : real;
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	pre_Out1_2 : real;
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	pre_Out1_3 : real;
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	pre_Out1_4 : real;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	pre_Out1_2 = if (__nb_step > 0) then
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		(pre Out1_2)
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	    else 0.0;
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	pre_Out1_3 = if (__nb_step > 0) then
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		(pre Out1_3)
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	    else 0.0;
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	pre_Out1_4 = if (__nb_step > 0) then
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		(pre Out1_4)
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	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	(Out1_1, Out1_2, Out1_3, Out1_4) = (merge _isEnabled_clock 
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		(true -> IfActionSubsystem7_38_022((In1_1 when _isEnabled_clock), (In1_2 when _isEnabled_clock), (In1_3 when _isEnabled_clock), (In1_4 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
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		(false -> (pre_Out1_1, pre_Out1_2, pre_Out1_3, pre_Out1_4) when false(_isEnabled_clock)));
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tel
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(*
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Original block name: if_multi_test_PP/IfActionSubsystem7
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*)
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node  IfActionSubsystem7_38_022(In1_1 : real;
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	In1_2 : real;
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	In1_3 : real;
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	In1_4 : real;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out1_2 : real;
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	Out1_3 : real;
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	Out1_4 : real;);
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let
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	Out1_1 = In1_1;
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	Out1_2 = In1_2;
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	Out1_3 = In1_3;
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	Out1_4 = In1_4;
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tel
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(*
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Original block name: if_multi_test_PP
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*)
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node  if_multi_test_PP(In3_1 : real;
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	In3_2 : real;
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	In3_3 : real;
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	In4_1 : bool;
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	In5_1 : real;
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	In5_2 : real;
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	In5_3 : real;
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	In5_4 : real;)
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returns(Out5_1 : bool;
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	Out5_2 : bool;
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	Out5_3 : bool;
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	Out6_1 : real;
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	Out6_2 : real;
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	Out6_3 : real;
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	Out7_1 : real;
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	Out7_2 : real;
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	Out7_3 : real;
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	Out8_1 : bool;
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	Out8_2 : bool;
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	Out8_3 : bool;
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	Out9_1 : bool;
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	Out10_1 : real;
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	Out10_2 : real;
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	Out10_3 : real;
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	Out10_4 : real;);
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var If1_1 : bool;
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	If1_2 : bool;
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	If1_3 : bool;
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	If1_4 : bool;
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	ExecutionCond_of_IfActionSubsystem4_9_015 : bool;
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	IfActionSubsystem4_1 : bool;
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	IfActionSubsystem4_2 : bool;
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	IfActionSubsystem4_3 : bool;
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	IfActionSubsystem4_4 : real;
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	IfActionSubsystem4_5 : real;
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	IfActionSubsystem4_6 : real;
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	IfActionSubsystem4_7 : bool;
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	IfActionSubsystem4_8 : bool;
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	IfActionSubsystem4_9 : bool;
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	ExecutionCond_of_IfActionSubsystem5_28_018 : bool;
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	IfActionSubsystem5_1 : real;
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	IfActionSubsystem5_2 : real;
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	IfActionSubsystem5_3 : real;
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	ExecutionCond_of_IfActionSubsystem6_33_026 : bool;
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	IfActionSubsystem6_1 : bool;
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	ExecutionCond_of_IfActionSubsystem7_38_022 : bool;
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	IfActionSubsystem7_1 : real;
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	IfActionSubsystem7_2 : real;
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	IfActionSubsystem7_3 : real;
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	IfActionSubsystem7_4 : real;
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	__time_step : real;
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	__nb_step : int;
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let
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	(If1_1, If1_2, If1_3, If1_4) = if In3_2 = 0.0 then
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		(true, false, false, false)
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	    else if In5_2 < 3.0 then
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		(false, true, false, false)
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	    else if ( - In5_1 > In3_3 ) and In5_2 > 0.0 then
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		(false, false, true, false)
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	    else (false, false, false, true);
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	ExecutionCond_of_IfActionSubsystem4_9_015 = If1_1;
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	(IfActionSubsystem4_1, IfActionSubsystem4_2, IfActionSubsystem4_3, IfActionSubsystem4_4, IfActionSubsystem4_5, IfActionSubsystem4_6, IfActionSubsystem4_7, IfActionSubsystem4_8, IfActionSubsystem4_9) = IfActionSubsystem4_9_015_condExecSS(In3_1, In3_2, In3_3, In4_1, ExecutionCond_of_IfActionSubsystem4_9_015, __time_step, __nb_step);
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	ExecutionCond_of_IfActionSubsystem5_28_018 = If1_4;
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	(IfActionSubsystem5_1, IfActionSubsystem5_2, IfActionSubsystem5_3) = IfActionSubsystem5_28_018_condExecSS(In3_1, In3_2, In3_3, ExecutionCond_of_IfActionSubsystem5_28_018, __time_step, __nb_step);
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	ExecutionCond_of_IfActionSubsystem6_33_026 = If1_2;
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	IfActionSubsystem6_1 = IfActionSubsystem6_33_026_condExecSS(In4_1, ExecutionCond_of_IfActionSubsystem6_33_026, __time_step, __nb_step);
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	ExecutionCond_of_IfActionSubsystem7_38_022 = If1_3;
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	(IfActionSubsystem7_1, IfActionSubsystem7_2, IfActionSubsystem7_3, IfActionSubsystem7_4) = IfActionSubsystem7_38_022_condExecSS(In5_1, In5_2, In5_3, In5_4, ExecutionCond_of_IfActionSubsystem7_38_022, __time_step, __nb_step);
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	Out5_1 = IfActionSubsystem4_1;
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	Out5_2 = IfActionSubsystem4_2;
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	Out5_3 = IfActionSubsystem4_3;
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	Out6_1 = IfActionSubsystem5_1;
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	Out6_2 = IfActionSubsystem5_2;
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	Out6_3 = IfActionSubsystem5_3;
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	Out7_1 = IfActionSubsystem4_4;
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	Out7_2 = IfActionSubsystem4_5;
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	Out7_3 = IfActionSubsystem4_6;
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	Out8_1 = IfActionSubsystem4_7;
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	Out8_2 = IfActionSubsystem4_8;
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	Out8_3 = IfActionSubsystem4_9;
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	Out9_1 = IfActionSubsystem6_1;
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	Out10_1 = IfActionSubsystem7_1;
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	Out10_2 = IfActionSubsystem7_2;
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	Out10_3 = IfActionSubsystem7_3;
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	Out10_4 = IfActionSubsystem7_4;
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	__time_step = (0.0 -> ((pre __time_step) + 0.020));
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	__nb_step = (0 -> ((pre __nb_step) + 1));
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tel
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