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lustrec-tests / regression_tests / lustre_files / success / Simulink / src_many_files / enable_test1_PP.LUSTREC.lus @ b58cc410

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-- This file has been generated by CoCoSim2.
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-- Compiler: Lustre compiler 2 (nasa_toLustre.ToLustre.m)
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-- Time: 20-Mar-2019 13:43:36
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(*
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Original block name: enable_test1_PP/Enabledheld
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*)
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node  Enabledheld_33_566_condExecSS(In1_1 : real;
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	_isEnabled : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;);
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var pre_Out1_1 : real;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	Out1_1 = (merge _isEnabled_clock 
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		(true -> Enabledheld_33_566((In1_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
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		(false -> (pre_Out1_1) when false(_isEnabled_clock)));
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(*
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Original block name: enable_test1_PP/Enabledheld
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*)
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node  Enabledheld_33_566(In1_1 : real;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;);
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let
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	Out1_1 = In1_1;
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(*
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Original block name: enable_test1_PP/Enabledheld2
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*)
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node  Enabledheld2_48_394_condExecSS(In1_1 : real;
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	In1_2 : real;
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	_isEnabled : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out1_2 : real;);
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var pre_Out1_1 : real;
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	pre_Out1_2 : real;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	pre_Out1_2 = if (__nb_step > 0) then
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		(pre Out1_2)
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	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	(Out1_1, Out1_2) = (merge _isEnabled_clock 
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		(true -> Enabledheld2_48_394((In1_1 when _isEnabled_clock), (In1_2 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
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		(false -> (pre_Out1_1, pre_Out1_2) when false(_isEnabled_clock)));
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(*
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Original block name: enable_test1_PP/Enabledheld2
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*)
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node  Enabledheld2_48_394(In1_1 : real;
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	In1_2 : real;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out1_2 : real;);
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let
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	Out1_1 = In1_1;
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	Out1_2 = In1_2;
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(*
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Original block name: enable_test1_PP/Enabledreset
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*)
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node  Enabledreset_60_518_condExecSS(In1_1 : real;
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	_isEnabled : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;);
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var pre_Out1_1 : real;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	Out1_1 = (merge _isEnabled_clock 
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		(true -> (Enabledreset_60_518((In1_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock)) every (false -> (_isEnabled_clock and (not (pre _isEnabled_clock)))))) 
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		(false -> (pre_Out1_1) when false(_isEnabled_clock)));
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(*
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Original block name: enable_test1_PP/Enabledreset
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*)
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node  Enabledreset_60_518(In1_1 : real;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;);
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let
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	Out1_1 = In1_1;
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(*
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Original block name: enable_test1_PP/Enabledreset2
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*)
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node  Enabledreset2_70_790_condExecSS(In1_1 : real;
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	In1_2 : real;
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	_isEnabled : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out1_2 : real;);
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var pre_Out1_1 : real;
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	pre_Out1_2 : real;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	pre_Out1_2 = if (__nb_step > 0) then
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		(pre Out1_2)
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	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	(Out1_1, Out1_2) = (merge _isEnabled_clock 
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		(true -> (Enabledreset2_70_790((In1_1 when _isEnabled_clock), (In1_2 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock)) every (false -> (_isEnabled_clock and (not (pre _isEnabled_clock)))))) 
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		(false -> (pre_Out1_1, pre_Out1_2) when false(_isEnabled_clock)));
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(*
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Original block name: enable_test1_PP/Enabledreset2
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*)
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node  Enabledreset2_70_790(In1_1 : real;
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	In1_2 : real;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out1_2 : real;);
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let
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	Out1_1 = In1_1;
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	Out1_2 = In1_2;
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(*
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Original block name: enable_test1_PP
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*)
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node  enable_test1_PP(In2_1 : bool;
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	In1_1 : real;
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	In3_1 : bool;
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	In4_1 : real;
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	In4_2 : real;
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	In5_1 : bool;
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	In6_1 : real;
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	In7_1 : int;
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	In8_1 : real;
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	In8_2 : real;)
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returns(Out3_1 : real;
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	Out1_1 : real;
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	Out1_2 : real;
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	Out2_1 : real;
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	Out4_1 : real;
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	Out4_2 : real;);
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var ExecutionCond_of_Enabledheld_33_566 : bool;
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	Enabledheld_1 : real;
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	ExecutionCond_of_Enabledheld2_48_394 : bool;
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	Enabledheld2_1 : real;
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	Enabledheld2_2 : real;
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	ExecutionCond_of_Enabledreset_60_518 : bool;
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	Enabledreset_1 : real;
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	ExecutionCond_of_Enabledreset2_70_790 : bool;
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	Enabledreset2_1 : real;
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	Enabledreset2_2 : real;
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	__time_step : real;
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	__nb_step : int;
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let
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	ExecutionCond_of_Enabledheld_33_566 = In2_1;
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	Enabledheld_1 = Enabledheld_33_566_condExecSS(In1_1, ExecutionCond_of_Enabledheld_33_566, __time_step, __nb_step);
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	ExecutionCond_of_Enabledheld2_48_394 = In3_1;
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	(Enabledheld2_1, Enabledheld2_2) = Enabledheld2_48_394_condExecSS(In4_1, In4_2, ExecutionCond_of_Enabledheld2_48_394, __time_step, __nb_step);
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	ExecutionCond_of_Enabledreset_60_518 = In5_1;
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	Enabledreset_1 = Enabledreset_60_518_condExecSS(In6_1, ExecutionCond_of_Enabledreset_60_518, __time_step, __nb_step);
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	ExecutionCond_of_Enabledreset2_70_790 = (In7_1 > 0);
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	(Enabledreset2_1, Enabledreset2_2) = Enabledreset2_70_790_condExecSS(In8_1, In8_2, ExecutionCond_of_Enabledreset2_70_790, __time_step, __nb_step);
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	Out3_1 = Enabledheld_1;
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	Out1_1 = Enabledheld2_1;
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	Out1_2 = Enabledheld2_2;
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	Out2_1 = Enabledreset_1;
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	Out4_1 = Enabledreset2_1;
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	Out4_2 = Enabledreset2_2;
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	__time_step = (0.0 -> ((pre __time_step) + 0.20));
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	__nb_step = (0 -> ((pre __nb_step) + 1));
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