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lustrec-tests / regression_tests / lustre_files / success / Simulink / src_many_files / TriggeredEnabled_Subsystem2.LUSTREC.lus @ b58cc410

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-- This file has been generated by CoCoSim2.
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-- Compiler: Lustre compiler 2 (nasa_toLustre.ToLustre.m)
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-- Time: 12-Mar-2019 22:09:05
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node  Enabled_Counter_11_121_triggeredSS(In1_1 : real;
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	_isEnabled : bool;
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	_isTriggered : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out2_1 : real;);
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var pre_Out1_1 : real;
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	pre_Out2_1 : real;
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	_isTriggered_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	pre_Out2_1 = if (__nb_step > 0) then
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		(pre Out2_1)
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	    else 0.0;
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	_isTriggered_clock = _isTriggered;
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	(Out1_1, Out2_1) = (merge _isTriggered_clock 
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		(true -> Enabled_Counter_11_121((In1_1 when _isTriggered_clock), (__time_step when _isTriggered_clock), (__nb_step when _isTriggered_clock))) 
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		(false -> (pre_Out1_1, pre_Out2_1) when false(_isTriggered_clock)));
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tel
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(*
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Original block name: TriggeredEnabled_Subsystem2/Enabled_Counter
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*)
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node  Enabled_Counter_11_121_condExecSS(In1_1 : real;
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	_isEnabled : bool;
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	_isTriggered : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out2_1 : real;);
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var pre_Out1_1 : real;
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	pre_Out2_1 : real;
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	_isEnabled_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	pre_Out2_1 = if (__nb_step > 0) then
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		(pre Out2_1)
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	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	(Out1_1, Out2_1) = (merge _isEnabled_clock 
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		(true -> (Enabled_Counter_11_121_triggeredSS((In1_1 when _isEnabled_clock), (_isEnabled when _isEnabled_clock), (_isTriggered when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock)) every (false -> (_isEnabled_clock and (not (pre _isEnabled_clock)))))) 
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		(false -> (pre_Out1_1, pre_Out2_1) when false(_isEnabled_clock)));
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tel
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(*
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Original block name: TriggeredEnabled_Subsystem2/Enabled_Counter
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*)
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node  Enabled_Counter_11_121(In1_1 : real;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out2_1 : real;);
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var Add_1 : real;
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	UnitDelay_1 : real;
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let
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	Add_1 = 0.0 + In1_1 + UnitDelay_1;
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	UnitDelay_1 = (0.0 -> (pre Add_1));
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	Out1_1 = Add_1;
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	Out2_1 = UnitDelay_1;
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tel
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(*
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Original block name: TriggeredEnabled_Subsystem2
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*)
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node  TriggeredEnabled_Subsystem2(In1_1 : real;
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	Enable_1 : bool;
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	Trigger_1 : bool;)
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returns(Out1_1 : real;
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	Out2_1 : real;);
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var ExecutionCond_of_Enabled_Counter_11_121 : bool;
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	TriggerCond_of_Enabled_Counter_11_121 : bool;
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	EnableCond_of_Enabled_Counter_11_121 : bool;
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	Enabled_Counter_1 : real;
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	Enabled_Counter_2 : real;
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	__time_step : real;
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	__nb_step : int;
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let
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	EnableCond_of_Enabled_Counter_11_121 = Enable_1;
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	TriggerCond_of_Enabled_Counter_11_121 = (false -> (Trigger_1 and (not (pre Trigger_1))));
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	ExecutionCond_of_Enabled_Counter_11_121 = (EnableCond_of_Enabled_Counter_11_121 and TriggerCond_of_Enabled_Counter_11_121);
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	(Enabled_Counter_1, Enabled_Counter_2) = Enabled_Counter_11_121_condExecSS(In1_1, EnableCond_of_Enabled_Counter_11_121, TriggerCond_of_Enabled_Counter_11_121, __time_step, __nb_step);
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	Out1_1 = Enabled_Counter_1;
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	Out2_1 = Enabled_Counter_2;
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	__time_step = (0.0 -> ((pre __time_step) + 1.0));
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	__nb_step = (0 -> ((pre __nb_step) + 1));
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tel
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