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Revision b58cc410 regression_tests/lustre_files/success/Simulink/src_many_files/Triggered_Subsystem_PP.LUSTREC.lus

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regression_tests/lustre_files/success/Simulink/src_many_files/Triggered_Subsystem_PP.LUSTREC.lus
1 1
-- This file has been generated by CoCoSim2.
2 2

  
3
-- Compiler: Lustre compiler 2 (ToLustre.m)
4
-- Time: 03-Dec-2018 23:08:17
3
-- Compiler: Lustre compiler 2 (nasa_toLustre.ToLustre.m)
4
-- Time: 12-Mar-2019 22:09:16
5 5
(*
6 6
Original block name: Triggered_Subsystem_PP/Triggered_Counter/Subsystem
7 7
*)
8
node  Subsystem_197_326_automaton(In1_1 : real;
8
node  Subsystem_179_096_condExecSS(In1_1 : real;
9 9
	Enable_1 : real;
10 10
	_isEnabled : bool;
11 11
	__time_step : real;
......
14 14
	Out2_1 : real;);
15 15
var pre_Out1_1 : real;
16 16
	pre_Out2_1 : real;
17
	_isEnabled_clock : bool clock;
17 18
let
18 19
	pre_Out1_1 = if (__nb_step > 0) then
19 20
		(pre Out1_1)
20
	    else 0.000000000000000;
21
	    else 0.0;
21 22
	pre_Out2_1 = if (__nb_step > 0) then
22 23
		(pre Out2_1)
23
	    else 0.000000000000000;
24
	automaton enabled_Subsystem_197_326
25
	state Active_Subsystem_197_326:
26
	unless (not _isEnabled) restart Inactive_Subsystem_197_326
27
	let
28
		(Out1_1, Out2_1) = Subsystem_197_326(In1_1, Enable_1, __time_step, __nb_step);
29
	tel
30

  
31
	state Inactive_Subsystem_197_326:
32
	unless _isEnabled restart Active_Subsystem_197_326
33
	let
34
		Out1_1 = pre_Out1_1;
35
		Out2_1 = pre_Out2_1;
36
	tel
37

  
38

  
24
	    else 0.0;
25
	_isEnabled_clock = _isEnabled;
26
	(Out1_1, Out2_1) = (merge _isEnabled_clock 
27
		(true -> (Subsystem_179_096((In1_1 when _isEnabled_clock), (Enable_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock)) every (false -> (_isEnabled_clock and (not (pre _isEnabled_clock)))))) 
28
		(false -> (pre_Out1_1, pre_Out2_1) when false(_isEnabled_clock)));
39 29
tel
40 30

  
41 31
(*
42 32
Original block name: Triggered_Subsystem_PP/Triggered_Counter/Subsystem
43 33
*)
44
node  Subsystem_197_326(In1_1 : real;
34
node  Subsystem_179_096(In1_1 : real;
45 35
	Enable_1 : real;
46 36
	__time_step : real;
47 37
	__nb_step : int;)
......
51 41
	UnitDelay_1 : real;
52 42
let
53 43
	Add_1 = 0.0 + In1_1 + UnitDelay_1;
54
	UnitDelay_1 = (0.000000000000000 -> (pre Add_1));
44
	UnitDelay_1 = (0.0 -> (pre Add_1));
55 45
	Out1_1 = Add_1;
56 46
	Out2_1 = Enable_1;
57 47
tel
......
59 49
(*
60 50
Original block name: Triggered_Subsystem_PP/Triggered_Counter
61 51
*)
62
node  Triggered_Counter_192_310_automaton(In1_1 : real;
52
node  Triggered_Counter_174_083_condExecSS(In1_1 : real;
63 53
	_isEnabled : bool;
64 54
	__time_step : real;
65 55
	__nb_step : int;)
......
69 59
var pre_Out1_1 : real;
70 60
	pre_Out2_1 : real;
71 61
	pre_Out3_1 : real;
62
	_isEnabled_clock : bool clock;
72 63
let
73 64
	pre_Out1_1 = if (__nb_step > 0) then
74 65
		(pre Out1_1)
75
	    else 0.000000000000000;
66
	    else 0.0;
76 67
	pre_Out2_1 = if (__nb_step > 0) then
77 68
		(pre Out2_1)
78
	    else 0.000000000000000;
69
	    else 0.0;
79 70
	pre_Out3_1 = if (__nb_step > 0) then
80 71
		(pre Out3_1)
81
	    else 0.000000000000000;
82
	automaton enabled_Triggered_Counter_192_310
83
	state Active_Triggered_Counter_192_310:
84
	unless (not _isEnabled) restart Inactive_Triggered_Counter_192_310
85
	let
86
		(Out1_1, Out2_1, Out3_1) = Triggered_Counter_192_310(In1_1, __time_step, __nb_step);
87
	tel
88

  
89
	state Inactive_Triggered_Counter_192_310:
90
	unless _isEnabled resume Active_Triggered_Counter_192_310
91
	let
92
		Out1_1 = pre_Out1_1;
93
		Out2_1 = pre_Out2_1;
94
		Out3_1 = pre_Out3_1;
95
	tel
96

  
97

  
72
	    else 0.0;
73
	_isEnabled_clock = _isEnabled;
74
	(Out1_1, Out2_1, Out3_1) = (merge _isEnabled_clock 
75
		(true -> Triggered_Counter_174_083((In1_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
76
		(false -> (pre_Out1_1, pre_Out2_1, pre_Out3_1) when false(_isEnabled_clock)));
98 77
tel
99 78

  
100 79
(*
101 80
Original block name: Triggered_Subsystem_PP/Triggered_Counter
102 81
*)
103
node  Triggered_Counter_192_310(In1_1 : real;
82
node  Triggered_Counter_174_083(In1_1 : real;
104 83
	__time_step : real;
105 84
	__nb_step : int;)
106 85
returns(Out1_1 : real;
107 86
	Out2_1 : real;
108 87
	Out3_1 : real;);
109 88
var Add_1 : real;
110
	ExecutionCond_of_Subsystem_197_326 : bool;
89
	ExecutionCond_of_Subsystem_179_096 : bool;
111 90
	Subsystem_1 : real;
112 91
	Subsystem_2 : real;
113 92
	UnitDelay_1 : real;
114 93
let
115 94
	Add_1 = 0.0 + In1_1 + UnitDelay_1;
116
	ExecutionCond_of_Subsystem_197_326 = (In1_1 > 0.0);
117
	(Subsystem_1, Subsystem_2) = Subsystem_197_326_automaton(In1_1, In1_1, ExecutionCond_of_Subsystem_197_326, __time_step, __nb_step);
118
	UnitDelay_1 = (0.000000000000000 -> (pre Add_1));
95
	ExecutionCond_of_Subsystem_179_096 = (In1_1 > 0.0);
96
	(Subsystem_1, Subsystem_2) = Subsystem_179_096_condExecSS(In1_1, In1_1, ExecutionCond_of_Subsystem_179_096, __time_step, __nb_step);
97
	UnitDelay_1 = (0.0 -> (pre Add_1));
119 98
	Out1_1 = Add_1;
120 99
	Out2_1 = Subsystem_1;
121 100
	Out3_1 = Subsystem_2;
......
124 103
(*
125 104
Original block name: Triggered_Subsystem_PP/case_either
126 105
*)
127
node  case_either_232_114_automaton(Cpre_compx_1 : real;
106
node  case_either_214_085_condExecSS(Cpre_compx_1 : real;
128 107
	Trigger_1 : real;
129 108
	_isEnabled : bool;
130 109
	__time_step : real;
......
135 114
var pre_Ccor_x_1 : real;
136 115
	pre_pre_x_1 : real;
137 116
	pre_Out1_1 : real;
117
	_isEnabled_clock : bool clock;
138 118
let
139 119
	pre_Ccor_x_1 = if (__nb_step > 0) then
140 120
		(pre Ccor_x_1)
141
	    else 0.000000000000000;
121
	    else 0.0;
142 122
	pre_pre_x_1 = if (__nb_step > 0) then
143 123
		(pre pre_x_1)
144
	    else 0.000000000000000;
124
	    else 0.0;
145 125
	pre_Out1_1 = if (__nb_step > 0) then
146 126
		(pre Out1_1)
147
	    else 0.000000000000000;
148
	automaton enabled_case_either_232_114
149
	state Active_case_either_232_114:
150
	unless (not _isEnabled) restart Inactive_case_either_232_114
151
	let
152
		(Ccor_x_1, pre_x_1, Out1_1) = case_either_232_114(Cpre_compx_1, Trigger_1, __time_step, __nb_step);
153
	tel
154

  
155
	state Inactive_case_either_232_114:
156
	unless _isEnabled resume Active_case_either_232_114
157
	let
158
		Ccor_x_1 = pre_Ccor_x_1;
159
		pre_x_1 = pre_pre_x_1;
160
		Out1_1 = pre_Out1_1;
161
	tel
162

  
163

  
127
	    else 0.0;
128
	_isEnabled_clock = _isEnabled;
129
	(Ccor_x_1, pre_x_1, Out1_1) = (merge _isEnabled_clock 
130
		(true -> case_either_214_085((Cpre_compx_1 when _isEnabled_clock), (Trigger_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
131
		(false -> (pre_Ccor_x_1, pre_pre_x_1, pre_Out1_1) when false(_isEnabled_clock)));
164 132
tel
165 133

  
166 134
(*
167 135
Original block name: Triggered_Subsystem_PP/case_either
168 136
*)
169
node  case_either_232_114(Cpre_compx_1 : real;
137
node  case_either_214_085(Cpre_compx_1 : real;
170 138
	Trigger_1 : real;
171 139
	__time_step : real;
172 140
	__nb_step : int;)
......
177 145
	UnitDelay_1 : real;
178 146
let
179 147
	Add_1 = 0.0 + Cpre_compx_1 + UnitDelay_1;
180
	UnitDelay_1 = (0.000000000000000 -> (pre Add_1));
148
	UnitDelay_1 = (0.0 -> (pre Add_1));
181 149
	Ccor_x_1 = Add_1;
182 150
	pre_x_1 = UnitDelay_1;
183 151
	Out1_1 = Trigger_1;
......
186 154
(*
187 155
Original block name: Triggered_Subsystem_PP/case_falling
188 156
*)
189
node  case_falling_248_113_automaton(Cpre_compx_1 : real;
157
node  case_falling_230_305_condExecSS(Cpre_compx_1 : real;
190 158
	Trigger_1 : real;
191 159
	_isEnabled : bool;
192 160
	__time_step : real;
......
197 165
var pre_Ccor_x_1 : real;
198 166
	pre_pre_x_1 : real;
199 167
	pre_Out1_1 : real;
168
	_isEnabled_clock : bool clock;
200 169
let
201 170
	pre_Ccor_x_1 = if (__nb_step > 0) then
202 171
		(pre Ccor_x_1)
203
	    else 0.000000000000000;
172
	    else 0.0;
204 173
	pre_pre_x_1 = if (__nb_step > 0) then
205 174
		(pre pre_x_1)
206
	    else 0.000000000000000;
175
	    else 0.0;
207 176
	pre_Out1_1 = if (__nb_step > 0) then
208 177
		(pre Out1_1)
209
	    else 0.000000000000000;
210
	automaton enabled_case_falling_248_113
211
	state Active_case_falling_248_113:
212
	unless (not _isEnabled) restart Inactive_case_falling_248_113
213
	let
214
		(Ccor_x_1, pre_x_1, Out1_1) = case_falling_248_113(Cpre_compx_1, Trigger_1, __time_step, __nb_step);
215
	tel
216

  
217
	state Inactive_case_falling_248_113:
218
	unless _isEnabled resume Active_case_falling_248_113
219
	let
220
		Ccor_x_1 = pre_Ccor_x_1;
221
		pre_x_1 = pre_pre_x_1;
222
		Out1_1 = pre_Out1_1;
223
	tel
224

  
225

  
178
	    else 0.0;
179
	_isEnabled_clock = _isEnabled;
180
	(Ccor_x_1, pre_x_1, Out1_1) = (merge _isEnabled_clock 
181
		(true -> case_falling_230_305((Cpre_compx_1 when _isEnabled_clock), (Trigger_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
182
		(false -> (pre_Ccor_x_1, pre_pre_x_1, pre_Out1_1) when false(_isEnabled_clock)));
226 183
tel
227 184

  
228 185
(*
229 186
Original block name: Triggered_Subsystem_PP/case_falling
230 187
*)
231
node  case_falling_248_113(Cpre_compx_1 : real;
188
node  case_falling_230_305(Cpre_compx_1 : real;
232 189
	Trigger_1 : real;
233 190
	__time_step : real;
234 191
	__nb_step : int;)
......
239 196
	UnitDelay_1 : real;
240 197
let
241 198
	Add_1 = 0.0 + Cpre_compx_1 + UnitDelay_1;
242
	UnitDelay_1 = (0.000000000000000 -> (pre Add_1));
199
	UnitDelay_1 = (0.0 -> (pre Add_1));
243 200
	Ccor_x_1 = Add_1;
244 201
	pre_x_1 = UnitDelay_1;
245 202
	Out1_1 = Trigger_1;
......
248 205
(*
249 206
Original block name: Triggered_Subsystem_PP/case_rising
250 207
*)
251
node  case_rising_264_106_automaton(Cpre_compx_1 : real;
208
node  case_rising_246_097_condExecSS(Cpre_compx_1 : real;
252 209
	Trigger_1 : real;
253 210
	_isEnabled : bool;
254 211
	__time_step : real;
......
259 216
var pre_Ccor_x_1 : real;
260 217
	pre_pre_x_1 : real;
261 218
	pre_Out1_1 : real;
219
	_isEnabled_clock : bool clock;
262 220
let
263 221
	pre_Ccor_x_1 = if (__nb_step > 0) then
264 222
		(pre Ccor_x_1)
265
	    else 0.000000000000000;
223
	    else 0.0;
266 224
	pre_pre_x_1 = if (__nb_step > 0) then
267 225
		(pre pre_x_1)
268
	    else 0.000000000000000;
226
	    else 0.0;
269 227
	pre_Out1_1 = if (__nb_step > 0) then
270 228
		(pre Out1_1)
271
	    else 0.000000000000000;
272
	automaton enabled_case_rising_264_106
273
	state Active_case_rising_264_106:
274
	unless (not _isEnabled) restart Inactive_case_rising_264_106
275
	let
276
		(Ccor_x_1, pre_x_1, Out1_1) = case_rising_264_106(Cpre_compx_1, Trigger_1, __time_step, __nb_step);
277
	tel
278

  
279
	state Inactive_case_rising_264_106:
280
	unless _isEnabled resume Active_case_rising_264_106
281
	let
282
		Ccor_x_1 = pre_Ccor_x_1;
283
		pre_x_1 = pre_pre_x_1;
284
		Out1_1 = pre_Out1_1;
285
	tel
286

  
287

  
229
	    else 0.0;
230
	_isEnabled_clock = _isEnabled;
231
	(Ccor_x_1, pre_x_1, Out1_1) = (merge _isEnabled_clock 
232
		(true -> case_rising_246_097((Cpre_compx_1 when _isEnabled_clock), (Trigger_1 when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
233
		(false -> (pre_Ccor_x_1, pre_pre_x_1, pre_Out1_1) when false(_isEnabled_clock)));
288 234
tel
289 235

  
290 236
(*
291 237
Original block name: Triggered_Subsystem_PP/case_rising
292 238
*)
293
node  case_rising_264_106(Cpre_compx_1 : real;
239
node  case_rising_246_097(Cpre_compx_1 : real;
294 240
	Trigger_1 : real;
295 241
	__time_step : real;
296 242
	__nb_step : int;)
......
301 247
	UnitDelay_1 : real;
302 248
let
303 249
	Add_1 = 0.0 + Cpre_compx_1 + UnitDelay_1;
304
	UnitDelay_1 = (0.000000000000000 -> (pre Add_1));
250
	UnitDelay_1 = (0.0 -> (pre Add_1));
305 251
	Ccor_x_1 = Add_1;
306 252
	pre_x_1 = UnitDelay_1;
307 253
	Out1_1 = Trigger_1;
......
324 270
	Out8_1 : real;
325 271
	Out7_1 : real;
326 272
	Out9_1 : real;);
327
var ExecutionCond_of_Triggered_Counter_192_310 : bool;
273
var ExecutionCond_of_Triggered_Counter_174_083 : bool;
328 274
	Triggered_Counter_1 : real;
329 275
	Triggered_Counter_2 : real;
330 276
	Triggered_Counter_3 : real;
331
	ExecutionCond_of_case_either_232_114 : bool;
277
	ExecutionCond_of_case_either_214_085 : bool;
332 278
	case_either_1 : real;
333 279
	case_either_2 : real;
334 280
	case_either_3 : real;
335
	ExecutionCond_of_case_falling_248_113 : bool;
281
	ExecutionCond_of_case_falling_230_305 : bool;
336 282
	case_falling_1 : real;
337 283
	case_falling_2 : real;
338 284
	case_falling_3 : real;
339
	ExecutionCond_of_case_rising_264_106 : bool;
285
	ExecutionCond_of_case_rising_246_097 : bool;
340 286
	case_rising_1 : real;
341 287
	case_rising_2 : real;
342 288
	case_rising_3 : real;
343 289
	__time_step : real;
344 290
	__nb_step : int;
345 291
let
346
	ExecutionCond_of_Triggered_Counter_192_310 = (false -> ((Enable_1 > 0.0) and (not (pre (Enable_1 > 0.0)))));
347
	(Triggered_Counter_1, Triggered_Counter_2, Triggered_Counter_3) = Triggered_Counter_192_310_automaton(In1_1, ExecutionCond_of_Triggered_Counter_192_310, __time_step, __nb_step);
348
	ExecutionCond_of_case_either_232_114 = (false -> (((Enable_1 > 0.0) and (not (pre (Enable_1 > 0.0)))) or ((not (Enable_1 > 0.0)) and (pre (Enable_1 > 0.0)))));
349
	(case_either_1, case_either_2, case_either_3) = case_either_232_114_automaton(In1_1, (0.0 -> if ExecutionCond_of_case_either_232_114 then
292
	ExecutionCond_of_Triggered_Counter_174_083 = (false -> ((Enable_1 > 0.0) and (not (pre (Enable_1 > 0.0)))));
293
	(Triggered_Counter_1, Triggered_Counter_2, Triggered_Counter_3) = Triggered_Counter_174_083_condExecSS(In1_1, ExecutionCond_of_Triggered_Counter_174_083, __time_step, __nb_step);
294
	ExecutionCond_of_case_either_214_085 = (false -> (((Enable_1 > 0.0) and (not (pre (Enable_1 > 0.0)))) or ((not (Enable_1 > 0.0)) and (pre (Enable_1 > 0.0)))));
295
	(case_either_1, case_either_2, case_either_3) = case_either_214_085_condExecSS(In1_1, (0.0 -> if ExecutionCond_of_case_either_214_085 then
350 296
		if (false -> ((Enable_1 > 0.0) and (not (pre (Enable_1 > 0.0))))) then
351 297
		1.0
352 298
	    else (- 1.0)
353
	    else 0.0), ExecutionCond_of_case_either_232_114, __time_step, __nb_step);
354
	ExecutionCond_of_case_falling_248_113 = (false -> ((not (Enable_1 > 0.0)) and (pre (Enable_1 > 0.0))));
355
	(case_falling_1, case_falling_2, case_falling_3) = case_falling_248_113_automaton(In1_1, (0.0 -> if ExecutionCond_of_case_falling_248_113 then
299
	    else 0.0), ExecutionCond_of_case_either_214_085, __time_step, __nb_step);
300
	ExecutionCond_of_case_falling_230_305 = (false -> ((not (Enable_1 > 0.0)) and (pre (Enable_1 > 0.0))));
301
	(case_falling_1, case_falling_2, case_falling_3) = case_falling_230_305_condExecSS(In1_1, (0.0 -> if ExecutionCond_of_case_falling_230_305 then
356 302
		(- 1.0)
357
	    else 0.0), ExecutionCond_of_case_falling_248_113, __time_step, __nb_step);
358
	ExecutionCond_of_case_rising_264_106 = (false -> ((Enable_1 > 0.0) and (not (pre (Enable_1 > 0.0)))));
359
	(case_rising_1, case_rising_2, case_rising_3) = case_rising_264_106_automaton(In1_1, (0.0 -> if ExecutionCond_of_case_rising_264_106 then
303
	    else 0.0), ExecutionCond_of_case_falling_230_305, __time_step, __nb_step);
304
	ExecutionCond_of_case_rising_246_097 = (false -> ((Enable_1 > 0.0) and (not (pre (Enable_1 > 0.0)))));
305
	(case_rising_1, case_rising_2, case_rising_3) = case_rising_246_097_condExecSS(In1_1, (0.0 -> if ExecutionCond_of_case_rising_246_097 then
360 306
		1.0
361
	    else 0.0), ExecutionCond_of_case_rising_264_106, __time_step, __nb_step);
307
	    else 0.0), ExecutionCond_of_case_rising_246_097, __time_step, __nb_step);
362 308
	Out1_1 = Triggered_Counter_1;
363 309
	Out2_1 = Triggered_Counter_2;
364 310
	Out3_1 = Triggered_Counter_3;
......
371 317
	Out8_1 = case_rising_3;
372 318
	Out7_1 = case_falling_3;
373 319
	Out9_1 = case_either_3;
374
	__time_step = (0.0 -> ((pre __time_step) + 0.200000000000000));
320
	__time_step = (0.0 -> ((pre __time_step) + 0.20));
375 321
	__nb_step = (0 -> ((pre __nb_step) + 1));
376 322
tel
377 323

  

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