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Revision b58cc410 regression_tests/lustre_files/success/Simulink/src_many_files/TriggeredEnabled_Subsystem_PP.LUSTREC.lus

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regression_tests/lustre_files/success/Simulink/src_many_files/TriggeredEnabled_Subsystem_PP.LUSTREC.lus
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-- This file has been generated by CoCoSim2.
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-- Compiler: Lustre compiler 2 (ToLustre.m)
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-- Time: 03-Dec-2018 23:07:59
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-- Compiler: Lustre compiler 2 (nasa_toLustre.ToLustre.m)
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-- Time: 12-Mar-2019 22:08:52
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node  Enabled_Counter_99_939_triggeredSS(In1_1 : real;
6
	_isEnabled : bool;
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	_isTriggered : bool;
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	__time_step : real;
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	__nb_step : int;)
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returns(Out1_1 : real;
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	Out2_1 : real;);
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var pre_Out1_1 : real;
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	pre_Out2_1 : real;
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	_isTriggered_clock : bool clock;
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let
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.0;
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	pre_Out2_1 = if (__nb_step > 0) then
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		(pre Out2_1)
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	    else 0.0;
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	_isTriggered_clock = _isTriggered;
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	(Out1_1, Out2_1) = (merge _isTriggered_clock 
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		(true -> Enabled_Counter_99_939((In1_1 when _isTriggered_clock), (__time_step when _isTriggered_clock), (__nb_step when _isTriggered_clock))) 
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		(false -> (pre_Out1_1, pre_Out2_1) when false(_isTriggered_clock)));
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tel
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(*
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Original block name: TriggeredEnabled_Subsystem_PP/Enabled_Counter
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*)
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node  Enabled_Counter_115_759_automaton(In1_1 : real;
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node  Enabled_Counter_99_939_condExecSS(In1_1 : real;
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	_isEnabled : bool;
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	_isTriggered : bool;
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	__time_step : real;
......
14 37
	Out2_1 : real;);
15 38
var pre_Out1_1 : real;
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	pre_Out2_1 : real;
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	_isEnabled_clock : bool clock;
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let
18 42
	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.000000000000000;
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	    else 0.0;
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	pre_Out2_1 = if (__nb_step > 0) then
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		(pre Out2_1)
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	    else 0.000000000000000;
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	automaton enabled_Enabled_Counter_115_759
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	state Active_Enabled_Counter_115_759:
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	unless (not _isEnabled) restart Inactive_Enabled_Counter_115_759
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	let
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		automaton triggered_Enabled_Counter_115_759
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	state Active_triggered_Enabled_Counter_115_759:
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	unless (not _isTriggered) resume Inactive_triggered_Enabled_Counter_115_759
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	let
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		(Out1_1, Out2_1) = Enabled_Counter_115_759(In1_1, __time_step, __nb_step);
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	tel
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	state Inactive_triggered_Enabled_Counter_115_759:
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	unless _isTriggered resume Active_triggered_Enabled_Counter_115_759
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	let
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		Out1_1 = pre_Out1_1;
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		Out2_1 = pre_Out2_1;
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	tel
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42

  
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	tel
44

  
45
	state Inactive_Enabled_Counter_115_759:
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	unless _isEnabled resume Active_Enabled_Counter_115_759
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	let
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		Out1_1 = pre_Out1_1;
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		Out2_1 = pre_Out2_1;
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	tel
51

  
52

  
47
	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	(Out1_1, Out2_1) = (merge _isEnabled_clock 
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		(true -> Enabled_Counter_99_939_triggeredSS((In1_1 when _isEnabled_clock), (_isEnabled when _isEnabled_clock), (_isTriggered when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
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		(false -> (pre_Out1_1, pre_Out2_1) when false(_isEnabled_clock)));
53 52
tel
54 53

  
55 54
(*
56 55
Original block name: TriggeredEnabled_Subsystem_PP/Enabled_Counter
57 56
*)
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node  Enabled_Counter_115_759(In1_1 : real;
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node  Enabled_Counter_99_939(In1_1 : real;
59 58
	__time_step : real;
60 59
	__nb_step : int;)
61 60
returns(Out1_1 : real;
......
64 63
	UnitDelay_1 : real;
65 64
let
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	Add_1 = 0.0 + In1_1 + UnitDelay_1;
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	UnitDelay_1 = (0.000000000000000 -> (pre Add_1));
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	UnitDelay_1 = (0.0 -> (pre Add_1));
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	Out1_1 = Add_1;
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	Out2_1 = UnitDelay_1;
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tel
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node  case_held_held_held_116_903_triggeredSS(Cpre_compx_1 : real;
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	Enable_1 : real;
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	_isEnabled : bool;
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	_isTriggered : bool;
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	__time_step : real;
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	__nb_step : int;)
77
returns(Ccor_x_1 : real;
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	pre_x_1 : real;
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	Out1_1 : real;);
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var pre_Ccor_x_1 : real;
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	pre_pre_x_1 : real;
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	pre_Out1_1 : real;
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	_isTriggered_clock : bool clock;
84
let
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	pre_Ccor_x_1 = if (__nb_step > 0) then
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		(pre Ccor_x_1)
87
	    else 0.0;
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	pre_pre_x_1 = if (__nb_step > 0) then
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		(pre pre_x_1)
90
	    else 0.0;
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
93
	    else 0.0;
94
	_isTriggered_clock = _isTriggered;
95
	(Ccor_x_1, pre_x_1, Out1_1) = (merge _isTriggered_clock 
96
		(true -> case_held_held_held_116_903((Cpre_compx_1 when _isTriggered_clock), (Enable_1 when _isTriggered_clock), (__time_step when _isTriggered_clock), (__nb_step when _isTriggered_clock))) 
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		(false -> (pre_Ccor_x_1, pre_pre_x_1, pre_Out1_1) when false(_isTriggered_clock)));
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tel
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(*
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Original block name: TriggeredEnabled_Subsystem_PP/case_held_held_held
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*)
75
node  case_held_held_held_130_534_automaton(Cpre_compx_1 : real;
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node  case_held_held_held_116_903_condExecSS(Cpre_compx_1 : real;
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	Enable_1 : real;
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	_isEnabled : bool;
78 106
	_isTriggered : bool;
......
84 112
var pre_Ccor_x_1 : real;
85 113
	pre_pre_x_1 : real;
86 114
	pre_Out1_1 : real;
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	_isEnabled_clock : bool clock;
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let
88 117
	pre_Ccor_x_1 = if (__nb_step > 0) then
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		(pre Ccor_x_1)
90
	    else 0.000000000000000;
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	    else 0.0;
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	pre_pre_x_1 = if (__nb_step > 0) then
92 121
		(pre pre_x_1)
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	    else 0.000000000000000;
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	    else 0.0;
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	pre_Out1_1 = if (__nb_step > 0) then
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		(pre Out1_1)
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	    else 0.000000000000000;
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	automaton enabled_case_held_held_held_130_534
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	state Active_case_held_held_held_130_534:
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	unless (not _isEnabled) restart Inactive_case_held_held_held_130_534
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	let
101
		automaton triggered_case_held_held_held_130_534
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	state Active_triggered_case_held_held_held_130_534:
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	unless (not _isTriggered) resume Inactive_triggered_case_held_held_held_130_534
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	let
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		(Ccor_x_1, pre_x_1, Out1_1) = case_held_held_held_130_534(Cpre_compx_1, Enable_1, __time_step, __nb_step);
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	tel
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	state Inactive_triggered_case_held_held_held_130_534:
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	unless _isTriggered resume Active_triggered_case_held_held_held_130_534
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	let
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		Ccor_x_1 = pre_Ccor_x_1;
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		pre_x_1 = pre_pre_x_1;
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		Out1_1 = pre_Out1_1;
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	tel
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	tel
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	state Inactive_case_held_held_held_130_534:
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	unless _isEnabled resume Active_case_held_held_held_130_534
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	let
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		Ccor_x_1 = pre_Ccor_x_1;
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		pre_x_1 = pre_pre_x_1;
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		Out1_1 = pre_Out1_1;
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	tel
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	    else 0.0;
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	_isEnabled_clock = _isEnabled;
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	(Ccor_x_1, pre_x_1, Out1_1) = (merge _isEnabled_clock 
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		(true -> case_held_held_held_116_903_triggeredSS((Cpre_compx_1 when _isEnabled_clock), (Enable_1 when _isEnabled_clock), (_isEnabled when _isEnabled_clock), (_isTriggered when _isEnabled_clock), (__time_step when _isEnabled_clock), (__nb_step when _isEnabled_clock))) 
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		(false -> (pre_Ccor_x_1, pre_pre_x_1, pre_Out1_1) when false(_isEnabled_clock)));
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tel
129 131

  
130 132
(*
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Original block name: TriggeredEnabled_Subsystem_PP/case_held_held_held
132 134
*)
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node  case_held_held_held_130_534(Cpre_compx_1 : real;
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node  case_held_held_held_116_903(Cpre_compx_1 : real;
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	Enable_1 : real;
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	__time_step : real;
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	__nb_step : int;)
......
141 143
	UnitDelay_1 : real;
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let
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	Add_1 = 0.0 + Cpre_compx_1 + UnitDelay_1;
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	UnitDelay_1 = (0.000000000000000 -> (pre Add_1));
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	UnitDelay_1 = (0.0 -> (pre Add_1));
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	Ccor_x_1 = Add_1;
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	pre_x_1 = UnitDelay_1;
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	Out1_1 = Enable_1;
......
158 160
	Out4_1 : real;
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	pre_Out1_1 : real;
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	Out8_1 : real;);
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var ExecutionCond_of_Enabled_Counter_115_759 : bool;
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	TriggerCond_of_Enabled_Counter_115_759 : bool;
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	EnableCond_of_Enabled_Counter_115_759 : bool;
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var ExecutionCond_of_Enabled_Counter_99_939 : bool;
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	TriggerCond_of_Enabled_Counter_99_939 : bool;
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	EnableCond_of_Enabled_Counter_99_939 : bool;
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	Enabled_Counter_1 : real;
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	Enabled_Counter_2 : real;
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	ExecutionCond_of_case_held_held_held_130_534 : bool;
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	TriggerCond_of_case_held_held_held_130_534 : bool;
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	EnableCond_of_case_held_held_held_130_534 : bool;
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	ExecutionCond_of_case_held_held_held_116_903 : bool;
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	TriggerCond_of_case_held_held_held_116_903 : bool;
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	EnableCond_of_case_held_held_held_116_903 : bool;
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	case_held_held_held_1 : real;
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	case_held_held_held_2 : real;
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	case_held_held_held_3 : real;
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	__time_step : real;
173 175
	__nb_step : int;
174 176
let
175
	EnableCond_of_Enabled_Counter_115_759 = (Enable_1 > 0.0);
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	TriggerCond_of_Enabled_Counter_115_759 = (false -> ((Trigger_1 > 0.0) and (not (pre (Trigger_1 > 0.0)))));
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	ExecutionCond_of_Enabled_Counter_115_759 = (EnableCond_of_Enabled_Counter_115_759 and TriggerCond_of_Enabled_Counter_115_759);
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	(Enabled_Counter_1, Enabled_Counter_2) = Enabled_Counter_115_759_automaton(In1_1, EnableCond_of_Enabled_Counter_115_759, TriggerCond_of_Enabled_Counter_115_759, __time_step, __nb_step);
179
	EnableCond_of_case_held_held_held_130_534 = (Enable_1 > 0.0);
180
	TriggerCond_of_case_held_held_held_130_534 = (false -> ((Trigger_1 > 0.0) and (not (pre (Trigger_1 > 0.0)))));
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	ExecutionCond_of_case_held_held_held_130_534 = (EnableCond_of_case_held_held_held_130_534 and TriggerCond_of_case_held_held_held_130_534);
182
	(case_held_held_held_1, case_held_held_held_2, case_held_held_held_3) = case_held_held_held_130_534_automaton(In1_1, Enable_1, EnableCond_of_case_held_held_held_130_534, TriggerCond_of_case_held_held_held_130_534, __time_step, __nb_step);
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	EnableCond_of_Enabled_Counter_99_939 = (Enable_1 > 0.0);
178
	TriggerCond_of_Enabled_Counter_99_939 = (false -> ((Trigger_1 > 0.0) and (not (pre (Trigger_1 > 0.0)))));
179
	ExecutionCond_of_Enabled_Counter_99_939 = (EnableCond_of_Enabled_Counter_99_939 and TriggerCond_of_Enabled_Counter_99_939);
180
	(Enabled_Counter_1, Enabled_Counter_2) = Enabled_Counter_99_939_condExecSS(In1_1, EnableCond_of_Enabled_Counter_99_939, TriggerCond_of_Enabled_Counter_99_939, __time_step, __nb_step);
181
	EnableCond_of_case_held_held_held_116_903 = (Enable_1 > 0.0);
182
	TriggerCond_of_case_held_held_held_116_903 = (false -> ((Trigger_1 > 0.0) and (not (pre (Trigger_1 > 0.0)))));
183
	ExecutionCond_of_case_held_held_held_116_903 = (EnableCond_of_case_held_held_held_116_903 and TriggerCond_of_case_held_held_held_116_903);
184
	(case_held_held_held_1, case_held_held_held_2, case_held_held_held_3) = case_held_held_held_116_903_condExecSS(In1_1, Enable_1, EnableCond_of_case_held_held_held_116_903, TriggerCond_of_case_held_held_held_116_903, __time_step, __nb_step);
183 185
	Out1_1 = Enabled_Counter_1;
184 186
	Out2_1 = Enabled_Counter_2;
185 187
	Out4_1 = case_held_held_held_1;
186 188
	pre_Out1_1 = case_held_held_held_2;
187 189
	Out8_1 = case_held_held_held_3;
188
	__time_step = (0.0 -> ((pre __time_step) + 0.200000000000000));
190
	__time_step = (0.0 -> ((pre __time_step) + 0.20));
189 191
	__nb_step = (0 -> ((pre __nb_step) + 1));
190 192
tel
191 193

  

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