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lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / ghdl / ghdl / testsuite / vests / vhdl-93 / billowitch / compliant / tc1413.vhd @ 3fd18385

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-- Copyright (C) 2001 Bill Billowitch.
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-- Some of the work to develop this test suite was done with Air Force
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-- support.  The Air Force and Bill Billowitch assume no
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-- responsibilities for this software.
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version. 
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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-- for more details. 
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
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-- ---------------------------------------------------------------------
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--
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-- $Id: tc1413.vhd,v 1.2 2001-10-26 16:29:41 paw Exp $
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-- $Revision: 1.2 $
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--
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-- ---------------------------------------------------------------------
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ENTITY c08s05b01x00p01n01i01413ent IS
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END c08s05b01x00p01n01i01413ent;
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ARCHITECTURE c08s05b01x00p01n01i01413arch OF c08s05b01x00p01n01i01413ent IS
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BEGIN
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  TESTING: PROCESS
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    function check (i : integer) return real is
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    begin
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      return (1.0);
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    end;
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    type rec_type is
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      record
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        x : integer;
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        y : real;
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        z : boolean;
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        b : bit;
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      end record;
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    type array_type is array (1 to 10) of rec_type;
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    variable   v1 : array_type;   
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    constant    i  : integer := 20;
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  BEGIN
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    v1 (1).x := i;
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    v1 (1).y := check(i);
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    v1 (1).z := true;
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    v1 (1).b := bit'('0');
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    assert NOT(v1(1).x=20 and v1(1).y=1.0 and v1(1).z=true and v1(1).b='0') 
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      report "***PASSED TEST: c08s05b01x00p01n01i01413" 
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      severity NOTE;
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    assert (v1(1).x=20 and v1(1).y=1.0 and v1(1).z=true and v1(1).b='0') 
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      report "***FAILED TEST: c08s05b01x00p01n01i01413 Each element of the array variable there is a matching element on the right hand side." 
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      severity ERROR;
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    wait;
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  END PROCESS TESTING;
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END c08s05b01x00p01n01i01413arch;