Project

General

Profile

Statistics
| Branch: | Tag: | Revision:

lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / ghdl / ghdl / testsuite / vests / vhdl-93 / billowitch / compliant / tc1187.vhd @ 3fd18385

History | View | Annotate | Download (1.75 KB)

1

    
2
-- Copyright (C) 2001 Bill Billowitch.
3

    
4
-- Some of the work to develop this test suite was done with Air Force
5
-- support.  The Air Force and Bill Billowitch assume no
6
-- responsibilities for this software.
7

    
8
-- This file is part of VESTs (Vhdl tESTs).
9

    
10
-- VESTs is free software; you can redistribute it and/or modify it
11
-- under the terms of the GNU General Public License as published by the
12
-- Free Software Foundation; either version 2 of the License, or (at
13
-- your option) any later version. 
14

    
15
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
16
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17
-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
18
-- for more details. 
19

    
20
-- You should have received a copy of the GNU General Public License
21
-- along with VESTs; if not, write to the Free Software Foundation,
22
-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
23

    
24
-- ---------------------------------------------------------------------
25
--
26
-- $Id: tc1187.vhd,v 1.2 2001-10-26 16:29:39 paw Exp $
27
-- $Revision: 1.2 $
28
--
29
-- ---------------------------------------------------------------------
30

    
31
ENTITY c08s01b00x00p03n01i01187ent IS
32
END c08s01b00x00p03n01i01187ent;
33

    
34
ARCHITECTURE c08s01b00x00p03n01i01187arch OF c08s01b00x00p03n01i01187ent IS
35
  signal k : integer := 0;
36
BEGIN
37
  TESTING: PROCESS
38
  BEGIN
39
    k <= 5 after 5 ns;   
40
    wait on k;
41
    assert NOT( k=5 )
42
      report "***PASSED TEST: c08s01b00x00p03n01i01187"
43
      severity NOTE;
44
    assert (k=5)
45
      report "***FAILED TEST: c08s01b00x00p03n01i01187 - In wait statement, the reserved word 'on' followed by one or more signal names separated with commas(,)."
46
      severity ERROR;
47
    wait;
48
  END PROCESS TESTING;
49

    
50
END c08s01b00x00p03n01i01187arch;