Project

General

Profile

Statistics
| Branch: | Tag: | Revision:

lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / cnes_guidelines / rule / data / STD_00700_good.json @ 3fd18385

History | View | Annotate | Download (6.11 KB)

1
{
2
  "DESIGN_FILE" : {
3
    "design_units" : [{
4
      "contexts" : [["LIBRARY_CLAUSE", [["IDENTIFIER", "IEEE"]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "IEEE"], ["SIMPLE_NAME", "std_logic_1164"]]]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "IEEE"], ["SIMPLE_NAME", "numeric_std"]]]]], ["LIBRARY_CLAUSE", [["IDENTIFIER", "work"]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["SIMPLE_NAME", "pkg_HBK"]]]]]], "library" : ["ENTITY_DECLARATION", {
5
        "name" : ["IDENTIFIER", "STD_00700_good"], "ports" : [{
6
          "names" : [["IDENTIFIER", "i_Clock"]], "mode" : ["in"], "typ" : {
7
            "name" : ["SIMPLE_NAME", "std_logic"]}
8
          }
9
        , {
10
          "names" : [["IDENTIFIER", "i_Reset_n"]], "mode" : ["in"], "typ" : {
11
            "name" : ["SIMPLE_NAME", "std_logic"]}
12
          }
13
        , {
14
          "names" : [["IDENTIFIER", "i_D"]], "mode" : ["in"], "typ" : {
15
            "name" : ["SIMPLE_NAME", "std_logic"]}
16
          }
17
        , {
18
          "names" : [["IDENTIFIER", "o_Q"]], "mode" : ["out"], "typ" : {
19
            "name" : ["SIMPLE_NAME", "std_logic"]}
20
          }
21
        ], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []}
22
      ]}
23
    , {
24
      "contexts" : [], "library" : ["ARCHITECTURE_BODY", {
25
        "name" : ["IDENTIFIER", "Behavioral"], "entity" : ["IDENTIFIER", "STD_00700_good"], "ARCHITECTURE_DECLARATIVE_PART" : [{
26
          "declaration" : ["SIGNAL_DECLARATION", {
27
            "names" : [["IDENTIFIER", "D"]], "typ" : {
28
              "name" : ["SIMPLE_NAME", "std_logic"]}
29
            }
30
          ]}
31
        , {
32
          "declaration" : ["SIGNAL_DECLARATION", {
33
            "names" : [["IDENTIFIER", "Q"]], "typ" : {
34
              "name" : ["SIMPLE_NAME", "std_logic"]}
35
            }
36
          ]}
37
        ], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", {
38
          "name" : ["IDENTIFIER", "DFlipFlop1"], "inst_unit" : ["SIMPLE_NAME", "DFlipFlop"], "inst_unit_type" : "component", "port_map" : [{
39
            "formal_name" : ["SIMPLE_NAME", "i_Clock"], "actual_designator" : ["SIMPLE_NAME", "i_Clock"]}
40
          , {
41
            "formal_name" : ["SIMPLE_NAME", "i_Reset_n"], "actual_designator" : ["SIMPLE_NAME", "i_Reset_n"]}
42
          , {
43
            "formal_name" : ["SIMPLE_NAME", "i_D"], "actual_designator" : ["SIMPLE_NAME", "i_D"]}
44
          , {
45
            "formal_name" : ["SIMPLE_NAME", "o_Q"], "actual_designator" : ["SIMPLE_NAME", "D"]}
46
          , {
47
            "formal_name" : ["SIMPLE_NAME", "o_Q_n"], "actual_designator" : ["OPEN"]}
48
          ]}
49
        ], ["PROCESS_STATEMENT", {
50
          "id" : ["IDENTIFIER", "P_FlipFlop"], "active_sigs" : [["SIMPLE_NAME", "i_Reset_n"], ["SIMPLE_NAME", "i_Clock"]], "PROCESS_STATEMENT_PART" : [["IF_STATEMENT", {
51
            "if_cases" : [{
52
              "if_cond" : ["EXPRESSION", {
53
                "args" : [["EXPRESSION", {
54
                  "args" : [["EXPRESSION", {
55
                    "args" : [["EXPRESSION", {
56
                      "args" : [["EXPRESSION", {
57
                        "id" : "=", "args" : [["EXPRESSION", {
58
                          "args" : [["EXPRESSION", {
59
                            "args" : [["EXPRESSION", {
60
                              "args" : [["CALL", ["SIMPLE_NAME", "i_Reset_n"]]]}
61
                            ]]}
62
                          ]]}
63
                        ], ["EXPRESSION", {
64
                          "args" : [["EXPRESSION", {
65
                            "args" : [["EXPRESSION", {
66
                              "args" : [["CONSTANT_VALUE", {
67
                                "value" : ["CST_LITERAL", "'0'"]}
68
                              ]]}
69
                            ]]}
70
                          ]]}
71
                        ]]}
72
                      ]]}
73
                    ]]}
74
                  ]]}
75
                ]]}
76
              ], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", {
77
                "lhs" : ["SIMPLE_NAME", "Q"], "rhs" : [{
78
                  "value" : ["EXPRESSION", {
79
                    "args" : [["EXPRESSION", {
80
                      "args" : [["EXPRESSION", {
81
                        "args" : [["EXPRESSION", {
82
                          "args" : [["CONSTANT_VALUE", {
83
                            "value" : ["CST_LITERAL", "'0'"]}
84
                          ]]}
85
                        ]]}
86
                      ]]}
87
                    ]]}
88
                  ]}
89
                ]}
90
              ]]}
91
            , {
92
              "if_cond" : ["EXPRESSION", {
93
                "args" : [["EXPRESSION", {
94
                  "args" : [["EXPRESSION", {
95
                    "args" : [["EXPRESSION", {
96
                      "args" : [["EXPRESSION", {
97
                        "args" : [["EXPRESSION", {
98
                          "args" : [["EXPRESSION", {
99
                            "args" : [["EXPRESSION", {
100
                              "args" : [["CALL", ["INDEXED_NAME", {
101
                                "id" : ["SIMPLE_NAME", "rising_edge"], "exprs" : [["EXPRESSION", {
102
                                  "args" : [["EXPRESSION", {
103
                                    "args" : [["EXPRESSION", {
104
                                      "args" : [["EXPRESSION", {
105
                                        "args" : [["CALL", ["SIMPLE_NAME", "i_Clock"]]]}
106
                                      ]]}
107
                                    ]]}
108
                                  ]]}
109
                                ]]}
110
                              ]]]}
111
                            ]]}
112
                          ]]}
113
                        ]]}
114
                      ]]}
115
                    ]]}
116
                  ]]}
117
                ]]}
118
              ], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", {
119
                "lhs" : ["SIMPLE_NAME", "Q"], "rhs" : [{
120
                  "value" : ["EXPRESSION", {
121
                    "args" : [["EXPRESSION", {
122
                      "args" : [["EXPRESSION", {
123
                        "args" : [["EXPRESSION", {
124
                          "args" : [["CALL", ["SIMPLE_NAME", "D"]]]}
125
                        ]]}
126
                      ]]}
127
                    ]]}
128
                  ]}
129
                ]}
130
              ]]}
131
            ]}
132
          ]]}
133
        ]]}
134
      ]}
135
    ]}
136
  }