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Revision 3fd18385 vhdl_json/vhdl_files/2-exportOK/ghdl/ghdl/testsuite/vests/vhdl-93/ashenden/compliant/ch_05_ch_05_20.json

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vhdl_json/vhdl_files/2-exportOK/ghdl/ghdl/testsuite/vests/vhdl-93/ashenden/compliant/ch_05_ch_05_20.json
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          , {
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            "formal_name" : ["SELECTED_NAME", [["SIMPLE_NAME", "status"], ["IDENTIFIER", "empty"]]], "actual_designator" : ["SIMPLE_NAME", "DMA_buffer_empty"]}
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          , {
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            "formal_name" : ["SIMPLE_NAME", "other_ports"], "actual_designator" : ["SIMPLE_NAME", "open"]}
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            "formal_name" : ["SIMPLE_NAME", "other_ports"], "actual_designator" : ["OPEN"]}
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          ]}
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        ]]}
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      ]}

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