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Revision 3fd18385 vhdl_json/vhdl_files/2-exportOK/cnes_guidelines/rule/data/STD_00700_good.json

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vhdl_json/vhdl_files/2-exportOK/cnes_guidelines/rule/data/STD_00700_good.json
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          , {
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            "formal_name" : ["SIMPLE_NAME", "o_Q"], "actual_designator" : ["SIMPLE_NAME", "D"]}
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          , {
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            "formal_name" : ["SIMPLE_NAME", "o_Q_n"], "actual_designator" : ["SIMPLE_NAME", "open"]}
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            "formal_name" : ["SIMPLE_NAME", "o_Q_n"], "actual_designator" : ["OPEN"]}
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          ]}
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        ], ["PROCESS_STATEMENT", {
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          "id" : ["IDENTIFIER", "P_FlipFlop"], "active_sigs" : [["SIMPLE_NAME", "i_Reset_n"], ["SIMPLE_NAME", "i_Clock"]], "PROCESS_STATEMENT_PART" : [["IF_STATEMENT", {
......
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                        "args" : [["EXPRESSION", {
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                          "args" : [["EXPRESSION", {
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                            "args" : [["EXPRESSION", {
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                              "args" : [["CALL", ["FUNCTION_CALL", {
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                                "id" : ["SIMPLE_NAME", "rising_edge"], "assoc_list" : [{
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                                  "actual_designator" : ["SIMPLE_NAME", "i_Clock"]}
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                                ]}
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                              "args" : [["CALL", ["INDEXED_NAME", {
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                                "id" : ["SIMPLE_NAME", "rising_edge"], "exprs" : [["EXPRESSION", {
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                                  "args" : [["EXPRESSION", {
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                                    "args" : [["EXPRESSION", {
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                                      "args" : [["EXPRESSION", {
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                                        "args" : [["CALL", ["SIMPLE_NAME", "i_Clock"]]]}
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                                      ]]}
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                                    ]]}
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                                  ]]}
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                                ]]}
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                              ]]]}
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                            ]]}
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                          ]]}

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