lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / ghdl / ghdl / testsuite / vests / vhdl-93 / ashenden / compliant / ch_21_fg_21_04.json @ 3fd18385
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1 | 2051e520 | Arnaud Dieumegard | { |
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2 | "DESIGN_FILE" : {
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3 | "design_units" : [{
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4 | "contexts" : [["LIBRARY_CLAUSE", [["IDENTIFIER", "ieee"]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "ieee"], ["SIMPLE_NAME", "std_logic_1164"]]]]]], "library" : ["ENTITY_DECLARATION", { |
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5 | "name" : ["IDENTIFIER", "processor"], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []} |
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6 | ]} |
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7 | , { |
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8 | "contexts" : [], "library" : ["ARCHITECTURE_BODY", { |
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9 | "name" : ["IDENTIFIER", "rtl"], "entity" : ["IDENTIFIER", "processor"], "ARCHITECTURE_DECLARATIVE_PART" : [{ |
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10 | "declaration" : ["COMPONENT_DECLARATION", { |
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11 | "name" : ["IDENTIFIER", "latch"], "generics" : [{ |
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12 | "names" : [["IDENTIFIER", "width"]], "typ" : { |
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13 | "name" : ["SIMPLE_NAME", "positive"]} |
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14 | } |
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15 | ], "ports" : [{
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16 | "names" : [["IDENTIFIER", "d"]], "mode" : ["in"], "typ" : { |
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17 | "name" : ["SIMPLE_NAME", "std_ulogic_vector"], "const" : ["INDEX_CONSTRAINT", { |
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18 | "ranges" : [["RANGE_WITH_DIRECTION", { |
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19 | "direction" : "to", "from" : ["EXPRESSION", { |
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20 | "args" : [["EXPRESSION", { |
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21 | "args" : [["CONSTANT_VALUE", { |
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22 | "value" : ["CST_LITERAL", "0"]} |
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23 | ]]} |
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24 | ]]} |
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25 | ], "_to" : ["EXPRESSION", { |
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26 | "args" : [["EXPRESSION", { |
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27 | "id" : "-", "args" : [["EXPRESSION", { |
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28 | "args" : [["CALL", ["SIMPLE_NAME", "width"]]]} |
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29 | ], ["EXPRESSION", {
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30 | "args" : [["CONSTANT_VALUE", { |
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31 | "value" : ["CST_LITERAL", "1"]} |
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32 | ]]} |
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33 | ]]} |
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34 | ]]} |
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35 | ]} |
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36 | ]]} |
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37 | ]} |
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38 | } |
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39 | , { |
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40 | "names" : [["IDENTIFIER", "q"]], "mode" : ["out"], "typ" : { |
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41 | "name" : ["SIMPLE_NAME", "std_ulogic_vector"], "const" : ["INDEX_CONSTRAINT", { |
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42 | "ranges" : [["RANGE_WITH_DIRECTION", { |
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43 | "direction" : "to", "from" : ["EXPRESSION", { |
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44 | "args" : [["EXPRESSION", { |
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45 | "args" : [["CONSTANT_VALUE", { |
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46 | "value" : ["CST_LITERAL", "0"]} |
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47 | ]]} |
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48 | ]]} |
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49 | ], "_to" : ["EXPRESSION", { |
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50 | "args" : [["EXPRESSION", { |
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51 | "id" : "-", "args" : [["EXPRESSION", { |
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52 | "args" : [["CALL", ["SIMPLE_NAME", "width"]]]} |
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53 | ], ["EXPRESSION", {
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54 | "args" : [["CONSTANT_VALUE", { |
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55 | "value" : ["CST_LITERAL", "1"]} |
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56 | ]]} |
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57 | ]]} |
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58 | ]]} |
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59 | ]} |
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60 | ]]} |
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61 | ]} |
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62 | } |
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63 | , { |
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64 | "names" : [["IDENTIFIER", "other_port"]], "mode" : ["in"], "typ" : { |
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65 | "name" : ["SIMPLE_NAME", "std_ulogic"]} |
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66 | , "expr" : ["EXPRESSION", { |
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67 | "args" : [["EXPRESSION", { |
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68 | "args" : [["EXPRESSION", { |
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69 | "args" : [["EXPRESSION", { |
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70 | "args" : [["CONSTANT_VALUE", { |
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71 | "value" : ["CST_LITERAL", "'-'"]} |
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72 | ]]} |
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73 | ]]} |
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74 | ]]} |
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75 | ]]} |
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76 | ]} |
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77 | ]} |
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78 | ]} |
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79 | , { |
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80 | "declaration" : ["COMPONENT_DECLARATION", { |
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81 | "name" : ["IDENTIFIER", "ROM"], "ports" : [{ |
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82 | "names" : [["IDENTIFIER", "d_out"]], "mode" : ["out"], "typ" : { |
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83 | "name" : ["SIMPLE_NAME", "std_ulogic_vector"]} |
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84 | } |
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85 | , { |
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86 | "names" : [["IDENTIFIER", "other_port"]], "mode" : ["in"], "typ" : { |
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87 | "name" : ["SIMPLE_NAME", "std_ulogic"]} |
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88 | , "expr" : ["EXPRESSION", { |
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89 | "args" : [["EXPRESSION", { |
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90 | "args" : [["EXPRESSION", { |
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91 | "args" : [["EXPRESSION", { |
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92 | "args" : [["CONSTANT_VALUE", { |
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93 | "value" : ["CST_LITERAL", "'-'"]} |
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94 | ]]} |
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95 | ]]} |
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96 | ]]} |
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97 | ]]} |
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98 | ]} |
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99 | ]} |
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100 | ]} |
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101 | , { |
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102 | "definition" : ["SUBTYPE_DECLARATION", { |
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103 | "name" : ["IDENTIFIER", "std_logic_word"], "typ" : { |
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104 | "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", { |
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105 | "ranges" : [["RANGE_WITH_DIRECTION", { |
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106 | "direction" : "to", "from" : ["EXPRESSION", { |
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107 | "args" : [["EXPRESSION", { |
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108 | "args" : [["CONSTANT_VALUE", { |
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109 | "value" : ["CST_LITERAL", "0"]} |
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110 | ]]} |
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111 | ]]} |
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112 | ], "_to" : ["EXPRESSION", { |
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113 | "args" : [["EXPRESSION", { |
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114 | "args" : [["CONSTANT_VALUE", { |
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115 | "value" : ["CST_LITERAL", "31"]} |
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116 | ]]} |
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117 | ]]} |
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118 | ]} |
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119 | ]]} |
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120 | ]} |
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121 | } |
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122 | ]} |
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123 | , { |
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124 | "declaration" : ["SIGNAL_DECLARATION", { |
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125 | "names" : [["IDENTIFIER", "source1"], ["IDENTIFIER", "source2"], ["IDENTIFIER", "destination"]], "typ" : { |
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126 | "name" : ["SIMPLE_NAME", "std_logic_word"]} |
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127 | } |
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128 | ]} |
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129 | ], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", { |
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130 | ddabd63e | Arnaud Dieumegard | "name" : ["IDENTIFIER", "temp_register"], "inst_unit" : ["SIMPLE_NAME", "latch"], "inst_unit_type" : "component", "generic_map" : [{ |
131 | 2051e520 | Arnaud Dieumegard | "formal_name" : ["SIMPLE_NAME", "width"], "actual_expr" : ["EXPRESSION", { |
132 | "args" : [["EXPRESSION", { |
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133 | "args" : [["EXPRESSION", { |
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134 | "args" : [["EXPRESSION", { |
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135 | "args" : [["CONSTANT_VALUE", { |
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136 | "value" : ["CST_LITERAL", "32"]} |
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137 | ]]} |
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138 | ]]} |
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139 | ]]} |
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140 | ]]} |
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141 | ]} |
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142 | ], "port_map" : [{
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143 | 3fd18385 | Arnaud Dieumegard | "formal_name" : ["SIMPLE_NAME", "d"], "actual_designator" : ["INDEXED_NAME", { |
144 | "id" : ["SIMPLE_NAME", "std_ulogic_vector"], "exprs" : [["EXPRESSION", { |
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145 | 2051e520 | Arnaud Dieumegard | "args" : [["EXPRESSION", { |
146 | "args" : [["EXPRESSION", { |
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147 | 3fd18385 | Arnaud Dieumegard | "args" : [["EXPRESSION", { |
148 | "args" : [["CALL", ["SIMPLE_NAME", "destination"]]]} |
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149 | ]]} |
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150 | 2051e520 | Arnaud Dieumegard | ]]} |
151 | ]]} |
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152 | ]]} |
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153 | ]} |
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154 | , { |
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155 | "formal_name" : ["INDEXED_NAME", { |
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156 | "id" : ["SIMPLE_NAME", "std_logic_vector"], "exprs" : [["EXPRESSION", { |
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157 | "args" : [["EXPRESSION", { |
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158 | "args" : [["EXPRESSION", { |
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159 | "args" : [["EXPRESSION", { |
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160 | "args" : [["CALL", ["SIMPLE_NAME", "q"]]]} |
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161 | ]]} |
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162 | ]]} |
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163 | ]]} |
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164 | ]]} |
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165 | ], "actual_designator" : ["SIMPLE_NAME", "source1"]} |
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166 | , { |
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167 | 3fd18385 | Arnaud Dieumegard | "formal_name" : ["SIMPLE_NAME", "other_port"], "actual_designator" : ["OPEN"]} |
168 | 2051e520 | Arnaud Dieumegard | ]} |
169 | ], ["COMPONENT_INSTANTIATION_STATEMENT", {
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170 | ddabd63e | Arnaud Dieumegard | "name" : ["IDENTIFIER", "constant_ROM"], "inst_unit" : ["SIMPLE_NAME", "ROM"], "inst_unit_type" : "component", "port_map" : [{ |
171 | 2051e520 | Arnaud Dieumegard | "formal_name" : ["INDEXED_NAME", { |
172 | "id" : ["SIMPLE_NAME", "std_logic_word"], "exprs" : [["EXPRESSION", { |
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173 | "args" : [["EXPRESSION", { |
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174 | "args" : [["EXPRESSION", { |
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175 | "args" : [["EXPRESSION", { |
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176 | "args" : [["CALL", ["SIMPLE_NAME", "d_out"]]]} |
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177 | ]]} |
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178 | ]]} |
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179 | ]]} |
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180 | ]]} |
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181 | ], "actual_designator" : ["SIMPLE_NAME", "source2"]} |
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182 | , { |
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183 | 3fd18385 | Arnaud Dieumegard | "formal_name" : ["SIMPLE_NAME", "other_port"], "actual_designator" : ["OPEN"]} |
184 | 2051e520 | Arnaud Dieumegard | ]} |
185 | ]]} |
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186 | ]} |
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187 | ]} |
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188 | } |