lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / ghdl / ghdl / testsuite / vests / vhdl-93 / ashenden / compliant / ch_06_reg-b.json @ 3fd18385
History | View | Annotate | Download (1.77 KB)
| 1 | 2051e520 | Arnaud Dieumegard | {
|
|---|---|---|---|
| 2 | "DESIGN_FILE" : {
|
||
| 3 | "design_units" : [{
|
||
| 4 | "contexts" : [], "library" : ["ARCHITECTURE_BODY", { |
||
| 5 | "name" : ["IDENTIFIER", "behavioral"], "entity" : ["IDENTIFIER", "reg"], "ARCHITECTURE_DECLARATIVE_PART" : [], "ARCHITECTURE_STATEMENT_PART" : [["PROCESS_STATEMENT", { |
||
| 6 | "id" : ["IDENTIFIER", "behavior"], "active_sigs" : [["SIMPLE_NAME", "clk"]], "PROCESS_STATEMENT_PART" : [["IF_STATEMENT", { |
||
| 7 | "if_cases" : [{
|
||
| 8 | "if_cond" : ["EXPRESSION", { |
||
| 9 | "args" : [["EXPRESSION", { |
||
| 10 | "args" : [["EXPRESSION", { |
||
| 11 | "args" : [["EXPRESSION", { |
||
| 12 | 3fd18385 | Arnaud Dieumegard | "args" : [["CALL", ["INDEXED_NAME", { |
| 13 | "id" : ["SIMPLE_NAME", "rising_edge"], "exprs" : [["EXPRESSION", { |
||
| 14 | "args" : [["EXPRESSION", { |
||
| 15 | "args" : [["EXPRESSION", { |
||
| 16 | "args" : [["EXPRESSION", { |
||
| 17 | "args" : [["CALL", ["SIMPLE_NAME", "clk"]]]} |
||
| 18 | ]]} |
||
| 19 | ]]} |
||
| 20 | ]]} |
||
| 21 | ]]} |
||
| 22 | 2051e520 | Arnaud Dieumegard | ]]]} |
| 23 | ]]} |
||
| 24 | ]]} |
||
| 25 | ]]} |
||
| 26 | ], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", { |
||
| 27 | "lhs" : ["SIMPLE_NAME", "q"], "rhs" : [{ |
||
| 28 | "value" : ["EXPRESSION", { |
||
| 29 | "args" : [["EXPRESSION", { |
||
| 30 | "args" : [["EXPRESSION", { |
||
| 31 | "args" : [["EXPRESSION", { |
||
| 32 | "args" : [["CALL", ["SIMPLE_NAME", "d"]]]} |
||
| 33 | ]]} |
||
| 34 | ]]} |
||
| 35 | ]]} |
||
| 36 | ]} |
||
| 37 | ]} |
||
| 38 | ]]} |
||
| 39 | ]} |
||
| 40 | ]]} |
||
| 41 | ]]} |
||
| 42 | ]} |
||
| 43 | ]} |
||
| 44 | } |