lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / ghdl / ghdl / testsuite / vests / vhdl-93 / ashenden / compliant / ch_04_tb_04_01.json @ 3fd18385
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| 1 | 3fd18385 | Arnaud Dieumegard | {
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| 2 | "DESIGN_FILE" : {
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| 3 | "design_units" : [{
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| 4 | "contexts" : [], "library" : ["ENTITY_DECLARATION", { |
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| 5 | "name" : ["IDENTIFIER", "test_bench_04_01"], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []} |
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| 6 | ]} |
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| 7 | , {
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| 8 | "contexts" : [["LIBRARY_CLAUSE", [["IDENTIFIER", "ch4_pkgs"]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "ch4_pkgs"], ["SIMPLE_NAME", "pk_04_01"]]]]]], "library" : ["ARCHITECTURE_BODY", { |
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| 9 | "name" : ["IDENTIFIER", "test_coeff_ram_abstract"], "entity" : ["IDENTIFIER", "test_bench_04_01"], "ARCHITECTURE_DECLARATIVE_PART" : [{ |
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| 10 | "declaration" : ["SIGNAL_DECLARATION", { |
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| 11 | "names" : [["IDENTIFIER", "rd"], ["IDENTIFIER", "wr"]], "typ" : { |
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| 12 | "name" : ["SIMPLE_NAME", "bit"]} |
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| 13 | , "init_val" : ["EXPRESSION", { |
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| 14 | "args" : [["EXPRESSION", { |
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| 15 | "args" : [["EXPRESSION", { |
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| 16 | "args" : [["EXPRESSION", { |
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| 17 | "args" : [["CONSTANT_VALUE", { |
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| 18 | "value" : ["CST_LITERAL", "'0'"]} |
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| 19 | ]]} |
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| 20 | ]]} |
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| 21 | ]]} |
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| 22 | ]]} |
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| 23 | ]} |
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| 24 | ]} |
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| 25 | , {
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| 26 | "declaration" : ["SIGNAL_DECLARATION", { |
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| 27 | "names" : [["IDENTIFIER", "addr"]], "typ" : { |
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| 28 | "name" : ["SIMPLE_NAME", "coeff_ram_address"]} |
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| 29 | , "init_val" : ["EXPRESSION", { |
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| 30 | "args" : [["EXPRESSION", { |
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| 31 | "args" : [["EXPRESSION", { |
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| 32 | "args" : [["EXPRESSION", { |
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| 33 | "args" : [["CONSTANT_VALUE", { |
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| 34 | "value" : ["CST_LITERAL", "0"]} |
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| 35 | ]]} |
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| 36 | ]]} |
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| 37 | ]]} |
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| 38 | ]]} |
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| 39 | ]} |
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| 40 | ]} |
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| 41 | , {
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| 42 | "declaration" : ["SIGNAL_DECLARATION", { |
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| 43 | "names" : [["IDENTIFIER", "d_in"], ["IDENTIFIER", "d_out"]], "typ" : { |
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| 44 | "name" : ["SIMPLE_NAME", "real"]} |
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| 45 | , "init_val" : ["EXPRESSION", { |
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| 46 | "args" : [["EXPRESSION", { |
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| 47 | "args" : [["EXPRESSION", { |
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| 48 | "args" : [["EXPRESSION", { |
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| 49 | "args" : [["CONSTANT_VALUE", { |
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| 50 | "value" : ["CST_LITERAL", "0.0"]} |
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| 51 | ]]} |
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| 52 | ]]} |
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| 53 | ]]} |
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| 54 | ]]} |
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| 55 | ]} |
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| 56 | ]} |
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| 57 | ], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", { |
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| 58 | "name" : ["IDENTIFIER", "dut"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "coeff_ram"]]], "inst_unit_type" : "entity", "archi_name" : ["IDENTIFIER", "abstract"], "port_map" : [{ |
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| 59 | "formal_name" : ["SIMPLE_NAME", "rd"], "actual_designator" : ["SIMPLE_NAME", "rd"]} |
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| 60 | , {
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| 61 | "formal_name" : ["SIMPLE_NAME", "wr"], "actual_designator" : ["SIMPLE_NAME", "wr"]} |
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| 62 | , {
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| 63 | "formal_name" : ["SIMPLE_NAME", "addr"], "actual_designator" : ["SIMPLE_NAME", "addr"]} |
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| 64 | , {
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| 65 | "formal_name" : ["SIMPLE_NAME", "d_in"], "actual_designator" : ["SIMPLE_NAME", "d_in"]} |
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| 66 | , {
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| 67 | "formal_name" : ["SIMPLE_NAME", "d_out"], "actual_designator" : ["SIMPLE_NAME", "d_out"]} |
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| 68 | ]} |
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| 69 | ], ["PROCESS_STATEMENT", {
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| 70 | "id" : ["IDENTIFIER", "stumulus"], "PROCESS_STATEMENT_PART" : [["WAIT_STATEMENT"], ["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 71 | "lhs" : ["SIMPLE_NAME", "addr"], "rhs" : [{ |
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| 72 | "value" : ["EXPRESSION", { |
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| 73 | "args" : [["EXPRESSION", { |
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| 74 | "args" : [["EXPRESSION", { |
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| 75 | "args" : [["EXPRESSION", { |
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| 76 | "args" : [["CONSTANT_VALUE", { |
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| 77 | "value" : ["CST_LITERAL", "10"]} |
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| 78 | ]]} |
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| 79 | ]]} |
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| 80 | ]]} |
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| 81 | ]]} |
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| 82 | ]} |
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| 83 | ]} |
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| 84 | ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
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| 85 | "lhs" : ["SIMPLE_NAME", "d_in"], "rhs" : [{ |
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| 86 | "value" : ["EXPRESSION", { |
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| 87 | "args" : [["EXPRESSION", { |
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| 88 | "args" : [["EXPRESSION", { |
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| 89 | "args" : [["EXPRESSION", { |
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| 90 | "args" : [["CONSTANT_VALUE", { |
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| 91 | "value" : ["CST_LITERAL", "10.0"]} |
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| 92 | ]]} |
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| 93 | ]]} |
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| 94 | ]]} |
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| 95 | ]]} |
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| 96 | ]} |
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| 97 | ]} |
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| 98 | ], ["WAIT_STATEMENT"], ["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 99 | "lhs" : ["SIMPLE_NAME", "wr"], "rhs" : [{ |
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| 100 | "value" : ["EXPRESSION", { |
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| 101 | "args" : [["EXPRESSION", { |
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| 102 | "args" : [["EXPRESSION", { |
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| 103 | "args" : [["EXPRESSION", { |
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| 104 | "args" : [["CONSTANT_VALUE", { |
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| 105 | "value" : ["CST_LITERAL", "'1'"]} |
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| 106 | ]]} |
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| 107 | ]]} |
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| 108 | ]]} |
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| 109 | ]]} |
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| 110 | ]} |
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| 111 | ]} |
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| 112 | ], ["WAIT_STATEMENT"], ["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 113 | "lhs" : ["SIMPLE_NAME", "d_in"], "rhs" : [{ |
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| 114 | "value" : ["EXPRESSION", { |
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| 115 | "args" : [["EXPRESSION", { |
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| 116 | "args" : [["EXPRESSION", { |
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| 117 | "args" : [["EXPRESSION", { |
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| 118 | "args" : [["CONSTANT_VALUE", { |
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| 119 | "value" : ["CST_LITERAL", "20.0"]} |
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| 120 | ]]} |
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| 121 | ]]} |
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| 122 | ]]} |
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| 123 | ]]} |
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| 124 | ]} |
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| 125 | ]} |
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| 126 | ], ["WAIT_STATEMENT"], ["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 127 | "lhs" : ["SIMPLE_NAME", "wr"], "rhs" : [{ |
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| 128 | "value" : ["EXPRESSION", { |
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| 129 | "args" : [["EXPRESSION", { |
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| 130 | "args" : [["EXPRESSION", { |
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| 131 | "args" : [["EXPRESSION", { |
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| 132 | "args" : [["CONSTANT_VALUE", { |
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| 133 | "value" : ["CST_LITERAL", "'0'"]} |
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| 134 | ]]} |
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| 135 | ]]} |
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| 136 | ]]} |
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| 137 | ]]} |
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| 138 | ]} |
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| 139 | ]} |
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| 140 | ], ["WAIT_STATEMENT"], ["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 141 | "lhs" : ["SIMPLE_NAME", "addr"], "rhs" : [{ |
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| 142 | "value" : ["EXPRESSION", { |
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| 143 | "args" : [["EXPRESSION", { |
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| 144 | "args" : [["EXPRESSION", { |
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| 145 | "args" : [["EXPRESSION", { |
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| 146 | "args" : [["CONSTANT_VALUE", { |
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| 147 | "value" : ["CST_LITERAL", "20"]} |
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| 148 | ]]} |
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| 149 | ]]} |
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| 150 | ]]} |
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| 151 | ]]} |
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| 152 | ]} |
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| 153 | ]} |
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| 154 | ], ["WAIT_STATEMENT"], ["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 155 | "lhs" : ["SIMPLE_NAME", "rd"], "rhs" : [{ |
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| 156 | "value" : ["EXPRESSION", { |
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| 157 | "args" : [["EXPRESSION", { |
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| 158 | "args" : [["EXPRESSION", { |
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| 159 | "args" : [["EXPRESSION", { |
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| 160 | "args" : [["CONSTANT_VALUE", { |
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| 161 | "value" : ["CST_LITERAL", "'1'"]} |
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| 162 | ]]} |
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| 163 | ]]} |
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| 164 | ]]} |
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| 165 | ]]} |
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| 166 | ]} |
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| 167 | ]} |
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| 168 | ], ["WAIT_STATEMENT"], ["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 169 | "lhs" : ["SIMPLE_NAME", "addr"], "rhs" : [{ |
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| 170 | "value" : ["EXPRESSION", { |
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| 171 | "args" : [["EXPRESSION", { |
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| 172 | "args" : [["EXPRESSION", { |
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| 173 | "args" : [["EXPRESSION", { |
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| 174 | "args" : [["CONSTANT_VALUE", { |
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| 175 | "value" : ["CST_LITERAL", "10"]} |
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| 176 | ]]} |
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| 177 | ]]} |
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| 178 | ]]} |
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| 179 | ]]} |
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| 180 | ]} |
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| 181 | ]} |
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| 182 | ], ["WAIT_STATEMENT"], ["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 183 | "lhs" : ["SIMPLE_NAME", "rd"], "rhs" : [{ |
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| 184 | "value" : ["EXPRESSION", { |
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| 185 | "args" : [["EXPRESSION", { |
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| 186 | "args" : [["EXPRESSION", { |
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| 187 | "args" : [["EXPRESSION", { |
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| 188 | "args" : [["CONSTANT_VALUE", { |
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| 189 | "value" : ["CST_LITERAL", "'0'"]} |
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| 190 | ]]} |
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| 191 | ]]} |
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| 192 | ]]} |
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| 193 | ]]} |
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| 194 | ]} |
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| 195 | ]} |
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| 196 | ], ["WAIT_STATEMENT"], ["WAIT_STATEMENT"]]} |
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| 197 | ]]} |
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| 198 | ]} |
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| 199 | ]} |
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| 200 | } |