lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / cnes_guidelines / rule / data / CNE_01900_bad.json @ 3fd18385
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| 1 | 2051e520 | Arnaud Dieumegard | {
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| 2 | "DESIGN_FILE" : {
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| 3 | "design_units" : [{
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| 4 | "contexts" : [["LIBRARY_CLAUSE", [["IDENTIFIER", "IEEE"]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "IEEE"], ["SIMPLE_NAME", "std_logic_1164"]]]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "IEEE"], ["SIMPLE_NAME", "numeric_std"]]]]]], "library" : ["ENTITY_DECLARATION", { |
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| 5 | "name" : ["IDENTIFIER", "CNE_01900_bad"], "ports" : [{ |
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| 6 | "names" : [["IDENTIFIER", "i_Reset_n"]], "mode" : ["in"], "typ" : { |
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| 7 | "name" : ["SIMPLE_NAME", "std_logic"]} |
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| 8 | } |
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| 9 | , {
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| 10 | "names" : [["IDENTIFIER", "i_Clock"]], "mode" : ["in"], "typ" : { |
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| 11 | "name" : ["SIMPLE_NAME", "std_logic"]} |
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| 12 | } |
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| 13 | , {
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| 14 | "names" : [["IDENTIFIER", "i_D"]], "mode" : ["in"], "typ" : { |
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| 15 | "name" : ["SIMPLE_NAME", "std_logic"]} |
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| 16 | } |
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| 17 | , {
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| 18 | "names" : [["IDENTIFIER", "o_D_re"]], "mode" : ["out"], "typ" : { |
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| 19 | "name" : ["SIMPLE_NAME", "std_logic"]} |
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| 20 | } |
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| 21 | ], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []} |
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| 22 | ]} |
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| 23 | , {
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| 24 | "contexts" : [], "library" : ["ARCHITECTURE_BODY", { |
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| 25 | "name" : ["IDENTIFIER", "Behavioral"], "entity" : ["IDENTIFIER", "CNE_01900_bad"], "ARCHITECTURE_DECLARATIVE_PART" : [{ |
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| 26 | "declaration" : ["SIGNAL_DECLARATION", { |
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| 27 | "names" : [["IDENTIFIER", "D_clocked"]], "typ" : { |
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| 28 | "name" : ["SIMPLE_NAME", "std_logic"]} |
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| 29 | } |
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| 30 | ]} |
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| 31 | , {
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| 32 | "declaration" : ["SIGNAL_DECLARATION", { |
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| 33 | "names" : [["IDENTIFIER", "D_clocked2"]], "typ" : { |
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| 34 | "name" : ["SIMPLE_NAME", "std_logic"]} |
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| 35 | } |
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| 36 | ]} |
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| 37 | ], "ARCHITECTURE_STATEMENT_PART" : [["PROCESS_STATEMENT", { |
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| 38 | "id" : ["IDENTIFIER", "P_detection"], "active_sigs" : [["SIMPLE_NAME", "i_Reset_n"], ["SIMPLE_NAME", "i_Clock"]], "PROCESS_STATEMENT_PART" : [["IF_STATEMENT", { |
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| 39 | "if_cases" : [{
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| 40 | "if_cond" : ["EXPRESSION", { |
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| 41 | "args" : [["EXPRESSION", { |
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| 42 | "args" : [["EXPRESSION", { |
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| 43 | "args" : [["EXPRESSION", { |
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| 44 | "args" : [["EXPRESSION", { |
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| 45 | "id" : "=", "args" : [["EXPRESSION", { |
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| 46 | "args" : [["EXPRESSION", { |
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| 47 | "args" : [["EXPRESSION", { |
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| 48 | "args" : [["CALL", ["SIMPLE_NAME", "i_Reset_n"]]]} |
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| 49 | ]]} |
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| 50 | ]]} |
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| 51 | ], ["EXPRESSION", {
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| 52 | "args" : [["EXPRESSION", { |
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| 53 | "args" : [["EXPRESSION", { |
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| 54 | "args" : [["CONSTANT_VALUE", { |
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| 55 | "value" : ["CST_LITERAL", "'0'"]} |
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| 56 | ]]} |
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| 57 | ]]} |
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| 58 | ]]} |
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| 59 | ]]} |
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| 60 | ]]} |
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| 61 | ]]} |
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| 62 | ]]} |
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| 63 | ]]} |
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| 64 | ], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 65 | "lhs" : ["SIMPLE_NAME", "D_clocked"], "rhs" : [{ |
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| 66 | "value" : ["EXPRESSION", { |
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| 67 | "args" : [["EXPRESSION", { |
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| 68 | "args" : [["EXPRESSION", { |
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| 69 | "args" : [["EXPRESSION", { |
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| 70 | "args" : [["CONSTANT_VALUE", { |
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| 71 | "value" : ["CST_LITERAL", "'0'"]} |
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| 72 | ]]} |
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| 73 | ]]} |
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| 74 | ]]} |
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| 75 | ]]} |
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| 76 | ]} |
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| 77 | ]} |
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| 78 | ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
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| 79 | "lhs" : ["SIMPLE_NAME", "D_clocked2"], "rhs" : [{ |
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| 80 | "value" : ["EXPRESSION", { |
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| 81 | "args" : [["EXPRESSION", { |
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| 82 | "args" : [["EXPRESSION", { |
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| 83 | "args" : [["EXPRESSION", { |
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| 84 | "args" : [["CONSTANT_VALUE", { |
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| 85 | "value" : ["CST_LITERAL", "'0'"]} |
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| 86 | ]]} |
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| 87 | ]]} |
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| 88 | ]]} |
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| 89 | ]]} |
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| 90 | ]} |
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| 91 | ]} |
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| 92 | ]]} |
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| 93 | , {
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| 94 | "if_cond" : ["EXPRESSION", { |
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| 95 | "args" : [["EXPRESSION", { |
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| 96 | "args" : [["EXPRESSION", { |
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| 97 | "args" : [["EXPRESSION", { |
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| 98 | "args" : [["EXPRESSION", { |
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| 99 | "args" : [["EXPRESSION", { |
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| 100 | "args" : [["EXPRESSION", { |
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| 101 | "args" : [["EXPRESSION", { |
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| 102 | 3fd18385 | Arnaud Dieumegard | "args" : [["CALL", ["INDEXED_NAME", { |
| 103 | "id" : ["SIMPLE_NAME", "rising_edge"], "exprs" : [["EXPRESSION", { |
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| 104 | "args" : [["EXPRESSION", { |
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| 105 | "args" : [["EXPRESSION", { |
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| 106 | "args" : [["EXPRESSION", { |
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| 107 | "args" : [["CALL", ["SIMPLE_NAME", "i_Clock"]]]} |
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| 108 | ]]} |
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| 109 | ]]} |
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| 110 | ]]} |
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| 111 | ]]} |
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| 112 | 2051e520 | Arnaud Dieumegard | ]]]} |
| 113 | ]]} |
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| 114 | ]]} |
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| 115 | ]]} |
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| 116 | ]]} |
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| 117 | ]]} |
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| 118 | ]]} |
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| 119 | ]]} |
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| 120 | ], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", { |
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| 121 | "lhs" : ["SIMPLE_NAME", "D_clocked"], "rhs" : [{ |
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| 122 | "value" : ["EXPRESSION", { |
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| 123 | "args" : [["EXPRESSION", { |
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| 124 | "args" : [["EXPRESSION", { |
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| 125 | "args" : [["EXPRESSION", { |
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| 126 | "args" : [["CALL", ["SIMPLE_NAME", "i_D"]]]} |
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| 127 | ]]} |
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| 128 | ]]} |
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| 129 | ]]} |
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| 130 | ]} |
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| 131 | ]} |
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| 132 | ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
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| 133 | "lhs" : ["SIMPLE_NAME", "D_clocked2"], "rhs" : [{ |
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| 134 | "value" : ["EXPRESSION", { |
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| 135 | "args" : [["EXPRESSION", { |
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| 136 | "args" : [["EXPRESSION", { |
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| 137 | "args" : [["EXPRESSION", { |
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| 138 | "args" : [["CALL", ["SIMPLE_NAME", "D_clocked"]]]} |
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| 139 | ]]} |
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| 140 | ]]} |
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| 141 | ]]} |
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| 142 | ]} |
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| 143 | ]} |
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| 144 | ]]} |
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| 145 | ]} |
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| 146 | ]]} |
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| 147 | ], ["CONDITIONAL_SIGNAL_ASSIGNMENT", {
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| 148 | "postponed" : false, "lhs" : ["SIMPLE_NAME", "o_D_re"], "rhs" : [{ |
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| 149 | "expr" : [{
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| 150 | "value" : ["EXPRESSION", { |
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| 151 | "id" : "and", "args" : [["EXPRESSION", { |
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| 152 | "args" : [["EXPRESSION", { |
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| 153 | "args" : [["EXPRESSION", { |
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| 154 | "args" : [["EXPRESSION", { |
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| 155 | "args" : [["CALL", ["SIMPLE_NAME", "D_clocked"]]]} |
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| 156 | ]]} |
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| 157 | ]]} |
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| 158 | ]]} |
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| 159 | ], ["EXPRESSION", {
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| 160 | "args" : [["EXPRESSION", { |
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| 161 | "args" : [["EXPRESSION", { |
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| 162 | "args" : [["EXPRESSION", { |
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| 163 | "id" : "not", "args" : [["CALL", ["SIMPLE_NAME", "D_clocked2"]]]} |
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| 164 | ]]} |
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| 165 | ]]} |
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| 166 | ]]} |
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| 167 | ]]} |
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| 168 | ]} |
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| 169 | ]} |
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| 170 | ]} |
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| 171 | ]]} |
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| 172 | ]} |
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| 173 | ]} |
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| 174 | } |