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lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / ghdl / ghdl / testsuite / gna / issue50 / idct.d / top.vhd @ 2051e520

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1
library ieee;
2
use ieee.std_logic_1164.all;
3

    
4
entity top is
5
	port (
6
		clock : in  std_logic;
7
		reset : in  std_logic;
8
		start : in  std_logic;
9
		cp_ok : out std_logic;
10
		cp_en : in  std_logic;
11
		cp_rest : in  std_logic;
12
		cp_din : in  std_logic_vector(63 downto 0);
13
		cp_dout : out std_logic_vector(63 downto 0);
14
		stdout_data : out std_logic_vector(7 downto 0);
15
		stdout_rdy : out std_logic;
16
		stdout_ack : in  std_logic;
17
		stdin_data : in  std_logic_vector(31 downto 0);
18
		stdin_rdy : out std_logic;
19
		stdin_ack : in  std_logic
20
	);
21
end top;
22

    
23
architecture augh of top is
24

    
25
	-- Declaration of components
26

    
27
	component output_split2 is
28
		port (
29
			wa0_data : in  std_logic_vector(7 downto 0);
30
			wa0_addr : in  std_logic_vector(2 downto 0);
31
			ra0_data : out std_logic_vector(7 downto 0);
32
			ra0_addr : in  std_logic_vector(2 downto 0);
33
			wa0_en : in  std_logic;
34
			clk : in  std_logic
35
		);
36
	end component;
37

    
38
	component output_split3 is
39
		port (
40
			wa0_data : in  std_logic_vector(7 downto 0);
41
			wa0_addr : in  std_logic_vector(2 downto 0);
42
			ra0_data : out std_logic_vector(7 downto 0);
43
			ra0_addr : in  std_logic_vector(2 downto 0);
44
			wa0_en : in  std_logic;
45
			clk : in  std_logic
46
		);
47
	end component;
48

    
49
	component sub_159 is
50
		port (
51
			gt : out std_logic;
52
			result : out std_logic_vector(31 downto 0);
53
			in_a : in  std_logic_vector(31 downto 0);
54
			in_b : in  std_logic_vector(31 downto 0);
55
			sign : in  std_logic
56
		);
57
	end component;
58

    
59
	component add_165 is
60
		port (
61
			result : out std_logic_vector(26 downto 0);
62
			in_a : in  std_logic_vector(26 downto 0);
63
			in_b : in  std_logic_vector(26 downto 0)
64
		);
65
	end component;
66

    
67
	component output_split1 is
68
		port (
69
			wa0_data : in  std_logic_vector(7 downto 0);
70
			wa0_addr : in  std_logic_vector(2 downto 0);
71
			ra0_data : out std_logic_vector(7 downto 0);
72
			ra0_addr : in  std_logic_vector(2 downto 0);
73
			wa0_en : in  std_logic;
74
			clk : in  std_logic
75
		);
76
	end component;
77

    
78
	component output_split0 is
79
		port (
80
			wa0_data : in  std_logic_vector(7 downto 0);
81
			wa0_addr : in  std_logic_vector(2 downto 0);
82
			ra0_data : out std_logic_vector(7 downto 0);
83
			ra0_addr : in  std_logic_vector(2 downto 0);
84
			wa0_en : in  std_logic;
85
			clk : in  std_logic
86
		);
87
	end component;
88

    
89
	component add_172 is
90
		port (
91
			result : out std_logic_vector(19 downto 0);
92
			in_a : in  std_logic_vector(19 downto 0);
93
			in_b : in  std_logic_vector(19 downto 0)
94
		);
95
	end component;
96

    
97
	component add_176 is
98
		port (
99
			result : out std_logic_vector(19 downto 0);
100
			in_a : in  std_logic_vector(19 downto 0);
101
			in_b : in  std_logic_vector(19 downto 0)
102
		);
103
	end component;
104

    
105
	component add_181 is
106
		port (
107
			result : out std_logic_vector(31 downto 0);
108
			in_a : in  std_logic_vector(31 downto 0);
109
			in_b : in  std_logic_vector(31 downto 0)
110
		);
111
	end component;
112

    
113
	component sub_187 is
114
		port (
115
			result : out std_logic_vector(31 downto 0);
116
			in_a : in  std_logic_vector(31 downto 0);
117
			in_b : in  std_logic_vector(31 downto 0)
118
		);
119
	end component;
120

    
121
	component mul_189 is
122
		port (
123
			result : out std_logic_vector(30 downto 0);
124
			in_a : in  std_logic_vector(30 downto 0);
125
			in_b : in  std_logic_vector(13 downto 0)
126
		);
127
	end component;
128

    
129
	component add_191 is
130
		port (
131
			result : out std_logic_vector(30 downto 0);
132
			in_a : in  std_logic_vector(30 downto 0);
133
			in_b : in  std_logic_vector(30 downto 0)
134
		);
135
	end component;
136

    
137
	component mul_192 is
138
		port (
139
			result : out std_logic_vector(29 downto 0);
140
			in_a : in  std_logic_vector(29 downto 0);
141
			in_b : in  std_logic_vector(10 downto 0)
142
		);
143
	end component;
144

    
145
	component mul_193 is
146
		port (
147
			result : out std_logic_vector(31 downto 0);
148
			in_a : in  std_logic_vector(31 downto 0);
149
			in_b : in  std_logic_vector(14 downto 0)
150
		);
151
	end component;
152

    
153
	component mul_198 is
154
		port (
155
			result : out std_logic_vector(31 downto 0);
156
			in_a : in  std_logic_vector(31 downto 0);
157
			in_b : in  std_logic_vector(14 downto 0)
158
		);
159
	end component;
160

    
161
	component mul_199 is
162
		port (
163
			result : out std_logic_vector(30 downto 0);
164
			in_a : in  std_logic_vector(30 downto 0);
165
			in_b : in  std_logic_vector(13 downto 0)
166
		);
167
	end component;
168

    
169
	component sub_209 is
170
		port (
171
			result : out std_logic_vector(31 downto 0);
172
			in_a : in  std_logic_vector(31 downto 0);
173
			in_b : in  std_logic_vector(31 downto 0)
174
		);
175
	end component;
176

    
177
	component add_212 is
178
		port (
179
			result : out std_logic_vector(31 downto 0);
180
			in_a : in  std_logic_vector(31 downto 0);
181
			in_b : in  std_logic_vector(31 downto 0)
182
		);
183
	end component;
184

    
185
	component sub_213 is
186
		port (
187
			result : out std_logic_vector(31 downto 0);
188
			in_a : in  std_logic_vector(31 downto 0);
189
			in_b : in  std_logic_vector(31 downto 0)
190
		);
191
	end component;
192

    
193
	component sub_214 is
194
		port (
195
			result : out std_logic_vector(31 downto 0);
196
			in_a : in  std_logic_vector(31 downto 0);
197
			in_b : in  std_logic_vector(31 downto 0)
198
		);
199
	end component;
200

    
201
	component mul_215 is
202
		port (
203
			result : out std_logic_vector(31 downto 0);
204
			in_a : in  std_logic_vector(31 downto 0);
205
			in_b : in  std_logic_vector(15 downto 0)
206
		);
207
	end component;
208

    
209
	component mul_216 is
210
		port (
211
			result : out std_logic_vector(31 downto 0);
212
			in_a : in  std_logic_vector(31 downto 0);
213
			in_b : in  std_logic_vector(14 downto 0)
214
		);
215
	end component;
216

    
217
	component sub_217 is
218
		port (
219
			result : out std_logic_vector(31 downto 0);
220
			in_a : in  std_logic_vector(31 downto 0);
221
			in_b : in  std_logic_vector(31 downto 0)
222
		);
223
	end component;
224

    
225
	component mul_218 is
226
		port (
227
			result : out std_logic_vector(31 downto 0);
228
			in_a : in  std_logic_vector(31 downto 0);
229
			in_b : in  std_logic_vector(14 downto 0)
230
		);
231
	end component;
232

    
233
	component mul_219 is
234
		port (
235
			result : out std_logic_vector(31 downto 0);
236
			in_a : in  std_logic_vector(31 downto 0);
237
			in_b : in  std_logic_vector(15 downto 0)
238
		);
239
	end component;
240

    
241
	component sub_220 is
242
		port (
243
			result : out std_logic_vector(31 downto 0);
244
			in_a : in  std_logic_vector(31 downto 0);
245
			in_b : in  std_logic_vector(31 downto 0)
246
		);
247
	end component;
248

    
249
	component mul_223 is
250
		port (
251
			result : out std_logic_vector(30 downto 0);
252
			in_a : in  std_logic_vector(30 downto 0);
253
			in_b : in  std_logic_vector(14 downto 0)
254
		);
255
	end component;
256

    
257
	component sub_227 is
258
		port (
259
			result : out std_logic_vector(31 downto 0);
260
			in_a : in  std_logic_vector(31 downto 0);
261
			in_b : in  std_logic_vector(31 downto 0)
262
		);
263
	end component;
264

    
265
	component sub_157 is
266
		port (
267
			ge : out std_logic;
268
			result : out std_logic_vector(31 downto 0);
269
			in_a : in  std_logic_vector(31 downto 0);
270
			in_b : in  std_logic_vector(31 downto 0);
271
			sign : in  std_logic
272
		);
273
	end component;
274

    
275
	component add_163 is
276
		port (
277
			result : out std_logic_vector(15 downto 0);
278
			in_a : in  std_logic_vector(15 downto 0);
279
			in_b : in  std_logic_vector(15 downto 0)
280
		);
281
	end component;
282

    
283
	component cmp_164 is
284
		port (
285
			ne : out std_logic;
286
			in0 : in  std_logic_vector(15 downto 0);
287
			in1 : in  std_logic_vector(15 downto 0)
288
		);
289
	end component;
290

    
291
	component add_170 is
292
		port (
293
			result : out std_logic_vector(19 downto 0);
294
			in_a : in  std_logic_vector(19 downto 0);
295
			in_b : in  std_logic_vector(19 downto 0)
296
		);
297
	end component;
298

    
299
	component add_174 is
300
		port (
301
			result : out std_logic_vector(19 downto 0);
302
			in_a : in  std_logic_vector(19 downto 0);
303
			in_b : in  std_logic_vector(19 downto 0)
304
		);
305
	end component;
306

    
307
	component add_180 is
308
		port (
309
			result : out std_logic_vector(19 downto 0);
310
			in_a : in  std_logic_vector(19 downto 0);
311
			in_b : in  std_logic_vector(19 downto 0)
312
		);
313
	end component;
314

    
315
	component sub_186 is
316
		port (
317
			result : out std_logic_vector(31 downto 0);
318
			in_a : in  std_logic_vector(31 downto 0);
319
			in_b : in  std_logic_vector(31 downto 0)
320
		);
321
	end component;
322

    
323
	component mul_190 is
324
		port (
325
			result : out std_logic_vector(31 downto 0);
326
			in_a : in  std_logic_vector(31 downto 0);
327
			in_b : in  std_logic_vector(14 downto 0)
328
		);
329
	end component;
330

    
331
	component mul_196 is
332
		port (
333
			result : out std_logic_vector(29 downto 0);
334
			in_a : in  std_logic_vector(29 downto 0);
335
			in_b : in  std_logic_vector(10 downto 0)
336
		);
337
	end component;
338

    
339
	component sub_200 is
340
		port (
341
			result : out std_logic_vector(31 downto 0);
342
			in_a : in  std_logic_vector(31 downto 0);
343
			in_b : in  std_logic_vector(31 downto 0)
344
		);
345
	end component;
346

    
347
	component add_206 is
348
		port (
349
			result : out std_logic_vector(31 downto 0);
350
			in_a : in  std_logic_vector(31 downto 0);
351
			in_b : in  std_logic_vector(31 downto 0)
352
		);
353
	end component;
354

    
355
	component add_210 is
356
		port (
357
			result : out std_logic_vector(31 downto 0);
358
			in_a : in  std_logic_vector(31 downto 0);
359
			in_b : in  std_logic_vector(31 downto 0)
360
		);
361
	end component;
362

    
363
	component add_171 is
364
		port (
365
			result : out std_logic_vector(26 downto 0);
366
			in_a : in  std_logic_vector(26 downto 0);
367
			in_b : in  std_logic_vector(26 downto 0)
368
		);
369
	end component;
370

    
371
	component add_177 is
372
		port (
373
			result : out std_logic_vector(26 downto 0);
374
			in_a : in  std_logic_vector(26 downto 0);
375
			in_b : in  std_logic_vector(26 downto 0)
376
		);
377
	end component;
378

    
379
	component add_179 is
380
		port (
381
			result : out std_logic_vector(26 downto 0);
382
			in_a : in  std_logic_vector(26 downto 0);
383
			in_b : in  std_logic_vector(26 downto 0)
384
		);
385
	end component;
386

    
387
	component mul_195 is
388
		port (
389
			result : out std_logic_vector(31 downto 0);
390
			in_a : in  std_logic_vector(31 downto 0);
391
			in_b : in  std_logic_vector(14 downto 0)
392
		);
393
	end component;
394

    
395
	component sub_197 is
396
		port (
397
			result : out std_logic_vector(31 downto 0);
398
			in_a : in  std_logic_vector(31 downto 0);
399
			in_b : in  std_logic_vector(31 downto 0)
400
		);
401
	end component;
402

    
403
	component sub_207 is
404
		port (
405
			result : out std_logic_vector(31 downto 0);
406
			in_a : in  std_logic_vector(31 downto 0);
407
			in_b : in  std_logic_vector(31 downto 0)
408
		);
409
	end component;
410

    
411
	component mul_230 is
412
		port (
413
			result : out std_logic_vector(30 downto 0);
414
			in_a : in  std_logic_vector(30 downto 0);
415
			in_b : in  std_logic_vector(14 downto 0)
416
		);
417
	end component;
418

    
419
	component sub_185 is
420
		port (
421
			result : out std_logic_vector(31 downto 0);
422
			in_a : in  std_logic_vector(31 downto 0);
423
			in_b : in  std_logic_vector(31 downto 0)
424
		);
425
	end component;
426

    
427
	component add_211 is
428
		port (
429
			result : out std_logic_vector(31 downto 0);
430
			in_a : in  std_logic_vector(31 downto 0);
431
			in_b : in  std_logic_vector(31 downto 0)
432
		);
433
	end component;
434

    
435
	component add_226 is
436
		port (
437
			result : out std_logic_vector(31 downto 0);
438
			in_a : in  std_logic_vector(31 downto 0);
439
			in_b : in  std_logic_vector(31 downto 0)
440
		);
441
	end component;
442

    
443
	component add_235 is
444
		port (
445
			result : out std_logic_vector(26 downto 0);
446
			in_a : in  std_logic_vector(26 downto 0);
447
			in_b : in  std_logic_vector(26 downto 0)
448
		);
449
	end component;
450

    
451
	component add_314 is
452
		port (
453
			result : out std_logic_vector(26 downto 0);
454
			in_a : in  std_logic_vector(26 downto 0);
455
			in_b : in  std_logic_vector(26 downto 0)
456
		);
457
	end component;
458

    
459
	component sub_160 is
460
		port (
461
			le : out std_logic;
462
			result : out std_logic_vector(31 downto 0);
463
			in_a : in  std_logic_vector(31 downto 0);
464
			in_b : in  std_logic_vector(31 downto 0);
465
			sign : in  std_logic
466
		);
467
	end component;
468

    
469
	component add_173 is
470
		port (
471
			result : out std_logic_vector(26 downto 0);
472
			in_a : in  std_logic_vector(26 downto 0);
473
			in_b : in  std_logic_vector(26 downto 0)
474
		);
475
	end component;
476

    
477
	component add_182 is
478
		port (
479
			result : out std_logic_vector(31 downto 0);
480
			in_a : in  std_logic_vector(31 downto 0);
481
			in_b : in  std_logic_vector(31 downto 0)
482
		);
483
	end component;
484

    
485
	component sub_188 is
486
		port (
487
			result : out std_logic_vector(31 downto 0);
488
			in_a : in  std_logic_vector(31 downto 0);
489
			in_b : in  std_logic_vector(31 downto 0)
490
		);
491
	end component;
492

    
493
	component sub_243 is
494
		port (
495
			result : out std_logic_vector(31 downto 0);
496
			in_a : in  std_logic_vector(31 downto 0);
497
			in_b : in  std_logic_vector(31 downto 0)
498
		);
499
	end component;
500

    
501
	component sub_262 is
502
		port (
503
			result : out std_logic_vector(31 downto 0);
504
			in_a : in  std_logic_vector(31 downto 0);
505
			in_b : in  std_logic_vector(31 downto 0)
506
		);
507
	end component;
508

    
509
	component output_split4 is
510
		port (
511
			wa0_data : in  std_logic_vector(7 downto 0);
512
			wa0_addr : in  std_logic_vector(2 downto 0);
513
			ra0_data : out std_logic_vector(7 downto 0);
514
			ra0_addr : in  std_logic_vector(2 downto 0);
515
			wa0_en : in  std_logic;
516
			clk : in  std_logic
517
		);
518
	end component;
519

    
520
	component output_split5 is
521
		port (
522
			wa0_data : in  std_logic_vector(7 downto 0);
523
			wa0_addr : in  std_logic_vector(2 downto 0);
524
			ra0_data : out std_logic_vector(7 downto 0);
525
			ra0_addr : in  std_logic_vector(2 downto 0);
526
			wa0_en : in  std_logic;
527
			clk : in  std_logic
528
		);
529
	end component;
530

    
531
	component output_split6 is
532
		port (
533
			wa0_data : in  std_logic_vector(7 downto 0);
534
			wa0_addr : in  std_logic_vector(2 downto 0);
535
			ra0_data : out std_logic_vector(7 downto 0);
536
			ra0_addr : in  std_logic_vector(2 downto 0);
537
			wa0_en : in  std_logic;
538
			clk : in  std_logic
539
		);
540
	end component;
541

    
542
	component output_split7 is
543
		port (
544
			wa0_data : in  std_logic_vector(7 downto 0);
545
			wa0_addr : in  std_logic_vector(2 downto 0);
546
			ra0_data : out std_logic_vector(7 downto 0);
547
			ra0_addr : in  std_logic_vector(2 downto 0);
548
			wa0_en : in  std_logic;
549
			clk : in  std_logic
550
		);
551
	end component;
552

    
553
	component input_split0 is
554
		port (
555
			ra0_data : out std_logic_vector(31 downto 0);
556
			ra0_addr : in  std_logic_vector(4 downto 0);
557
			ra1_data : out std_logic_vector(31 downto 0);
558
			ra1_addr : in  std_logic_vector(4 downto 0);
559
			ra2_data : out std_logic_vector(31 downto 0);
560
			ra2_addr : in  std_logic_vector(4 downto 0);
561
			ra3_data : out std_logic_vector(31 downto 0);
562
			ra3_addr : in  std_logic_vector(4 downto 0);
563
			clk : in  std_logic;
564
			wa2_data : in  std_logic_vector(31 downto 0);
565
			wa2_addr : in  std_logic_vector(4 downto 0);
566
			wa2_en : in  std_logic
567
		);
568
	end component;
569

    
570
	component add_194 is
571
		port (
572
			result : out std_logic_vector(29 downto 0);
573
			in_a : in  std_logic_vector(29 downto 0);
574
			in_b : in  std_logic_vector(29 downto 0)
575
		);
576
	end component;
577

    
578
	component add_205 is
579
		port (
580
			result : out std_logic_vector(31 downto 0);
581
			in_a : in  std_logic_vector(31 downto 0);
582
			in_b : in  std_logic_vector(31 downto 0)
583
		);
584
	end component;
585

    
586
	component add_254 is
587
		port (
588
			result : out std_logic_vector(26 downto 0);
589
			in_a : in  std_logic_vector(26 downto 0);
590
			in_b : in  std_logic_vector(26 downto 0)
591
		);
592
	end component;
593

    
594
	component add_276 is
595
		port (
596
			result : out std_logic_vector(26 downto 0);
597
			in_a : in  std_logic_vector(26 downto 0);
598
			in_b : in  std_logic_vector(26 downto 0)
599
		);
600
	end component;
601

    
602
	component sub_284 is
603
		port (
604
			result : out std_logic_vector(31 downto 0);
605
			in_a : in  std_logic_vector(31 downto 0);
606
			in_b : in  std_logic_vector(31 downto 0)
607
		);
608
	end component;
609

    
610
	component input_split1 is
611
		port (
612
			wa0_data : in  std_logic_vector(31 downto 0);
613
			wa0_addr : in  std_logic_vector(4 downto 0);
614
			ra0_data : out std_logic_vector(31 downto 0);
615
			ra0_addr : in  std_logic_vector(4 downto 0);
616
			wa0_en : in  std_logic;
617
			ra1_data : out std_logic_vector(31 downto 0);
618
			ra1_addr : in  std_logic_vector(4 downto 0);
619
			ra2_data : out std_logic_vector(31 downto 0);
620
			ra2_addr : in  std_logic_vector(4 downto 0);
621
			ra3_data : out std_logic_vector(31 downto 0);
622
			ra3_addr : in  std_logic_vector(4 downto 0);
623
			clk : in  std_logic
624
		);
625
	end component;
626

    
627
	component add_166 is
628
		port (
629
			result : out std_logic_vector(19 downto 0);
630
			in_a : in  std_logic_vector(19 downto 0);
631
			in_b : in  std_logic_vector(19 downto 0)
632
		);
633
	end component;
634

    
635
	component add_168 is
636
		port (
637
			result : out std_logic_vector(19 downto 0);
638
			in_a : in  std_logic_vector(19 downto 0);
639
			in_b : in  std_logic_vector(19 downto 0)
640
		);
641
	end component;
642

    
643
	component add_178 is
644
		port (
645
			result : out std_logic_vector(19 downto 0);
646
			in_a : in  std_logic_vector(19 downto 0);
647
			in_b : in  std_logic_vector(19 downto 0)
648
		);
649
	end component;
650

    
651
	component add_183 is
652
		port (
653
			result : out std_logic_vector(31 downto 0);
654
			in_a : in  std_logic_vector(31 downto 0);
655
			in_b : in  std_logic_vector(31 downto 0)
656
		);
657
	end component;
658

    
659
	component sub_332 is
660
		port (
661
			result : out std_logic_vector(31 downto 0);
662
			in_a : in  std_logic_vector(31 downto 0);
663
			in_b : in  std_logic_vector(31 downto 0)
664
		);
665
	end component;
666

    
667
	component mul_341 is
668
		port (
669
			result : out std_logic_vector(31 downto 0);
670
			in_a : in  std_logic_vector(31 downto 0);
671
			in_b : in  std_logic_vector(15 downto 0)
672
		);
673
	end component;
674

    
675
	component mul_357 is
676
		port (
677
			result : out std_logic_vector(30 downto 0);
678
			in_a : in  std_logic_vector(30 downto 0);
679
			in_b : in  std_logic_vector(14 downto 0)
680
		);
681
	end component;
682

    
683
	component mul_365 is
684
		port (
685
			result : out std_logic_vector(31 downto 0);
686
			in_a : in  std_logic_vector(31 downto 0);
687
			in_b : in  std_logic_vector(14 downto 0)
688
		);
689
	end component;
690

    
691
	component mul_368 is
692
		port (
693
			result : out std_logic_vector(31 downto 0);
694
			in_a : in  std_logic_vector(31 downto 0);
695
			in_b : in  std_logic_vector(15 downto 0)
696
		);
697
	end component;
698

    
699
	component sub_369 is
700
		port (
701
			result : out std_logic_vector(31 downto 0);
702
			in_a : in  std_logic_vector(31 downto 0);
703
			in_b : in  std_logic_vector(31 downto 0)
704
		);
705
	end component;
706

    
707
	component sub_370 is
708
		port (
709
			result : out std_logic_vector(31 downto 0);
710
			in_a : in  std_logic_vector(31 downto 0);
711
			in_b : in  std_logic_vector(31 downto 0)
712
		);
713
	end component;
714

    
715
	component sub_377 is
716
		port (
717
			result : out std_logic_vector(31 downto 0);
718
			in_a : in  std_logic_vector(31 downto 0);
719
			in_b : in  std_logic_vector(31 downto 0)
720
		);
721
	end component;
722

    
723
	component cmp_398 is
724
		port (
725
			eq : out std_logic;
726
			in0 : in  std_logic_vector(2 downto 0);
727
			in1 : in  std_logic_vector(2 downto 0)
728
		);
729
	end component;
730

    
731
	component cmp_400 is
732
		port (
733
			eq : out std_logic;
734
			in0 : in  std_logic_vector(2 downto 0);
735
			in1 : in  std_logic_vector(2 downto 0)
736
		);
737
	end component;
738

    
739
	component cmp_404 is
740
		port (
741
			eq : out std_logic;
742
			in0 : in  std_logic_vector(2 downto 0);
743
			in1 : in  std_logic_vector(2 downto 0)
744
		);
745
	end component;
746

    
747
	component cmp_406 is
748
		port (
749
			eq : out std_logic;
750
			in0 : in  std_logic_vector(2 downto 0);
751
			in1 : in  std_logic_vector(2 downto 0)
752
		);
753
	end component;
754

    
755
	component cmp_408 is
756
		port (
757
			eq : out std_logic;
758
			in0 : in  std_logic_vector(2 downto 0);
759
			in1 : in  std_logic_vector(2 downto 0)
760
		);
761
	end component;
762

    
763
	component cmp_410 is
764
		port (
765
			eq : out std_logic;
766
			in0 : in  std_logic_vector(2 downto 0);
767
			in1 : in  std_logic_vector(2 downto 0)
768
		);
769
	end component;
770

    
771
	component cmp_412 is
772
		port (
773
			eq : out std_logic;
774
			in0 : in  std_logic;
775
			in1 : in  std_logic
776
		);
777
	end component;
778

    
779
	component sub_429 is
780
		port (
781
			result : out std_logic_vector(31 downto 0);
782
			in_a : in  std_logic_vector(31 downto 0);
783
			in_b : in  std_logic_vector(31 downto 0)
784
		);
785
	end component;
786

    
787
	component add_466 is
788
		port (
789
			result : out std_logic_vector(31 downto 0);
790
			in_a : in  std_logic_vector(31 downto 0);
791
			in_b : in  std_logic_vector(31 downto 0)
792
		);
793
	end component;
794

    
795
	component sub_496 is
796
		port (
797
			result : out std_logic_vector(31 downto 0);
798
			in_a : in  std_logic_vector(31 downto 0);
799
			in_b : in  std_logic_vector(31 downto 0)
800
		);
801
	end component;
802

    
803
	component sub_521 is
804
		port (
805
			result : out std_logic_vector(31 downto 0);
806
			in_a : in  std_logic_vector(31 downto 0);
807
			in_b : in  std_logic_vector(31 downto 0)
808
		);
809
	end component;
810

    
811
	component sub_528 is
812
		port (
813
			result : out std_logic_vector(31 downto 0);
814
			in_a : in  std_logic_vector(31 downto 0);
815
			in_b : in  std_logic_vector(31 downto 0)
816
		);
817
	end component;
818

    
819
	component fsm_23 is
820
		port (
821
			clock : in  std_logic;
822
			reset : in  std_logic;
823
			in0 : in  std_logic;
824
			out181 : out std_logic;
825
			out182 : out std_logic;
826
			out183 : out std_logic;
827
			out184 : out std_logic;
828
			out185 : out std_logic;
829
			out8 : out std_logic;
830
			out13 : out std_logic;
831
			out14 : out std_logic;
832
			out16 : out std_logic;
833
			out18 : out std_logic;
834
			out19 : out std_logic;
835
			out20 : out std_logic;
836
			out21 : out std_logic;
837
			out22 : out std_logic;
838
			in2 : in  std_logic;
839
			out23 : out std_logic;
840
			out24 : out std_logic;
841
			out25 : out std_logic;
842
			out26 : out std_logic;
843
			out27 : out std_logic;
844
			out28 : out std_logic;
845
			out29 : out std_logic;
846
			out30 : out std_logic;
847
			out31 : out std_logic;
848
			out33 : out std_logic;
849
			out35 : out std_logic;
850
			out36 : out std_logic;
851
			out38 : out std_logic;
852
			out40 : out std_logic;
853
			out42 : out std_logic;
854
			in3 : in  std_logic;
855
			out44 : out std_logic;
856
			out46 : out std_logic;
857
			out48 : out std_logic;
858
			out49 : out std_logic;
859
			out50 : out std_logic;
860
			out52 : out std_logic;
861
			out54 : out std_logic;
862
			out56 : out std_logic;
863
			out57 : out std_logic;
864
			out58 : out std_logic;
865
			in4 : in  std_logic;
866
			out60 : out std_logic;
867
			in5 : in  std_logic;
868
			out164 : out std_logic;
869
			out165 : out std_logic;
870
			out167 : out std_logic;
871
			out168 : out std_logic;
872
			out170 : out std_logic;
873
			out171 : out std_logic;
874
			out173 : out std_logic;
875
			out174 : out std_logic;
876
			out176 : out std_logic;
877
			out178 : out std_logic;
878
			out0 : out std_logic;
879
			out1 : out std_logic;
880
			out2 : out std_logic;
881
			in1 : in  std_logic;
882
			out4 : out std_logic;
883
			out90 : out std_logic;
884
			out91 : out std_logic;
885
			out97 : out std_logic;
886
			out99 : out std_logic;
887
			out101 : out std_logic;
888
			in6 : in  std_logic;
889
			out103 : out std_logic;
890
			out105 : out std_logic;
891
			out106 : out std_logic;
892
			out107 : out std_logic;
893
			out108 : out std_logic;
894
			out135 : out std_logic;
895
			out136 : out std_logic;
896
			out137 : out std_logic;
897
			out138 : out std_logic;
898
			in11 : in  std_logic;
899
			out140 : out std_logic;
900
			out141 : out std_logic;
901
			out142 : out std_logic;
902
			out143 : out std_logic;
903
			out145 : out std_logic;
904
			out146 : out std_logic;
905
			out148 : out std_logic;
906
			out150 : out std_logic;
907
			out153 : out std_logic;
908
			out154 : out std_logic;
909
			out155 : out std_logic;
910
			out156 : out std_logic;
911
			out157 : out std_logic;
912
			out158 : out std_logic;
913
			out159 : out std_logic;
914
			out160 : out std_logic;
915
			out161 : out std_logic;
916
			out162 : out std_logic;
917
			out111 : out std_logic;
918
			out112 : out std_logic;
919
			out114 : out std_logic;
920
			out116 : out std_logic;
921
			out118 : out std_logic;
922
			out120 : out std_logic;
923
			out121 : out std_logic;
924
			out122 : out std_logic;
925
			out123 : out std_logic;
926
			out124 : out std_logic;
927
			out125 : out std_logic;
928
			out126 : out std_logic;
929
			in7 : in  std_logic;
930
			out129 : out std_logic;
931
			out130 : out std_logic;
932
			in8 : in  std_logic;
933
			out131 : out std_logic;
934
			in9 : in  std_logic;
935
			out132 : out std_logic;
936
			out133 : out std_logic;
937
			out134 : out std_logic;
938
			in10 : in  std_logic;
939
			out186 : out std_logic;
940
			out187 : out std_logic;
941
			out190 : out std_logic;
942
			out195 : out std_logic;
943
			out197 : out std_logic;
944
			out198 : out std_logic;
945
			out199 : out std_logic;
946
			out200 : out std_logic;
947
			out201 : out std_logic;
948
			out203 : out std_logic;
949
			out204 : out std_logic;
950
			out206 : out std_logic;
951
			out207 : out std_logic;
952
			out209 : out std_logic;
953
			out210 : out std_logic;
954
			out212 : out std_logic;
955
			out213 : out std_logic;
956
			out215 : out std_logic;
957
			out217 : out std_logic;
958
			out220 : out std_logic;
959
			out221 : out std_logic;
960
			out222 : out std_logic;
961
			out223 : out std_logic;
962
			out224 : out std_logic;
963
			out225 : out std_logic;
964
			out226 : out std_logic;
965
			out227 : out std_logic;
966
			out228 : out std_logic;
967
			out229 : out std_logic;
968
			out231 : out std_logic;
969
			out232 : out std_logic;
970
			out234 : out std_logic;
971
			out235 : out std_logic;
972
			out237 : out std_logic;
973
			out238 : out std_logic;
974
			out240 : out std_logic;
975
			out241 : out std_logic;
976
			out243 : out std_logic;
977
			out245 : out std_logic;
978
			out248 : out std_logic;
979
			out249 : out std_logic;
980
			out250 : out std_logic;
981
			out251 : out std_logic;
982
			out252 : out std_logic;
983
			out253 : out std_logic;
984
			out254 : out std_logic;
985
			out255 : out std_logic;
986
			out256 : out std_logic;
987
			out257 : out std_logic;
988
			out259 : out std_logic;
989
			out260 : out std_logic;
990
			out262 : out std_logic;
991
			out263 : out std_logic;
992
			out265 : out std_logic;
993
			out266 : out std_logic;
994
			out268 : out std_logic;
995
			out269 : out std_logic;
996
			out271 : out std_logic;
997
			out273 : out std_logic;
998
			out276 : out std_logic;
999
			out277 : out std_logic;
1000
			out278 : out std_logic;
1001
			out279 : out std_logic;
1002
			out280 : out std_logic;
1003
			out281 : out std_logic;
1004
			out282 : out std_logic;
1005
			out283 : out std_logic;
1006
			out284 : out std_logic;
1007
			out285 : out std_logic;
1008
			out286 : out std_logic;
1009
			out287 : out std_logic;
1010
			out288 : out std_logic;
1011
			out289 : out std_logic;
1012
			out290 : out std_logic;
1013
			out291 : out std_logic;
1014
			out292 : out std_logic;
1015
			out293 : out std_logic;
1016
			out294 : out std_logic;
1017
			out295 : out std_logic;
1018
			out296 : out std_logic;
1019
			out297 : out std_logic;
1020
			out298 : out std_logic;
1021
			out311 : out std_logic;
1022
			out312 : out std_logic;
1023
			out313 : out std_logic;
1024
			out314 : out std_logic;
1025
			out315 : out std_logic;
1026
			out316 : out std_logic;
1027
			out318 : out std_logic;
1028
			out321 : out std_logic;
1029
			out322 : out std_logic;
1030
			out323 : out std_logic;
1031
			out324 : out std_logic;
1032
			out325 : out std_logic;
1033
			out326 : out std_logic;
1034
			out327 : out std_logic;
1035
			out328 : out std_logic;
1036
			out329 : out std_logic;
1037
			out333 : out std_logic;
1038
			out341 : out std_logic;
1039
			out342 : out std_logic;
1040
			out343 : out std_logic;
1041
			out344 : out std_logic;
1042
			out345 : out std_logic;
1043
			out346 : out std_logic;
1044
			out349 : out std_logic;
1045
			out350 : out std_logic;
1046
			out351 : out std_logic;
1047
			out352 : out std_logic;
1048
			out353 : out std_logic;
1049
			out354 : out std_logic;
1050
			out355 : out std_logic;
1051
			out357 : out std_logic;
1052
			out361 : out std_logic;
1053
			out362 : out std_logic;
1054
			out363 : out std_logic;
1055
			out364 : out std_logic;
1056
			out366 : out std_logic;
1057
			out367 : out std_logic;
1058
			out371 : out std_logic;
1059
			out372 : out std_logic;
1060
			out373 : out std_logic;
1061
			out382 : out std_logic;
1062
			out383 : out std_logic;
1063
			out385 : out std_logic;
1064
			out393 : out std_logic;
1065
			out394 : out std_logic;
1066
			out395 : out std_logic;
1067
			out396 : out std_logic;
1068
			out398 : out std_logic;
1069
			out400 : out std_logic;
1070
			out401 : out std_logic;
1071
			out402 : out std_logic;
1072
			out404 : out std_logic;
1073
			out406 : out std_logic;
1074
			out407 : out std_logic;
1075
			out408 : out std_logic;
1076
			out409 : out std_logic;
1077
			out410 : out std_logic;
1078
			out411 : out std_logic;
1079
			out412 : out std_logic;
1080
			out413 : out std_logic;
1081
			out414 : out std_logic;
1082
			out416 : out std_logic;
1083
			out417 : out std_logic;
1084
			out418 : out std_logic;
1085
			out419 : out std_logic;
1086
			out422 : out std_logic;
1087
			out423 : out std_logic;
1088
			out425 : out std_logic;
1089
			out426 : out std_logic;
1090
			out428 : out std_logic;
1091
			out429 : out std_logic;
1092
			out430 : out std_logic;
1093
			out431 : out std_logic;
1094
			out433 : out std_logic;
1095
			out434 : out std_logic;
1096
			out435 : out std_logic;
1097
			out436 : out std_logic;
1098
			out437 : out std_logic;
1099
			out438 : out std_logic;
1100
			out440 : out std_logic;
1101
			out441 : out std_logic;
1102
			out443 : out std_logic;
1103
			out444 : out std_logic;
1104
			out445 : out std_logic;
1105
			out446 : out std_logic;
1106
			out447 : out std_logic;
1107
			out450 : out std_logic;
1108
			out451 : out std_logic;
1109
			out454 : out std_logic;
1110
			out455 : out std_logic;
1111
			out457 : out std_logic;
1112
			out458 : out std_logic;
1113
			out459 : out std_logic;
1114
			out460 : out std_logic;
1115
			out461 : out std_logic;
1116
			out462 : out std_logic;
1117
			out463 : out std_logic;
1118
			out464 : out std_logic;
1119
			out465 : out std_logic;
1120
			out466 : out std_logic;
1121
			out467 : out std_logic;
1122
			out468 : out std_logic;
1123
			out469 : out std_logic;
1124
			out472 : out std_logic;
1125
			out475 : out std_logic;
1126
			out481 : out std_logic;
1127
			out482 : out std_logic;
1128
			out483 : out std_logic;
1129
			out484 : out std_logic;
1130
			out487 : out std_logic;
1131
			out488 : out std_logic;
1132
			out491 : out std_logic;
1133
			out495 : out std_logic;
1134
			out496 : out std_logic;
1135
			out497 : out std_logic;
1136
			out498 : out std_logic;
1137
			out499 : out std_logic;
1138
			out500 : out std_logic;
1139
			out501 : out std_logic;
1140
			out512 : out std_logic;
1141
			out513 : out std_logic;
1142
			out517 : out std_logic;
1143
			out518 : out std_logic;
1144
			out519 : out std_logic;
1145
			out521 : out std_logic;
1146
			out522 : out std_logic;
1147
			out524 : out std_logic;
1148
			out525 : out std_logic;
1149
			out526 : out std_logic;
1150
			out527 : out std_logic;
1151
			out528 : out std_logic;
1152
			out531 : out std_logic;
1153
			out540 : out std_logic;
1154
			out542 : out std_logic;
1155
			out544 : out std_logic;
1156
			out545 : out std_logic;
1157
			out554 : out std_logic;
1158
			out555 : out std_logic;
1159
			out559 : out std_logic;
1160
			out560 : out std_logic;
1161
			out561 : out std_logic;
1162
			out562 : out std_logic;
1163
			out563 : out std_logic;
1164
			out566 : out std_logic;
1165
			out567 : out std_logic;
1166
			out570 : out std_logic;
1167
			out572 : out std_logic;
1168
			out575 : out std_logic;
1169
			out577 : out std_logic;
1170
			out578 : out std_logic;
1171
			out580 : out std_logic;
1172
			out581 : out std_logic
1173
		);
1174
	end component;
1175

    
1176
	component add_167 is
1177
		port (
1178
			result : out std_logic_vector(26 downto 0);
1179
			in_a : in  std_logic_vector(26 downto 0);
1180
			in_b : in  std_logic_vector(26 downto 0)
1181
		);
1182
	end component;
1183

    
1184
	component add_169 is
1185
		port (
1186
			result : out std_logic_vector(26 downto 0);
1187
			in_a : in  std_logic_vector(26 downto 0);
1188
			in_b : in  std_logic_vector(26 downto 0)
1189
		);
1190
	end component;
1191

    
1192
	component add_175 is
1193
		port (
1194
			result : out std_logic_vector(26 downto 0);
1195
			in_a : in  std_logic_vector(26 downto 0);
1196
			in_b : in  std_logic_vector(26 downto 0)
1197
		);
1198
	end component;
1199

    
1200
	component add_255 is
1201
		port (
1202
			result : out std_logic_vector(19 downto 0);
1203
			in_a : in  std_logic_vector(19 downto 0);
1204
			in_b : in  std_logic_vector(19 downto 0)
1205
		);
1206
	end component;
1207

    
1208
	component sub_362 is
1209
		port (
1210
			result : out std_logic_vector(31 downto 0);
1211
			in_a : in  std_logic_vector(31 downto 0);
1212
			in_b : in  std_logic_vector(31 downto 0)
1213
		);
1214
	end component;
1215

    
1216
	component mul_376 is
1217
		port (
1218
			result : out std_logic_vector(31 downto 0);
1219
			in_a : in  std_logic_vector(31 downto 0);
1220
			in_b : in  std_logic_vector(14 downto 0)
1221
		);
1222
	end component;
1223

    
1224
	component add_420 is
1225
		port (
1226
			result : out std_logic_vector(19 downto 0);
1227
			in_a : in  std_logic_vector(19 downto 0);
1228
			in_b : in  std_logic_vector(19 downto 0)
1229
		);
1230
	end component;
1231

    
1232
	component sub_446 is
1233
		port (
1234
			result : out std_logic_vector(31 downto 0);
1235
			in_a : in  std_logic_vector(31 downto 0);
1236
			in_b : in  std_logic_vector(31 downto 0)
1237
		);
1238
	end component;
1239

    
1240
	component mul_456 is
1241
		port (
1242
			result : out std_logic_vector(30 downto 0);
1243
			in_a : in  std_logic_vector(30 downto 0);
1244
			in_b : in  std_logic_vector(14 downto 0)
1245
		);
1246
	end component;
1247

    
1248
	component mul_457 is
1249
		port (
1250
			result : out std_logic_vector(31 downto 0);
1251
			in_a : in  std_logic_vector(31 downto 0);
1252
			in_b : in  std_logic_vector(15 downto 0)
1253
		);
1254
	end component;
1255

    
1256
	component sub_461 is
1257
		port (
1258
			result : out std_logic_vector(31 downto 0);
1259
			in_a : in  std_logic_vector(31 downto 0);
1260
			in_b : in  std_logic_vector(31 downto 0)
1261
		);
1262
	end component;
1263

    
1264
	component sub_517 is
1265
		port (
1266
			result : out std_logic_vector(31 downto 0);
1267
			in_a : in  std_logic_vector(31 downto 0);
1268
			in_b : in  std_logic_vector(31 downto 0)
1269
		);
1270
	end component;
1271

    
1272
	component mul_560 is
1273
		port (
1274
			result : out std_logic_vector(31 downto 0);
1275
			in_a : in  std_logic_vector(31 downto 0);
1276
			in_b : in  std_logic_vector(14 downto 0)
1277
		);
1278
	end component;
1279

    
1280
	component mul_565 is
1281
		port (
1282
			result : out std_logic_vector(31 downto 0);
1283
			in_a : in  std_logic_vector(31 downto 0);
1284
			in_b : in  std_logic_vector(15 downto 0)
1285
		);
1286
	end component;
1287

    
1288
	component mul_578 is
1289
		port (
1290
			result : out std_logic_vector(31 downto 0);
1291
			in_a : in  std_logic_vector(31 downto 0);
1292
			in_b : in  std_logic_vector(14 downto 0)
1293
		);
1294
	end component;
1295

    
1296
	component muxb_162 is
1297
		port (
1298
			in_sel : in  std_logic;
1299
			out_data : out std_logic;
1300
			in_data0 : in  std_logic;
1301
			in_data1 : in  std_logic
1302
		);
1303
	end component;
1304

    
1305
	component add_184 is
1306
		port (
1307
			result : out std_logic_vector(31 downto 0);
1308
			in_a : in  std_logic_vector(31 downto 0);
1309
			in_b : in  std_logic_vector(31 downto 0)
1310
		);
1311
	end component;
1312

    
1313
	component muxb_201 is
1314
		port (
1315
			in_sel : in  std_logic;
1316
			out_data : out std_logic;
1317
			in_data0 : in  std_logic;
1318
			in_data1 : in  std_logic
1319
		);
1320
	end component;
1321

    
1322
	component cmp_202 is
1323
		port (
1324
			ne : out std_logic;
1325
			in0 : in  std_logic_vector(15 downto 0);
1326
			in1 : in  std_logic_vector(15 downto 0)
1327
		);
1328
	end component;
1329

    
1330
	component cmp_203 is
1331
		port (
1332
			eq : out std_logic;
1333
			in0 : in  std_logic;
1334
			in1 : in  std_logic
1335
		);
1336
	end component;
1337

    
1338
	component cmp_204 is
1339
		port (
1340
			eq : out std_logic;
1341
			in0 : in  std_logic;
1342
			in1 : in  std_logic
1343
		);
1344
	end component;
1345

    
1346
	component sub_208 is
1347
		port (
1348
			result : out std_logic_vector(31 downto 0);
1349
			in_a : in  std_logic_vector(31 downto 0);
1350
			in_b : in  std_logic_vector(31 downto 0)
1351
		);
1352
	end component;
1353

    
1354
	component add_236 is
1355
		port (
1356
			result : out std_logic_vector(19 downto 0);
1357
			in_a : in  std_logic_vector(19 downto 0);
1358
			in_b : in  std_logic_vector(19 downto 0)
1359
		);
1360
	end component;
1361

    
1362
	component muxb_263 is
1363
		port (
1364
			in_sel : in  std_logic;
1365
			out_data : out std_logic;
1366
			in_data0 : in  std_logic;
1367
			in_data1 : in  std_logic
1368
		);
1369
	end component;
1370

    
1371
	component muxb_265 is
1372
		port (
1373
			in_sel : in  std_logic;
1374
			out_data : out std_logic;
1375
			in_data0 : in  std_logic;
1376
			in_data1 : in  std_logic
1377
		);
1378
	end component;
1379

    
1380
	component add_277 is
1381
		port (
1382
			result : out std_logic_vector(19 downto 0);
1383
			in_a : in  std_logic_vector(19 downto 0);
1384
			in_b : in  std_logic_vector(19 downto 0)
1385
		);
1386
	end component;
1387

    
1388
	component add_295 is
1389
		port (
1390
			result : out std_logic_vector(26 downto 0);
1391
			in_a : in  std_logic_vector(26 downto 0);
1392
			in_b : in  std_logic_vector(26 downto 0)
1393
		);
1394
	end component;
1395

    
1396
	component add_296 is
1397
		port (
1398
			result : out std_logic_vector(19 downto 0);
1399
			in_a : in  std_logic_vector(19 downto 0);
1400
			in_b : in  std_logic_vector(19 downto 0)
1401
		);
1402
	end component;
1403

    
1404
	component sub_303 is
1405
		port (
1406
			result : out std_logic_vector(31 downto 0);
1407
			in_a : in  std_logic_vector(31 downto 0);
1408
			in_b : in  std_logic_vector(31 downto 0)
1409
		);
1410
	end component;
1411

    
1412
	component add_315 is
1413
		port (
1414
			result : out std_logic_vector(19 downto 0);
1415
			in_a : in  std_logic_vector(19 downto 0);
1416
			in_b : in  std_logic_vector(19 downto 0)
1417
		);
1418
	end component;
1419

    
1420
	component muxb_322 is
1421
		port (
1422
			in_sel : in  std_logic;
1423
			out_data : out std_logic;
1424
			in_data0 : in  std_logic;
1425
			in_data1 : in  std_logic
1426
		);
1427
	end component;
1428

    
1429
	component add_323 is
1430
		port (
1431
			result : out std_logic_vector(15 downto 0);
1432
			in_a : in  std_logic_vector(15 downto 0);
1433
			in_b : in  std_logic_vector(15 downto 0)
1434
		);
1435
	end component;
1436

    
1437
	component cmp_324 is
1438
		port (
1439
			ne : out std_logic;
1440
			in0 : in  std_logic_vector(15 downto 0);
1441
			in1 : in  std_logic_vector(15 downto 0)
1442
		);
1443
	end component;
1444

    
1445
	component cmp_325 is
1446
		port (
1447
			eq : out std_logic;
1448
			in0 : in  std_logic;
1449
			in1 : in  std_logic
1450
		);
1451
	end component;
1452

    
1453
	component mul_328 is
1454
		port (
1455
			result : out std_logic_vector(31 downto 0);
1456
			in_a : in  std_logic_vector(31 downto 0);
1457
			in_b : in  std_logic_vector(14 downto 0)
1458
		);
1459
	end component;
1460

    
1461
	component mul_331 is
1462
		port (
1463
			result : out std_logic_vector(31 downto 0);
1464
			in_a : in  std_logic_vector(31 downto 0);
1465
			in_b : in  std_logic_vector(15 downto 0)
1466
		);
1467
	end component;
1468

    
1469
	component sub_337 is
1470
		port (
1471
			result : out std_logic_vector(31 downto 0);
1472
			in_a : in  std_logic_vector(31 downto 0);
1473
			in_b : in  std_logic_vector(31 downto 0)
1474
		);
1475
	end component;
1476

    
1477
	component add_338 is
1478
		port (
1479
			result : out std_logic_vector(31 downto 0);
1480
			in_a : in  std_logic_vector(31 downto 0);
1481
			in_b : in  std_logic_vector(31 downto 0)
1482
		);
1483
	end component;
1484

    
1485
	component mul_344 is
1486
		port (
1487
			result : out std_logic_vector(31 downto 0);
1488
			in_a : in  std_logic_vector(31 downto 0);
1489
			in_b : in  std_logic_vector(14 downto 0)
1490
		);
1491
	end component;
1492

    
1493
	component sub_345 is
1494
		port (
1495
			result : out std_logic_vector(31 downto 0);
1496
			in_a : in  std_logic_vector(31 downto 0);
1497
			in_b : in  std_logic_vector(31 downto 0)
1498
		);
1499
	end component;
1500

    
1501
	component add_350 is
1502
		port (
1503
			result : out std_logic_vector(31 downto 0);
1504
			in_a : in  std_logic_vector(31 downto 0);
1505
			in_b : in  std_logic_vector(31 downto 0)
1506
		);
1507
	end component;
1508

    
1509
	component mul_353 is
1510
		port (
1511
			result : out std_logic_vector(30 downto 0);
1512
			in_a : in  std_logic_vector(30 downto 0);
1513
			in_b : in  std_logic_vector(14 downto 0)
1514
		);
1515
	end component;
1516

    
1517
	component sub_354 is
1518
		port (
1519
			result : out std_logic_vector(31 downto 0);
1520
			in_a : in  std_logic_vector(31 downto 0);
1521
			in_b : in  std_logic_vector(31 downto 0)
1522
		);
1523
	end component;
1524

    
1525
	component mul_373 is
1526
		port (
1527
			result : out std_logic_vector(31 downto 0);
1528
			in_a : in  std_logic_vector(31 downto 0);
1529
			in_b : in  std_logic_vector(15 downto 0)
1530
		);
1531
	end component;
1532

    
1533
	component add_382 is
1534
		port (
1535
			result : out std_logic_vector(31 downto 0);
1536
			in_a : in  std_logic_vector(31 downto 0);
1537
			in_b : in  std_logic_vector(31 downto 0)
1538
		);
1539
	end component;
1540

    
1541
	component mul_383 is
1542
		port (
1543
			result : out std_logic_vector(30 downto 0);
1544
			in_a : in  std_logic_vector(30 downto 0);
1545
			in_b : in  std_logic_vector(14 downto 0)
1546
		);
1547
	end component;
1548

    
1549
	component add_390 is
1550
		port (
1551
			result : out std_logic_vector(31 downto 0);
1552
			in_a : in  std_logic_vector(31 downto 0);
1553
			in_b : in  std_logic_vector(31 downto 0)
1554
		);
1555
	end component;
1556

    
1557
	component sub_391 is
1558
		port (
1559
			result : out std_logic_vector(31 downto 0);
1560
			in_a : in  std_logic_vector(31 downto 0);
1561
			in_b : in  std_logic_vector(31 downto 0)
1562
		);
1563
	end component;
1564

    
1565
	component cmp_392 is
1566
		port (
1567
			ne : out std_logic;
1568
			in0 : in  std_logic_vector(31 downto 0);
1569
			in1 : in  std_logic_vector(31 downto 0)
1570
		);
1571
	end component;
1572

    
1573
	component add_393 is
1574
		port (
1575
			result : out std_logic_vector(31 downto 0);
1576
			in_a : in  std_logic_vector(31 downto 0);
1577
			in_b : in  std_logic_vector(31 downto 0)
1578
		);
1579
	end component;
1580

    
1581
	component cmp_396 is
1582
		port (
1583
			eq : out std_logic;
1584
			in0 : in  std_logic_vector(2 downto 0);
1585
			in1 : in  std_logic_vector(2 downto 0)
1586
		);
1587
	end component;
1588

    
1589
	component cmp_402 is
1590
		port (
1591
			eq : out std_logic;
1592
			in0 : in  std_logic_vector(2 downto 0);
1593
			in1 : in  std_logic_vector(2 downto 0)
1594
		);
1595
	end component;
1596

    
1597
	component cmp_411 is
1598
		port (
1599
			eq : out std_logic;
1600
			in0 : in  std_logic;
1601
			in1 : in  std_logic
1602
		);
1603
	end component;
1604

    
1605
	component cmp_413 is
1606
		port (
1607
			ne : out std_logic;
1608
			in0 : in  std_logic_vector(31 downto 0);
1609
			in1 : in  std_logic_vector(31 downto 0)
1610
		);
1611
	end component;
1612

    
1613
	component mul_416 is
1614
		port (
1615
			result : out std_logic_vector(30 downto 0);
1616
			in_a : in  std_logic_vector(30 downto 0);
1617
			in_b : in  std_logic_vector(14 downto 0)
1618
		);
1619
	end component;
1620

    
1621
	component add_419 is
1622
		port (
1623
			result : out std_logic_vector(26 downto 0);
1624
			in_a : in  std_logic_vector(26 downto 0);
1625
			in_b : in  std_logic_vector(26 downto 0)
1626
		);
1627
	end component;
1628

    
1629
	component add_430 is
1630
		port (
1631
			result : out std_logic_vector(31 downto 0);
1632
			in_a : in  std_logic_vector(31 downto 0);
1633
			in_b : in  std_logic_vector(31 downto 0)
1634
		);
1635
	end component;
1636

    
1637
	component sub_437 is
1638
		port (
1639
			result : out std_logic_vector(31 downto 0);
1640
			in_a : in  std_logic_vector(31 downto 0);
1641
			in_b : in  std_logic_vector(31 downto 0)
1642
		);
1643
	end component;
1644

    
1645
	component mul_442 is
1646
		port (
1647
			result : out std_logic_vector(31 downto 0);
1648
			in_a : in  std_logic_vector(31 downto 0);
1649
			in_b : in  std_logic_vector(15 downto 0)
1650
		);
1651
	end component;
1652

    
1653
	component mul_445 is
1654
		port (
1655
			result : out std_logic_vector(31 downto 0);
1656
			in_a : in  std_logic_vector(31 downto 0);
1657
			in_b : in  std_logic_vector(14 downto 0)
1658
		);
1659
	end component;
1660

    
1661
	component mul_447 is
1662
		port (
1663
			result : out std_logic_vector(31 downto 0);
1664
			in_a : in  std_logic_vector(31 downto 0);
1665
			in_b : in  std_logic_vector(14 downto 0)
1666
		);
1667
	end component;
1668

    
1669
	component mul_448 is
1670
		port (
1671
			result : out std_logic_vector(31 downto 0);
1672
			in_a : in  std_logic_vector(31 downto 0);
1673
			in_b : in  std_logic_vector(15 downto 0)
1674
		);
1675
	end component;
1676

    
1677
	component sub_449 is
1678
		port (
1679
			result : out std_logic_vector(31 downto 0);
1680
			in_a : in  std_logic_vector(31 downto 0);
1681
			in_b : in  std_logic_vector(31 downto 0)
1682
		);
1683
	end component;
1684

    
1685
	component mul_460 is
1686
		port (
1687
			result : out std_logic_vector(31 downto 0);
1688
			in_a : in  std_logic_vector(31 downto 0);
1689
			in_b : in  std_logic_vector(14 downto 0)
1690
		);
1691
	end component;
1692

    
1693
	component mul_469 is
1694
		port (
1695
			result : out std_logic_vector(30 downto 0);
1696
			in_a : in  std_logic_vector(30 downto 0);
1697
			in_b : in  std_logic_vector(14 downto 0)
1698
		);
1699
	end component;
1700

    
1701
	component add_474 is
1702
		port (
1703
			result : out std_logic_vector(31 downto 0);
1704
			in_a : in  std_logic_vector(31 downto 0);
1705
			in_b : in  std_logic_vector(31 downto 0)
1706
		);
1707
	end component;
1708

    
1709
	component mul_477 is
1710
		port (
1711
			result : out std_logic_vector(30 downto 0);
1712
			in_a : in  std_logic_vector(30 downto 0);
1713
			in_b : in  std_logic_vector(14 downto 0)
1714
		);
1715
	end component;
1716

    
1717
	component sub_478 is
1718
		port (
1719
			result : out std_logic_vector(31 downto 0);
1720
			in_a : in  std_logic_vector(31 downto 0);
1721
			in_b : in  std_logic_vector(31 downto 0)
1722
		);
1723
	end component;
1724

    
1725
	component add_483 is
1726
		port (
1727
			result : out std_logic_vector(31 downto 0);
1728
			in_a : in  std_logic_vector(31 downto 0);
1729
			in_b : in  std_logic_vector(31 downto 0)
1730
		);
1731
	end component;
1732

    
1733
	component sub_484 is
1734
		port (
1735
			result : out std_logic_vector(31 downto 0);
1736
			in_a : in  std_logic_vector(31 downto 0);
1737
			in_b : in  std_logic_vector(31 downto 0)
1738
		);
1739
	end component;
1740

    
1741
	component add_487 is
1742
		port (
1743
			result : out std_logic_vector(31 downto 0);
1744
			in_a : in  std_logic_vector(31 downto 0);
1745
			in_b : in  std_logic_vector(31 downto 0)
1746
		);
1747
	end component;
1748

    
1749
	component sub_488 is
1750
		port (
1751
			result : out std_logic_vector(31 downto 0);
1752
			in_a : in  std_logic_vector(31 downto 0);
1753
			in_b : in  std_logic_vector(31 downto 0)
1754
		);
1755
	end component;
1756

    
1757
	component sub_489 is
1758
		port (
1759
			result : out std_logic_vector(31 downto 0);
1760
			in_a : in  std_logic_vector(31 downto 0);
1761
			in_b : in  std_logic_vector(31 downto 0)
1762
		);
1763
	end component;
1764

    
1765
	component mul_492 is
1766
		port (
1767
			result : out std_logic_vector(31 downto 0);
1768
			in_a : in  std_logic_vector(31 downto 0);
1769
			in_b : in  std_logic_vector(14 downto 0)
1770
		);
1771
	end component;
1772

    
1773
	component mul_495 is
1774
		port (
1775
			result : out std_logic_vector(31 downto 0);
1776
			in_a : in  std_logic_vector(31 downto 0);
1777
			in_b : in  std_logic_vector(15 downto 0)
1778
		);
1779
	end component;
1780

    
1781
	component mul_499 is
1782
		port (
1783
			result : out std_logic_vector(31 downto 0);
1784
			in_a : in  std_logic_vector(31 downto 0);
1785
			in_b : in  std_logic_vector(15 downto 0)
1786
		);
1787
	end component;
1788

    
1789
	component mul_502 is
1790
		port (
1791
			result : out std_logic_vector(31 downto 0);
1792
			in_a : in  std_logic_vector(31 downto 0);
1793
			in_b : in  std_logic_vector(14 downto 0)
1794
		);
1795
	end component;
1796

    
1797
	component sub_503 is
1798
		port (
1799
			result : out std_logic_vector(31 downto 0);
1800
			in_a : in  std_logic_vector(31 downto 0);
1801
			in_b : in  std_logic_vector(31 downto 0)
1802
		);
1803
	end component;
1804

    
1805
	component add_508 is
1806
		port (
1807
			result : out std_logic_vector(31 downto 0);
1808
			in_a : in  std_logic_vector(31 downto 0);
1809
			in_b : in  std_logic_vector(31 downto 0)
1810
		);
1811
	end component;
1812

    
1813
	component mul_511 is
1814
		port (
1815
			result : out std_logic_vector(30 downto 0);
1816
			in_a : in  std_logic_vector(30 downto 0);
1817
			in_b : in  std_logic_vector(14 downto 0)
1818
		);
1819
	end component;
1820

    
1821
	component add_516 is
1822
		port (
1823
			result : out std_logic_vector(31 downto 0);
1824
			in_a : in  std_logic_vector(31 downto 0);
1825
			in_b : in  std_logic_vector(31 downto 0)
1826
		);
1827
	end component;
1828

    
1829
	component mul_520 is
1830
		port (
1831
			result : out std_logic_vector(30 downto 0);
1832
			in_a : in  std_logic_vector(30 downto 0);
1833
			in_b : in  std_logic_vector(14 downto 0)
1834
		);
1835
	end component;
1836

    
1837
	component mul_524 is
1838
		port (
1839
			result : out std_logic_vector(31 downto 0);
1840
			in_a : in  std_logic_vector(31 downto 0);
1841
			in_b : in  std_logic_vector(14 downto 0)
1842
		);
1843
	end component;
1844

    
1845
	component mul_527 is
1846
		port (
1847
			result : out std_logic_vector(31 downto 0);
1848
			in_a : in  std_logic_vector(31 downto 0);
1849
			in_b : in  std_logic_vector(15 downto 0)
1850
		);
1851
	end component;
1852

    
1853
	component mul_531 is
1854
		port (
1855
			result : out std_logic_vector(30 downto 0);
1856
			in_a : in  std_logic_vector(30 downto 0);
1857
			in_b : in  std_logic_vector(14 downto 0)
1858
		);
1859
	end component;
1860

    
1861
	component mul_534 is
1862
		port (
1863
			result : out std_logic_vector(30 downto 0);
1864
			in_a : in  std_logic_vector(30 downto 0);
1865
			in_b : in  std_logic_vector(14 downto 0)
1866
		);
1867
	end component;
1868

    
1869
	component add_537 is
1870
		port (
1871
			result : out std_logic_vector(31 downto 0);
1872
			in_a : in  std_logic_vector(31 downto 0);
1873
			in_b : in  std_logic_vector(31 downto 0)
1874
		);
1875
	end component;
1876

    
1877
	component mul_540 is
1878
		port (
1879
			result : out std_logic_vector(31 downto 0);
1880
			in_a : in  std_logic_vector(31 downto 0);
1881
			in_b : in  std_logic_vector(15 downto 0)
1882
		);
1883
	end component;
1884

    
1885
	component mul_543 is
1886
		port (
1887
			result : out std_logic_vector(31 downto 0);
1888
			in_a : in  std_logic_vector(31 downto 0);
1889
			in_b : in  std_logic_vector(14 downto 0)
1890
		);
1891
	end component;
1892

    
1893
	component sub_544 is
1894
		port (
1895
			result : out std_logic_vector(31 downto 0);
1896
			in_a : in  std_logic_vector(31 downto 0);
1897
			in_b : in  std_logic_vector(31 downto 0)
1898
		);
1899
	end component;
1900

    
1901
	component mul_547 is
1902
		port (
1903
			result : out std_logic_vector(30 downto 0);
1904
			in_a : in  std_logic_vector(30 downto 0);
1905
			in_b : in  std_logic_vector(14 downto 0)
1906
		);
1907
	end component;
1908

    
1909
	component add_552 is
1910
		port (
1911
			result : out std_logic_vector(31 downto 0);
1912
			in_a : in  std_logic_vector(31 downto 0);
1913
			in_b : in  std_logic_vector(31 downto 0)
1914
		);
1915
	end component;
1916

    
1917
	component sub_553 is
1918
		port (
1919
			result : out std_logic_vector(31 downto 0);
1920
			in_a : in  std_logic_vector(31 downto 0);
1921
			in_b : in  std_logic_vector(31 downto 0)
1922
		);
1923
	end component;
1924

    
1925
	component mul_556 is
1926
		port (
1927
			result : out std_logic_vector(30 downto 0);
1928
			in_a : in  std_logic_vector(30 downto 0);
1929
			in_b : in  std_logic_vector(14 downto 0)
1930
		);
1931
	end component;
1932

    
1933
	component mul_559 is
1934
		port (
1935
			result : out std_logic_vector(30 downto 0);
1936
			in_a : in  std_logic_vector(30 downto 0);
1937
			in_b : in  std_logic_vector(14 downto 0)
1938
		);
1939
	end component;
1940

    
1941
	component mul_561 is
1942
		port (
1943
			result : out std_logic_vector(31 downto 0);
1944
			in_a : in  std_logic_vector(31 downto 0);
1945
			in_b : in  std_logic_vector(15 downto 0)
1946
		);
1947
	end component;
1948

    
1949
	component sub_562 is
1950
		port (
1951
			result : out std_logic_vector(31 downto 0);
1952
			in_a : in  std_logic_vector(31 downto 0);
1953
			in_b : in  std_logic_vector(31 downto 0)
1954
		);
1955
	end component;
1956

    
1957
	component sub_563 is
1958
		port (
1959
			result : out std_logic_vector(31 downto 0);
1960
			in_a : in  std_logic_vector(31 downto 0);
1961
			in_b : in  std_logic_vector(31 downto 0)
1962
		);
1963
	end component;
1964

    
1965
	component add_564 is
1966
		port (
1967
			result : out std_logic_vector(31 downto 0);
1968
			in_a : in  std_logic_vector(31 downto 0);
1969
			in_b : in  std_logic_vector(31 downto 0)
1970
		);
1971
	end component;
1972

    
1973
	component mul_566 is
1974
		port (
1975
			result : out std_logic_vector(31 downto 0);
1976
			in_a : in  std_logic_vector(31 downto 0);
1977
			in_b : in  std_logic_vector(14 downto 0)
1978
		);
1979
	end component;
1980

    
1981
	component sub_567 is
1982
		port (
1983
			result : out std_logic_vector(31 downto 0);
1984
			in_a : in  std_logic_vector(31 downto 0);
1985
			in_b : in  std_logic_vector(31 downto 0)
1986
		);
1987
	end component;
1988

    
1989
	component add_570 is
1990
		port (
1991
			result : out std_logic_vector(31 downto 0);
1992
			in_a : in  std_logic_vector(31 downto 0);
1993
			in_b : in  std_logic_vector(31 downto 0)
1994
		);
1995
	end component;
1996

    
1997
	component mul_573 is
1998
		port (
1999
			result : out std_logic_vector(30 downto 0);
2000
			in_a : in  std_logic_vector(30 downto 0);
2001
			in_b : in  std_logic_vector(14 downto 0)
2002
		);
2003
	end component;
2004

    
2005
	component sub_574 is
2006
		port (
2007
			result : out std_logic_vector(31 downto 0);
2008
			in_a : in  std_logic_vector(31 downto 0);
2009
			in_b : in  std_logic_vector(31 downto 0)
2010
		);
2011
	end component;
2012

    
2013
	component mul_577 is
2014
		port (
2015
			result : out std_logic_vector(30 downto 0);
2016
			in_a : in  std_logic_vector(30 downto 0);
2017
			in_b : in  std_logic_vector(14 downto 0)
2018
		);
2019
	end component;
2020

    
2021
	component mul_579 is
2022
		port (
2023
			result : out std_logic_vector(31 downto 0);
2024
			in_a : in  std_logic_vector(31 downto 0);
2025
			in_b : in  std_logic_vector(15 downto 0)
2026
		);
2027
	end component;
2028

    
2029
	component sub_580 is
2030
		port (
2031
			result : out std_logic_vector(31 downto 0);
2032
			in_a : in  std_logic_vector(31 downto 0);
2033
			in_b : in  std_logic_vector(31 downto 0)
2034
		);
2035
	end component;
2036

    
2037
	component sub_585 is
2038
		port (
2039
			result : out std_logic_vector(31 downto 0);
2040
			in_a : in  std_logic_vector(31 downto 0);
2041
			in_b : in  std_logic_vector(31 downto 0)
2042
		);
2043
	end component;
2044

    
2045
	component sub_586 is
2046
		port (
2047
			result : out std_logic_vector(31 downto 0);
2048
			in_a : in  std_logic_vector(31 downto 0);
2049
			in_b : in  std_logic_vector(31 downto 0)
2050
		);
2051
	end component;
2052

    
2053
	component mul_589 is
2054
		port (
2055
			result : out std_logic_vector(31 downto 0);
2056
			in_a : in  std_logic_vector(31 downto 0);
2057
			in_b : in  std_logic_vector(15 downto 0)
2058
		);
2059
	end component;
2060

    
2061
	component mul_592 is
2062
		port (
2063
			result : out std_logic_vector(31 downto 0);
2064
			in_a : in  std_logic_vector(31 downto 0);
2065
			in_b : in  std_logic_vector(14 downto 0)
2066
		);
2067
	end component;
2068

    
2069
	component sub_593 is
2070
		port (
2071
			result : out std_logic_vector(31 downto 0);
2072
			in_a : in  std_logic_vector(31 downto 0);
2073
			in_b : in  std_logic_vector(31 downto 0)
2074
		);
2075
	end component;
2076

    
2077
	component mul_594 is
2078
		port (
2079
			result : out std_logic_vector(31 downto 0);
2080
			in_a : in  std_logic_vector(31 downto 0);
2081
			in_b : in  std_logic_vector(14 downto 0)
2082
		);
2083
	end component;
2084

    
2085
	component mul_595 is
2086
		port (
2087
			result : out std_logic_vector(31 downto 0);
2088
			in_a : in  std_logic_vector(31 downto 0);
2089
			in_b : in  std_logic_vector(15 downto 0)
2090
		);
2091
	end component;
2092

    
2093
	component sub_596 is
2094
		port (
2095
			result : out std_logic_vector(31 downto 0);
2096
			in_a : in  std_logic_vector(31 downto 0);
2097
			in_b : in  std_logic_vector(31 downto 0)
2098
		);
2099
	end component;
2100

    
2101
	component sub_599 is
2102
		port (
2103
			result : out std_logic_vector(31 downto 0);
2104
			in_a : in  std_logic_vector(31 downto 0);
2105
			in_b : in  std_logic_vector(31 downto 0)
2106
		);
2107
	end component;
2108

    
2109
	component add_600 is
2110
		port (
2111
			result : out std_logic_vector(31 downto 0);
2112
			in_a : in  std_logic_vector(31 downto 0);
2113
			in_b : in  std_logic_vector(31 downto 0)
2114
		);
2115
	end component;
2116

    
2117
	component add_601 is
2118
		port (
2119
			result : out std_logic_vector(26 downto 0);
2120
			in_a : in  std_logic_vector(26 downto 0);
2121
			in_b : in  std_logic_vector(26 downto 0)
2122
		);
2123
	end component;
2124

    
2125
	component add_602 is
2126
		port (
2127
			result : out std_logic_vector(19 downto 0);
2128
			in_a : in  std_logic_vector(19 downto 0);
2129
			in_b : in  std_logic_vector(19 downto 0)
2130
		);
2131
	end component;
2132

    
2133
	component mul_605 is
2134
		port (
2135
			result : out std_logic_vector(30 downto 0);
2136
			in_a : in  std_logic_vector(30 downto 0);
2137
			in_b : in  std_logic_vector(14 downto 0)
2138
		);
2139
	end component;
2140

    
2141
	-- Declaration of signals
2142

    
2143
	signal sig_clock : std_logic;
2144
	signal sig_reset : std_logic;
2145
	signal augh_test_9 : std_logic;
2146
	signal augh_test_11 : std_logic;
2147
	signal sig_start : std_logic;
2148
	signal test_cp_0_16 : std_logic;
2149
	signal test_cp_1_17 : std_logic;
2150
	signal memextrct_loop_sig_21 : std_logic;
2151
	signal psc_loop_sig_20 : std_logic;
2152
	signal memextrct_loop_sig_22 : std_logic;
2153
	signal sig_606 : std_logic_vector(30 downto 0);
2154
	signal sig_607 : std_logic_vector(19 downto 0);
2155
	signal sig_608 : std_logic_vector(26 downto 0);
2156
	signal sig_609 : std_logic_vector(31 downto 0);
2157
	signal sig_610 : std_logic_vector(31 downto 0);
2158
	signal sig_611 : std_logic_vector(31 downto 0);
2159
	signal sig_612 : std_logic_vector(31 downto 0);
2160
	signal sig_613 : std_logic_vector(31 downto 0);
2161
	signal sig_614 : std_logic_vector(31 downto 0);
2162
	signal sig_615 : std_logic_vector(31 downto 0);
2163
	signal sig_616 : std_logic_vector(31 downto 0);
2164
	signal sig_617 : std_logic_vector(31 downto 0);
2165
	signal sig_618 : std_logic_vector(31 downto 0);
2166
	signal sig_619 : std_logic_vector(31 downto 0);
2167
	signal sig_620 : std_logic_vector(31 downto 0);
2168
	signal sig_621 : std_logic_vector(30 downto 0);
2169
	signal sig_622 : std_logic_vector(31 downto 0);
2170
	signal sig_623 : std_logic_vector(30 downto 0);
2171
	signal sig_624 : std_logic_vector(31 downto 0);
2172
	signal sig_625 : std_logic_vector(31 downto 0);
2173
	signal sig_626 : std_logic_vector(31 downto 0);
2174
	signal sig_627 : std_logic_vector(31 downto 0);
2175
	signal sig_628 : std_logic_vector(31 downto 0);
2176
	signal sig_629 : std_logic_vector(31 downto 0);
2177
	signal sig_630 : std_logic_vector(31 downto 0);
2178
	signal sig_631 : std_logic_vector(30 downto 0);
2179
	signal sig_632 : std_logic_vector(30 downto 0);
2180
	signal sig_633 : std_logic_vector(31 downto 0);
2181
	signal sig_634 : std_logic_vector(31 downto 0);
2182
	signal sig_635 : std_logic_vector(30 downto 0);
2183
	signal sig_636 : std_logic_vector(31 downto 0);
2184
	signal sig_637 : std_logic_vector(31 downto 0);
2185
	signal sig_638 : std_logic_vector(31 downto 0);
2186
	signal sig_639 : std_logic_vector(31 downto 0);
2187
	signal sig_640 : std_logic_vector(30 downto 0);
2188
	signal sig_641 : std_logic_vector(30 downto 0);
2189
	signal sig_642 : std_logic_vector(31 downto 0);
2190
	signal sig_643 : std_logic_vector(31 downto 0);
2191
	signal sig_644 : std_logic_vector(30 downto 0);
2192
	signal sig_645 : std_logic_vector(31 downto 0);
2193
	signal sig_646 : std_logic_vector(30 downto 0);
2194
	signal sig_647 : std_logic_vector(31 downto 0);
2195
	signal sig_648 : std_logic_vector(31 downto 0);
2196
	signal sig_649 : std_logic_vector(31 downto 0);
2197
	signal sig_650 : std_logic_vector(31 downto 0);
2198
	signal sig_651 : std_logic_vector(31 downto 0);
2199
	signal sig_652 : std_logic_vector(31 downto 0);
2200
	signal sig_653 : std_logic_vector(31 downto 0);
2201
	signal sig_654 : std_logic_vector(31 downto 0);
2202
	signal sig_655 : std_logic_vector(31 downto 0);
2203
	signal sig_656 : std_logic_vector(31 downto 0);
2204
	signal sig_657 : std_logic_vector(31 downto 0);
2205
	signal sig_658 : std_logic_vector(31 downto 0);
2206
	signal sig_659 : std_logic_vector(30 downto 0);
2207
	signal sig_660 : std_logic_vector(31 downto 0);
2208
	signal sig_661 : std_logic_vector(30 downto 0);
2209
	signal sig_662 : std_logic_vector(31 downto 0);
2210
	signal sig_663 : std_logic_vector(31 downto 0);
2211
	signal sig_664 : std_logic_vector(31 downto 0);
2212
	signal sig_665 : std_logic_vector(31 downto 0);
2213
	signal sig_666 : std_logic_vector(31 downto 0);
2214
	signal sig_667 : std_logic_vector(31 downto 0);
2215
	signal sig_668 : std_logic_vector(31 downto 0);
2216
	signal sig_669 : std_logic_vector(31 downto 0);
2217
	signal sig_670 : std_logic_vector(26 downto 0);
2218
	signal sig_671 : std_logic_vector(30 downto 0);
2219
	signal sig_672 : std_logic;
2220
	signal sig_673 : std_logic;
2221
	signal sig_674 : std_logic;
2222
	signal sig_675 : std_logic_vector(31 downto 0);
2223
	signal sig_676 : std_logic_vector(31 downto 0);
2224
	signal sig_677 : std_logic_vector(31 downto 0);
2225
	signal sig_678 : std_logic_vector(30 downto 0);
2226
	signal sig_679 : std_logic_vector(31 downto 0);
2227
	signal sig_680 : std_logic_vector(31 downto 0);
2228
	signal sig_681 : std_logic_vector(31 downto 0);
2229
	signal sig_682 : std_logic_vector(30 downto 0);
2230
	signal sig_683 : std_logic_vector(31 downto 0);
2231
	signal sig_684 : std_logic_vector(31 downto 0);
2232
	signal sig_685 : std_logic_vector(31 downto 0);
2233
	signal sig_686 : std_logic_vector(31 downto 0);
2234
	signal sig_687 : std_logic_vector(31 downto 0);
2235
	signal sig_688 : std_logic_vector(31 downto 0);
2236
	signal sig_689 : std_logic_vector(31 downto 0);
2237
	signal sig_690 : std_logic;
2238
	signal sig_691 : std_logic_vector(15 downto 0);
2239
	signal sig_692 : std_logic;
2240
	signal sig_693 : std_logic_vector(19 downto 0);
2241
	signal sig_694 : std_logic_vector(31 downto 0);
2242
	signal sig_695 : std_logic_vector(19 downto 0);
2243
	signal sig_696 : std_logic_vector(26 downto 0);
2244
	signal sig_697 : std_logic_vector(19 downto 0);
2245
	signal sig_698 : std_logic;
2246
	signal sig_699 : std_logic;
2247
	signal sig_700 : std_logic_vector(19 downto 0);
2248
	signal sig_701 : std_logic_vector(31 downto 0);
2249
	signal sig_702 : std_logic;
2250
	signal sig_703 : std_logic;
2251
	signal sig_704 : std_logic_vector(31 downto 0);
2252
	signal sig_705 : std_logic;
2253
	signal sig_706 : std_logic_vector(31 downto 0);
2254
	signal sig_707 : std_logic_vector(31 downto 0);
2255
	signal sig_708 : std_logic_vector(31 downto 0);
2256
	signal sig_709 : std_logic_vector(31 downto 0);
2257
	signal sig_710 : std_logic_vector(31 downto 0);
2258
	signal sig_711 : std_logic_vector(31 downto 0);
2259
	signal sig_712 : std_logic_vector(30 downto 0);
2260
	signal sig_713 : std_logic_vector(31 downto 0);
2261
	signal sig_714 : std_logic_vector(19 downto 0);
2262
	signal sig_715 : std_logic_vector(31 downto 0);
2263
	signal sig_716 : std_logic_vector(31 downto 0);
2264
	signal sig_717 : std_logic_vector(19 downto 0);
2265
	signal sig_718 : std_logic_vector(26 downto 0);
2266
	signal sig_719 : std_logic_vector(26 downto 0);
2267
	signal sig_720 : std_logic_vector(26 downto 0);
2268
	signal sig_721 : std_logic;
2269
	signal sig_722 : std_logic;
2270
	signal sig_723 : std_logic;
2271
	signal sig_724 : std_logic;
2272
	signal sig_725 : std_logic;
2273
	signal sig_726 : std_logic;
2274
	signal sig_727 : std_logic;
2275
	signal sig_728 : std_logic;
2276
	signal sig_729 : std_logic;
2277
	signal sig_730 : std_logic;
2278
	signal sig_731 : std_logic;
2279
	signal sig_732 : std_logic;
2280
	signal sig_733 : std_logic;
2281
	signal sig_734 : std_logic;
2282
	signal sig_735 : std_logic;
2283
	signal sig_736 : std_logic;
2284
	signal sig_737 : std_logic;
2285
	signal sig_738 : std_logic;
2286
	signal sig_739 : std_logic;
2287
	signal sig_740 : std_logic;
2288
	signal sig_741 : std_logic;
2289
	signal sig_742 : std_logic;
2290
	signal sig_743 : std_logic;
2291
	signal sig_744 : std_logic;
2292
	signal sig_745 : std_logic;
2293
	signal sig_746 : std_logic;
2294
	signal sig_747 : std_logic;
2295
	signal sig_748 : std_logic;
2296
	signal sig_749 : std_logic;
2297
	signal sig_750 : std_logic;
2298
	signal sig_751 : std_logic;
2299
	signal sig_752 : std_logic;
2300
	signal sig_753 : std_logic;
2301
	signal sig_754 : std_logic;
2302
	signal sig_755 : std_logic;
2303
	signal sig_756 : std_logic;
2304
	signal sig_757 : std_logic;
2305
	signal sig_758 : std_logic;
2306
	signal sig_759 : std_logic;
2307
	signal sig_760 : std_logic;
2308
	signal sig_761 : std_logic;
2309
	signal sig_762 : std_logic;
2310
	signal sig_763 : std_logic;
2311
	signal sig_764 : std_logic;
2312
	signal sig_765 : std_logic;
2313
	signal sig_766 : std_logic;
2314
	signal sig_767 : std_logic;
2315
	signal sig_768 : std_logic;
2316
	signal sig_769 : std_logic;
2317
	signal sig_770 : std_logic;
2318
	signal sig_771 : std_logic;
2319
	signal sig_772 : std_logic;
2320
	signal sig_773 : std_logic;
2321
	signal sig_774 : std_logic;
2322
	signal sig_775 : std_logic;
2323
	signal sig_776 : std_logic;
2324
	signal sig_777 : std_logic;
2325
	signal sig_778 : std_logic;
2326
	signal sig_779 : std_logic;
2327
	signal sig_780 : std_logic;
2328
	signal sig_781 : std_logic;
2329
	signal sig_782 : std_logic;
2330
	signal sig_783 : std_logic;
2331
	signal sig_784 : std_logic;
2332
	signal sig_785 : std_logic;
2333
	signal sig_786 : std_logic;
2334
	signal sig_787 : std_logic;
2335
	signal sig_788 : std_logic;
2336
	signal sig_789 : std_logic;
2337
	signal sig_790 : std_logic;
2338
	signal sig_791 : std_logic;
2339
	signal sig_792 : std_logic;
2340
	signal sig_793 : std_logic;
2341
	signal sig_794 : std_logic;
2342
	signal sig_795 : std_logic;
2343
	signal sig_796 : std_logic;
2344
	signal sig_797 : std_logic;
2345
	signal sig_798 : std_logic;
2346
	signal sig_799 : std_logic;
2347
	signal sig_800 : std_logic;
2348
	signal sig_801 : std_logic;
2349
	signal sig_802 : std_logic;
2350
	signal sig_803 : std_logic;
2351
	signal sig_804 : std_logic;
2352
	signal sig_805 : std_logic;
2353
	signal sig_806 : std_logic;
2354
	signal sig_807 : std_logic;
2355
	signal sig_808 : std_logic;
2356
	signal sig_809 : std_logic;
2357
	signal sig_810 : std_logic;
2358
	signal sig_811 : std_logic;
2359
	signal sig_812 : std_logic;
2360
	signal sig_813 : std_logic;
2361
	signal sig_814 : std_logic;
2362
	signal sig_815 : std_logic;
2363
	signal sig_816 : std_logic;
2364
	signal sig_817 : std_logic;
2365
	signal sig_818 : std_logic;
2366
	signal sig_819 : std_logic;
2367
	signal sig_820 : std_logic;
2368
	signal sig_821 : std_logic;
2369
	signal sig_822 : std_logic;
2370
	signal sig_823 : std_logic;
2371
	signal sig_824 : std_logic;
2372
	signal sig_825 : std_logic;
2373
	signal sig_826 : std_logic;
2374
	signal sig_827 : std_logic;
2375
	signal sig_828 : std_logic;
2376
	signal sig_829 : std_logic;
2377
	signal sig_830 : std_logic;
2378
	signal sig_831 : std_logic;
2379
	signal sig_832 : std_logic;
2380
	signal sig_833 : std_logic;
2381
	signal sig_834 : std_logic;
2382
	signal sig_835 : std_logic;
2383
	signal sig_836 : std_logic;
2384
	signal sig_837 : std_logic;
2385
	signal sig_838 : std_logic;
2386
	signal sig_839 : std_logic;
2387
	signal sig_840 : std_logic;
2388
	signal sig_841 : std_logic;
2389
	signal sig_842 : std_logic;
2390
	signal sig_843 : std_logic;
2391
	signal sig_844 : std_logic;
2392
	signal sig_845 : std_logic;
2393
	signal sig_846 : std_logic;
2394
	signal sig_847 : std_logic;
2395
	signal sig_848 : std_logic;
2396
	signal sig_849 : std_logic;
2397
	signal sig_850 : std_logic;
2398
	signal sig_851 : std_logic;
2399
	signal sig_852 : std_logic;
2400
	signal sig_853 : std_logic;
2401
	signal sig_854 : std_logic;
2402
	signal sig_855 : std_logic;
2403
	signal sig_856 : std_logic;
2404
	signal sig_857 : std_logic;
2405
	signal sig_858 : std_logic;
2406
	signal sig_859 : std_logic;
2407
	signal sig_860 : std_logic;
2408
	signal sig_861 : std_logic;
2409
	signal sig_862 : std_logic;
2410
	signal sig_863 : std_logic;
2411
	signal sig_864 : std_logic;
2412
	signal sig_865 : std_logic;
2413
	signal sig_866 : std_logic;
2414
	signal sig_867 : std_logic;
2415
	signal sig_868 : std_logic;
2416
	signal sig_869 : std_logic;
2417
	signal sig_870 : std_logic;
2418
	signal sig_871 : std_logic;
2419
	signal sig_872 : std_logic;
2420
	signal sig_873 : std_logic;
2421
	signal sig_874 : std_logic;
2422
	signal sig_875 : std_logic;
2423
	signal sig_876 : std_logic;
2424
	signal sig_877 : std_logic;
2425
	signal sig_878 : std_logic;
2426
	signal sig_879 : std_logic;
2427
	signal sig_880 : std_logic;
2428
	signal sig_881 : std_logic;
2429
	signal sig_882 : std_logic;
2430
	signal sig_883 : std_logic;
2431
	signal sig_884 : std_logic;
2432
	signal sig_885 : std_logic;
2433
	signal sig_886 : std_logic;
2434
	signal sig_887 : std_logic;
2435
	signal sig_888 : std_logic;
2436
	signal sig_889 : std_logic;
2437
	signal sig_890 : std_logic;
2438
	signal sig_891 : std_logic;
2439
	signal sig_892 : std_logic;
2440
	signal sig_893 : std_logic;
2441
	signal sig_894 : std_logic;
2442
	signal sig_895 : std_logic;
2443
	signal sig_896 : std_logic;
2444
	signal sig_897 : std_logic;
2445
	signal sig_898 : std_logic;
2446
	signal sig_899 : std_logic;
2447
	signal sig_900 : std_logic;
2448
	signal sig_901 : std_logic;
2449
	signal sig_902 : std_logic;
2450
	signal sig_903 : std_logic;
2451
	signal sig_904 : std_logic;
2452
	signal sig_905 : std_logic;
2453
	signal sig_906 : std_logic;
2454
	signal sig_907 : std_logic;
2455
	signal sig_908 : std_logic;
2456
	signal sig_909 : std_logic;
2457
	signal sig_910 : std_logic;
2458
	signal sig_911 : std_logic;
2459
	signal sig_912 : std_logic;
2460
	signal sig_913 : std_logic;
2461
	signal sig_914 : std_logic;
2462
	signal sig_915 : std_logic;
2463
	signal sig_916 : std_logic;
2464
	signal sig_917 : std_logic;
2465
	signal sig_918 : std_logic;
2466
	signal sig_919 : std_logic;
2467
	signal sig_920 : std_logic;
2468
	signal sig_921 : std_logic;
2469
	signal sig_922 : std_logic;
2470
	signal sig_923 : std_logic;
2471
	signal sig_924 : std_logic;
2472
	signal sig_925 : std_logic;
2473
	signal sig_926 : std_logic;
2474
	signal sig_927 : std_logic;
2475
	signal sig_928 : std_logic;
2476
	signal sig_929 : std_logic;
2477
	signal sig_930 : std_logic;
2478
	signal sig_931 : std_logic;
2479
	signal sig_932 : std_logic;
2480
	signal sig_933 : std_logic;
2481
	signal sig_934 : std_logic;
2482
	signal sig_935 : std_logic;
2483
	signal sig_936 : std_logic;
2484
	signal sig_937 : std_logic;
2485
	signal sig_938 : std_logic;
2486
	signal sig_939 : std_logic;
2487
	signal sig_940 : std_logic;
2488
	signal sig_941 : std_logic;
2489
	signal sig_942 : std_logic;
2490
	signal sig_943 : std_logic;
2491
	signal sig_944 : std_logic;
2492
	signal sig_945 : std_logic;
2493
	signal sig_946 : std_logic;
2494
	signal sig_947 : std_logic;
2495
	signal sig_948 : std_logic;
2496
	signal sig_949 : std_logic;
2497
	signal sig_950 : std_logic;
2498
	signal sig_951 : std_logic;
2499
	signal sig_952 : std_logic;
2500
	signal sig_953 : std_logic;
2501
	signal sig_954 : std_logic;
2502
	signal sig_955 : std_logic;
2503
	signal sig_956 : std_logic;
2504
	signal sig_957 : std_logic;
2505
	signal sig_958 : std_logic;
2506
	signal sig_959 : std_logic;
2507
	signal sig_960 : std_logic;
2508
	signal sig_961 : std_logic;
2509
	signal sig_962 : std_logic;
2510
	signal sig_963 : std_logic;
2511
	signal sig_964 : std_logic;
2512
	signal sig_965 : std_logic;
2513
	signal sig_966 : std_logic;
2514
	signal sig_967 : std_logic;
2515
	signal sig_968 : std_logic;
2516
	signal sig_969 : std_logic;
2517
	signal sig_970 : std_logic;
2518
	signal sig_971 : std_logic;
2519
	signal sig_972 : std_logic;
2520
	signal sig_973 : std_logic;
2521
	signal sig_974 : std_logic;
2522
	signal sig_975 : std_logic;
2523
	signal sig_976 : std_logic;
2524
	signal sig_977 : std_logic;
2525
	signal sig_978 : std_logic;
2526
	signal sig_979 : std_logic;
2527
	signal sig_980 : std_logic;
2528
	signal sig_981 : std_logic;
2529
	signal sig_982 : std_logic;
2530
	signal sig_983 : std_logic;
2531
	signal sig_984 : std_logic;
2532
	signal sig_985 : std_logic;
2533
	signal sig_986 : std_logic;
2534
	signal sig_987 : std_logic;
2535
	signal sig_988 : std_logic;
2536
	signal sig_989 : std_logic;
2537
	signal sig_990 : std_logic;
2538
	signal sig_991 : std_logic;
2539
	signal sig_992 : std_logic;
2540
	signal sig_993 : std_logic;
2541
	signal sig_994 : std_logic;
2542
	signal sig_995 : std_logic;
2543
	signal sig_996 : std_logic;
2544
	signal sig_997 : std_logic;
2545
	signal sig_998 : std_logic;
2546
	signal sig_999 : std_logic;
2547
	signal sig_1000 : std_logic;
2548
	signal sig_1001 : std_logic;
2549
	signal sig_1002 : std_logic;
2550
	signal sig_1003 : std_logic;
2551
	signal sig_1004 : std_logic;
2552
	signal sig_1005 : std_logic;
2553
	signal sig_1006 : std_logic;
2554
	signal sig_1007 : std_logic;
2555
	signal sig_1008 : std_logic;
2556
	signal sig_1009 : std_logic;
2557
	signal sig_1010 : std_logic;
2558
	signal sig_1011 : std_logic;
2559
	signal sig_1012 : std_logic;
2560
	signal sig_1013 : std_logic;
2561
	signal sig_1014 : std_logic;
2562
	signal sig_1015 : std_logic;
2563
	signal sig_1016 : std_logic;
2564
	signal sig_1017 : std_logic;
2565
	signal sig_1018 : std_logic;
2566
	signal sig_1019 : std_logic;
2567
	signal sig_1020 : std_logic;
2568
	signal sig_1021 : std_logic;
2569
	signal sig_1022 : std_logic;
2570
	signal sig_1023 : std_logic;
2571
	signal sig_1024 : std_logic;
2572
	signal sig_1025 : std_logic;
2573
	signal sig_1026 : std_logic;
2574
	signal sig_1027 : std_logic;
2575
	signal sig_1028 : std_logic;
2576
	signal sig_1029 : std_logic;
2577
	signal sig_1030 : std_logic;
2578
	signal sig_1031 : std_logic;
2579
	signal sig_1032 : std_logic;
2580
	signal sig_1033 : std_logic;
2581
	signal sig_1034 : std_logic;
2582
	signal sig_1035 : std_logic;
2583
	signal sig_1036 : std_logic;
2584
	signal sig_1037 : std_logic;
2585
	signal sig_1038 : std_logic;
2586
	signal sig_1039 : std_logic;
2587
	signal sig_1040 : std_logic;
2588
	signal sig_1041 : std_logic;
2589
	signal sig_1042 : std_logic;
2590
	signal sig_1043 : std_logic;
2591
	signal sig_1044 : std_logic;
2592
	signal sig_1045 : std_logic;
2593
	signal sig_1046 : std_logic;
2594
	signal sig_1047 : std_logic;
2595
	signal sig_1048 : std_logic;
2596
	signal sig_1049 : std_logic;
2597
	signal sig_1050 : std_logic;
2598
	signal sig_1051 : std_logic;
2599
	signal sig_1052 : std_logic;
2600
	signal sig_1053 : std_logic;
2601
	signal sig_1054 : std_logic;
2602
	signal sig_1055 : std_logic;
2603
	signal sig_1056 : std_logic;
2604
	signal sig_1057 : std_logic;
2605
	signal sig_1058 : std_logic;
2606
	signal sig_1059 : std_logic_vector(31 downto 0);
2607
	signal sig_1060 : std_logic_vector(31 downto 0);
2608
	signal sig_1061 : std_logic_vector(31 downto 0);
2609
	signal sig_1062 : std_logic_vector(31 downto 0);
2610
	signal sig_1063 : std_logic_vector(31 downto 0);
2611
	signal sig_1064 : std_logic;
2612
	signal sig_1065 : std_logic;
2613
	signal sig_1066 : std_logic;
2614
	signal sig_1067 : std_logic;
2615
	signal sig_1068 : std_logic;
2616
	signal sig_1069 : std_logic;
2617
	signal sig_1070 : std_logic;
2618
	signal sig_1071 : std_logic_vector(31 downto 0);
2619
	signal sig_1072 : std_logic_vector(31 downto 0);
2620
	signal sig_1073 : std_logic_vector(31 downto 0);
2621
	signal sig_1074 : std_logic_vector(31 downto 0);
2622
	signal sig_1075 : std_logic_vector(31 downto 0);
2623
	signal sig_1076 : std_logic_vector(30 downto 0);
2624
	signal sig_1077 : std_logic_vector(31 downto 0);
2625
	signal sig_1078 : std_logic_vector(31 downto 0);
2626
	signal sig_1079 : std_logic_vector(31 downto 0);
2627
	signal sig_1080 : std_logic_vector(19 downto 0);
2628
	signal sig_1081 : std_logic_vector(19 downto 0);
2629
	signal sig_1082 : std_logic_vector(19 downto 0);
2630
	signal sig_1083 : std_logic_vector(31 downto 0);
2631
	signal sig_1084 : std_logic_vector(31 downto 0);
2632
	signal sig_1085 : std_logic_vector(31 downto 0);
2633
	signal sig_1086 : std_logic_vector(31 downto 0);
2634
	signal sig_1087 : std_logic_vector(31 downto 0);
2635
	signal sig_1088 : std_logic_vector(26 downto 0);
2636
	signal sig_1089 : std_logic_vector(26 downto 0);
2637
	signal sig_1090 : std_logic_vector(31 downto 0);
2638
	signal sig_1091 : std_logic_vector(29 downto 0);
2639
	signal sig_1092 : std_logic_vector(31 downto 0);
2640
	signal sig_1093 : std_logic_vector(31 downto 0);
2641
	signal sig_1094 : std_logic_vector(31 downto 0);
2642
	signal sig_1095 : std_logic_vector(31 downto 0);
2643
	signal sig_1096 : std_logic_vector(7 downto 0);
2644
	signal sig_1097 : std_logic_vector(7 downto 0);
2645
	signal sig_1098 : std_logic_vector(7 downto 0);
2646
	signal sig_1099 : std_logic_vector(7 downto 0);
2647
	signal sig_1100 : std_logic_vector(31 downto 0);
2648
	signal sig_1101 : std_logic_vector(31 downto 0);
2649
	signal sig_1102 : std_logic_vector(31 downto 0);
2650
	signal sig_1103 : std_logic_vector(31 downto 0);
2651
	signal sig_1104 : std_logic_vector(26 downto 0);
2652
	signal sig_1105 : std_logic_vector(31 downto 0);
2653
	signal sig_1106 : std_logic;
2654
	signal sig_1107 : std_logic_vector(26 downto 0);
2655
	signal sig_1108 : std_logic_vector(26 downto 0);
2656
	signal sig_1109 : std_logic_vector(31 downto 0);
2657
	signal sig_1110 : std_logic_vector(31 downto 0);
2658
	signal sig_1111 : std_logic_vector(31 downto 0);
2659
	signal sig_1112 : std_logic_vector(30 downto 0);
2660
	signal sig_1113 : std_logic_vector(31 downto 0);
2661
	signal sig_1114 : std_logic_vector(31 downto 0);
2662
	signal sig_1115 : std_logic_vector(31 downto 0);
2663
	signal sig_1116 : std_logic_vector(26 downto 0);
2664
	signal sig_1117 : std_logic_vector(26 downto 0);
2665
	signal sig_1118 : std_logic_vector(26 downto 0);
2666
	signal sig_1119 : std_logic_vector(31 downto 0);
2667
	signal sig_1120 : std_logic_vector(31 downto 0);
2668
	signal sig_1121 : std_logic_vector(31 downto 0);
2669
	signal sig_1122 : std_logic_vector(29 downto 0);
2670
	signal sig_1123 : std_logic_vector(31 downto 0);
2671
	signal sig_1124 : std_logic_vector(31 downto 0);
2672
	signal sig_1125 : std_logic_vector(19 downto 0);
2673
	signal sig_1126 : std_logic_vector(19 downto 0);
2674
	signal sig_1127 : std_logic_vector(19 downto 0);
2675
	signal sig_1128 : std_logic_vector(15 downto 0);
2676
	signal sig_1129 : std_logic_vector(31 downto 0);
2677
	signal sig_1130 : std_logic;
2678
	signal sig_1131 : std_logic_vector(31 downto 0);
2679
	signal sig_1132 : std_logic_vector(30 downto 0);
2680
	signal sig_1133 : std_logic_vector(31 downto 0);
2681
	signal sig_1134 : std_logic_vector(31 downto 0);
2682
	signal sig_1135 : std_logic_vector(31 downto 0);
2683
	signal sig_1136 : std_logic_vector(31 downto 0);
2684
	signal sig_1137 : std_logic_vector(31 downto 0);
2685
	signal sig_1138 : std_logic_vector(31 downto 0);
2686
	signal sig_1139 : std_logic_vector(31 downto 0);
2687
	signal sig_1140 : std_logic_vector(31 downto 0);
2688
	signal sig_1141 : std_logic_vector(31 downto 0);
2689
	signal sig_1142 : std_logic_vector(31 downto 0);
2690
	signal sig_1143 : std_logic_vector(30 downto 0);
2691
	signal sig_1144 : std_logic_vector(31 downto 0);
2692
	signal sig_1145 : std_logic_vector(31 downto 0);
2693
	signal sig_1146 : std_logic_vector(29 downto 0);
2694
	signal sig_1147 : std_logic_vector(30 downto 0);
2695
	signal sig_1148 : std_logic_vector(30 downto 0);
2696
	signal sig_1149 : std_logic_vector(31 downto 0);
2697
	signal sig_1150 : std_logic_vector(31 downto 0);
2698
	signal sig_1151 : std_logic_vector(19 downto 0);
2699
	signal sig_1152 : std_logic_vector(19 downto 0);
2700
	signal sig_1153 : std_logic_vector(7 downto 0);
2701
	signal sig_1154 : std_logic_vector(7 downto 0);
2702
	signal sig_1155 : std_logic_vector(26 downto 0);
2703
	signal sig_1156 : std_logic_vector(31 downto 0);
2704
	signal sig_1157 : std_logic;
2705
	signal sig_1158 : std_logic_vector(7 downto 0);
2706
	signal sig_1159 : std_logic_vector(7 downto 0);
2707
	signal sig_1160 : std_logic_vector(19 downto 0);
2708
	signal sig_1161 : std_logic_vector(31 downto 0);
2709
	signal sig_1162 : std_logic_vector(31 downto 0);
2710
	signal sig_1163 : std_logic_vector(19 downto 0);
2711
	signal sig_1164 : std_logic_vector(31 downto 0);
2712
	signal sig_1165 : std_logic_vector(19 downto 0);
2713
	signal sig_1166 : std_logic_vector(19 downto 0);
2714
	signal sig_1167 : std_logic_vector(19 downto 0);
2715
	signal sig_1168 : std_logic_vector(19 downto 0);
2716
	signal sig_1169 : std_logic_vector(19 downto 0);
2717
	signal sig_1170 : std_logic_vector(31 downto 0);
2718
	signal sig_1171 : std_logic_vector(19 downto 0);
2719
	signal sig_1172 : std_logic_vector(19 downto 0);
2720
	signal sig_1173 : std_logic_vector(19 downto 0);
2721
	signal sig_1174 : std_logic_vector(31 downto 0);
2722
	signal sig_1175 : std_logic_vector(31 downto 0);
2723
	signal sig_1176 : std_logic_vector(31 downto 0);
2724
	signal sig_1177 : std_logic_vector(31 downto 0);
2725
	signal sig_1178 : std_logic_vector(31 downto 0);
2726
	signal sig_1179 : std_logic_vector(19 downto 0);
2727
	signal sig_1180 : std_logic_vector(19 downto 0);
2728
	signal sig_1181 : std_logic_vector(19 downto 0);
2729
	signal sig_1182 : std_logic_vector(19 downto 0);
2730
	signal sig_1183 : std_logic_vector(19 downto 0);
2731

    
2732
	-- Other inlined components
2733

    
2734
	signal mux_66 : std_logic_vector(2 downto 0);
2735
	signal mux_30 : std_logic;
2736
	signal mux_32 : std_logic;
2737
	signal mux_33 : std_logic;
2738
	signal mux_34 : std_logic;
2739
	signal augh_main_k : std_logic_vector(31 downto 0) := (others => '0');
2740
	signal read32_ret0_10 : std_logic_vector(31 downto 0) := (others => '0');
2741
	signal mux_58 : std_logic_vector(2 downto 0);
2742
	signal mux_59 : std_logic_vector(2 downto 0);
2743
	signal mux_60 : std_logic;
2744
	signal mux_61 : std_logic_vector(7 downto 0);
2745
	signal mux_62 : std_logic_vector(2 downto 0);
2746
	signal mux_63 : std_logic_vector(2 downto 0);
2747
	signal mux_64 : std_logic;
2748
	signal mux_65 : std_logic_vector(7 downto 0);
2749
	signal mux_35 : std_logic;
2750
	signal mux_36 : std_logic;
2751
	signal mux_37 : std_logic_vector(15 downto 0);
2752
	signal mux_38 : std_logic;
2753
	signal mux_39 : std_logic_vector(31 downto 0);
2754
	signal idct_2d_r : std_logic_vector(31 downto 0) := (others => '0');
2755
	signal mux_45 : std_logic_vector(4 downto 0);
2756
	signal mux_46 : std_logic_vector(4 downto 0);
2757
	signal mux_47 : std_logic_vector(4 downto 0);
2758
	signal mux_48 : std_logic_vector(4 downto 0);
2759
	signal mux_49 : std_logic_vector(4 downto 0);
2760
	signal mux_40 : std_logic_vector(4 downto 0);
2761
	signal mux_41 : std_logic_vector(4 downto 0);
2762
	signal mux_42 : std_logic;
2763
	signal mux_43 : std_logic_vector(4 downto 0);
2764
	signal mux_44 : std_logic_vector(4 downto 0);
2765
	signal write8_u8 : std_logic_vector(7 downto 0) := (others => '0');
2766
	signal mux_50 : std_logic_vector(31 downto 0);
2767
	signal mux_51 : std_logic_vector(4 downto 0);
2768
	signal mux_52 : std_logic;
2769
	signal mux_53 : std_logic_vector(7 downto 0);
2770
	signal mux_54 : std_logic_vector(2 downto 0);
2771
	signal mux_55 : std_logic_vector(2 downto 0);
2772
	signal mux_56 : std_logic;
2773
	signal mux_57 : std_logic_vector(7 downto 0);
2774
	signal idct_z3_reg4 : std_logic_vector(31 downto 0) := (others => '0');
2775
	signal idct_z3_reg5 : std_logic_vector(31 downto 0) := (others => '0');
2776
	signal idct_z3_reg6 : std_logic_vector(31 downto 0) := (others => '0');
2777
	signal idct_z3_reg7 : std_logic_vector(31 downto 0) := (others => '0');
2778
	signal idct_z1_reg0 : std_logic_vector(31 downto 0) := (others => '0');
2779
	signal idct_z1_reg1 : std_logic_vector(31 downto 0) := (others => '0');
2780
	signal idct_z1_reg2 : std_logic_vector(31 downto 0) := (others => '0');
2781
	signal idct_z1_reg3 : std_logic_vector(31 downto 0) := (others => '0');
2782
	signal idct_z1_reg4 : std_logic_vector(31 downto 0) := (others => '0');
2783
	signal mux_88 : std_logic;
2784
	signal mux_67 : std_logic_vector(2 downto 0);
2785
	signal mux_68 : std_logic;
2786
	signal mux_69 : std_logic_vector(31 downto 0);
2787
	signal mux_71 : std_logic_vector(31 downto 0);
2788
	signal mux_73 : std_logic_vector(31 downto 0);
2789
	signal mux_75 : std_logic_vector(31 downto 0);
2790
	signal mux_77 : std_logic_vector(31 downto 0);
2791
	signal mux_79 : std_logic_vector(31 downto 0);
2792
	signal mux_81 : std_logic_vector(31 downto 0);
2793
	signal mux_83 : std_logic_vector(31 downto 0);
2794
	signal mux_85 : std_logic_vector(7 downto 0);
2795
	signal mux_86 : std_logic_vector(2 downto 0);
2796
	signal mux_87 : std_logic_vector(2 downto 0);
2797
	signal mux_28 : std_logic;
2798
	signal idct_z1_reg5 : std_logic_vector(31 downto 0) := (others => '0');
2799
	signal idct_z1_reg6 : std_logic_vector(31 downto 0) := (others => '0');
2800
	signal idct_z1_reg7 : std_logic_vector(31 downto 0) := (others => '0');
2801
	signal idct_z2_reg0 : std_logic_vector(31 downto 0) := (others => '0');
2802
	signal idct_z2_reg1 : std_logic_vector(31 downto 0) := (others => '0');
2803
	signal idct_z2_reg2 : std_logic_vector(31 downto 0) := (others => '0');
2804
	signal idct_z2_reg3 : std_logic_vector(31 downto 0) := (others => '0');
2805
	signal idct_z2_reg4 : std_logic_vector(31 downto 0) := (others => '0');
2806
	signal idct_z2_reg5 : std_logic_vector(31 downto 0) := (others => '0');
2807
	signal idct_z2_reg6 : std_logic_vector(31 downto 0) := (others => '0');
2808
	signal idct_z2_reg7 : std_logic_vector(31 downto 0) := (others => '0');
2809
	signal mux_109 : std_logic_vector(31 downto 0);
2810
	signal mux_154 : std_logic;
2811
	signal mux_156 : std_logic_vector(7 downto 0);
2812
	signal idct_2d_yc_reg0 : std_logic_vector(31 downto 0) := (others => '0');
2813
	signal idct_2d_yc_reg1 : std_logic_vector(31 downto 0) := (others => '0');
2814
	signal idct_2d_yc_reg2 : std_logic_vector(31 downto 0) := (others => '0');
2815
	signal idct_2d_yc_reg3 : std_logic_vector(31 downto 0) := (others => '0');
2816
	signal idct_2d_yc_reg4 : std_logic_vector(31 downto 0) := (others => '0');
2817
	signal idct_2d_yc_reg5 : std_logic_vector(31 downto 0) := (others => '0');
2818
	signal idct_2d_yc_reg6 : std_logic_vector(31 downto 0) := (others => '0');
2819
	signal idct_2d_yc_reg7 : std_logic_vector(31 downto 0) := (others => '0');
2820
	signal mux_89 : std_logic_vector(7 downto 0);
2821
	signal mux_90 : std_logic_vector(2 downto 0);
2822
	signal mux_134 : std_logic;
2823
	signal mux_91 : std_logic_vector(2 downto 0);
2824
	signal mux_92 : std_logic;
2825
	signal mux_158 : std_logic_vector(7 downto 0);
2826
	signal mux_111 : std_logic_vector(31 downto 0);
2827
	signal mux_113 : std_logic_vector(31 downto 0);
2828
	signal mux_115 : std_logic_vector(31 downto 0);
2829
	signal mux_117 : std_logic_vector(31 downto 0);
2830
	signal mux_119 : std_logic_vector(31 downto 0);
2831
	signal mux_121 : std_logic_vector(31 downto 0);
2832
	signal mux_123 : std_logic_vector(31 downto 0);
2833
	signal or_224 : std_logic_vector(31 downto 0);
2834
	signal and_225 : std_logic_vector(31 downto 0);
2835
	signal or_231 : std_logic_vector(31 downto 0);
2836
	signal and_232 : std_logic_vector(31 downto 0);
2837
	signal or_250 : std_logic_vector(31 downto 0);
2838
	signal and_251 : std_logic_vector(31 downto 0);
2839
	signal or_260 : std_logic_vector(31 downto 0);
2840
	signal and_261 : std_logic_vector(31 downto 0);
2841
	signal or_282 : std_logic_vector(31 downto 0);
2842
	signal and_283 : std_logic_vector(31 downto 0);
2843
	signal or_285 : std_logic_vector(31 downto 0);
2844
	signal and_286 : std_logic_vector(31 downto 0);
2845
	signal or_289 : std_logic_vector(31 downto 0);
2846
	signal and_290 : std_logic_vector(31 downto 0);
2847
	signal or_291 : std_logic_vector(31 downto 0);
2848
	signal and_292 : std_logic_vector(31 downto 0);
2849
	signal or_297 : std_logic_vector(31 downto 0);
2850
	signal and_298 : std_logic_vector(31 downto 0);
2851
	signal or_299 : std_logic_vector(31 downto 0);
2852
	signal and_300 : std_logic_vector(31 downto 0);
2853
	signal or_320 : std_logic_vector(31 downto 0);
2854
	signal and_321 : std_logic_vector(31 downto 0);
2855
	signal or_326 : std_logic_vector(31 downto 0);
2856
	signal and_327 : std_logic_vector(31 downto 0);
2857
	signal or_333 : std_logic_vector(31 downto 0);
2858
	signal and_334 : std_logic_vector(31 downto 0);
2859
	signal or_363 : std_logic_vector(31 downto 0);
2860
	signal and_364 : std_logic_vector(31 downto 0);
2861
	signal and_403 : std_logic_vector(7 downto 0);
2862
	signal and_405 : std_logic_vector(7 downto 0);
2863
	signal and_407 : std_logic_vector(7 downto 0);
2864
	signal and_409 : std_logic_vector(7 downto 0);
2865
	signal and_415 : std_logic_vector(30 downto 0);
2866
	signal or_464 : std_logic_vector(31 downto 0);
2867
	signal and_465 : std_logic_vector(31 downto 0);
2868
	signal or_470 : std_logic_vector(31 downto 0);
2869
	signal and_471 : std_logic_vector(31 downto 0);
2870
	signal or_472 : std_logic_vector(31 downto 0);
2871
	signal and_473 : std_logic_vector(31 downto 0);
2872
	signal or_500 : std_logic_vector(31 downto 0);
2873
	signal and_501 : std_logic_vector(31 downto 0);
2874
	signal or_504 : std_logic_vector(31 downto 0);
2875
	signal and_505 : std_logic_vector(31 downto 0);
2876
	signal or_506 : std_logic_vector(31 downto 0);
2877
	signal and_507 : std_logic_vector(31 downto 0);
2878
	signal or_514 : std_logic_vector(31 downto 0);
2879
	signal and_515 : std_logic_vector(31 downto 0);
2880
	signal or_522 : std_logic_vector(31 downto 0);
2881
	signal and_523 : std_logic_vector(31 downto 0);
2882
	signal psc_loop_reg_13 : std_logic_vector(15 downto 0) := (others => '0');
2883
	signal cp_id_reg_14 : std_logic := '0';
2884
	signal cp_id_reg_stable_15 : std_logic := '0';
2885
	signal psc_stuff_reg_18 : std_logic_vector(23 downto 0) := (others => '0');
2886
	signal psc_stuff_reg_19 : std_logic_vector(62 downto 0) := "000000000000000000000000000000000000000000000000000000000000000";
2887
	signal mux_129 : std_logic_vector(31 downto 0);
2888
	signal mux_133 : std_logic_vector(7 downto 0);
2889
	signal mux_135 : std_logic_vector(31 downto 0);
2890
	signal mux_137 : std_logic_vector(7 downto 0);
2891
	signal mux_138 : std_logic_vector(2 downto 0);
2892
	signal mux_139 : std_logic_vector(2 downto 0);
2893
	signal mux_140 : std_logic;
2894
	signal mux_141 : std_logic_vector(7 downto 0);
2895
	signal mux_142 : std_logic_vector(2 downto 0);
2896
	signal mux_143 : std_logic_vector(2 downto 0);
2897
	signal mux_144 : std_logic;
2898
	signal mux_147 : std_logic;
2899
	signal mux_149 : std_logic_vector(31 downto 0);
2900
	signal mux_150 : std_logic;
2901
	signal mux_151 : std_logic;
2902
	signal mux_152 : std_logic_vector(63 downto 0);
2903
	signal mux_155 : std_logic;
2904
	signal or_221 : std_logic_vector(31 downto 0);
2905
	signal and_222 : std_logic_vector(31 downto 0);
2906
	signal or_233 : std_logic_vector(31 downto 0);
2907
	signal and_234 : std_logic_vector(31 downto 0);
2908
	signal or_237 : std_logic_vector(31 downto 0);
2909
	signal and_238 : std_logic_vector(31 downto 0);
2910
	signal or_252 : std_logic_vector(31 downto 0);
2911
	signal and_253 : std_logic_vector(31 downto 0);
2912
	signal or_256 : std_logic_vector(31 downto 0);
2913
	signal and_257 : std_logic_vector(31 downto 0);
2914
	signal or_268 : std_logic_vector(31 downto 0);
2915
	signal and_269 : std_logic_vector(31 downto 0);
2916
	signal or_270 : std_logic_vector(31 downto 0);
2917
	signal and_271 : std_logic_vector(31 downto 0);
2918
	signal or_274 : std_logic_vector(31 downto 0);
2919
	signal and_275 : std_logic_vector(31 downto 0);
2920
	signal or_278 : std_logic_vector(31 downto 0);
2921
	signal and_279 : std_logic_vector(31 downto 0);
2922
	signal or_310 : std_logic_vector(31 downto 0);
2923
	signal and_311 : std_logic_vector(31 downto 0);
2924
	signal or_316 : std_logic_vector(31 downto 0);
2925
	signal and_317 : std_logic_vector(31 downto 0);
2926
	signal or_358 : std_logic_vector(31 downto 0);
2927
	signal and_359 : std_logic_vector(31 downto 0);
2928
	signal or_366 : std_logic_vector(31 downto 0);
2929
	signal and_367 : std_logic_vector(31 downto 0);
2930
	signal or_374 : std_logic_vector(31 downto 0);
2931
	signal and_375 : std_logic_vector(31 downto 0);
2932
	signal or_417 : std_logic_vector(31 downto 0);
2933
	signal and_418 : std_logic_vector(31 downto 0);
2934
	signal or_421 : std_logic_vector(31 downto 0);
2935
	signal and_422 : std_logic_vector(31 downto 0);
2936
	signal or_435 : std_logic_vector(31 downto 0);
2937
	signal and_436 : std_logic_vector(31 downto 0);
2938
	signal or_452 : std_logic_vector(31 downto 0);
2939
	signal and_453 : std_logic_vector(31 downto 0);
2940
	signal and_494 : std_logic_vector(31 downto 0);
2941
	signal and_498 : std_logic_vector(31 downto 0);
2942
	signal or_509 : std_logic_vector(30 downto 0);
2943
	signal and_510 : std_logic_vector(30 downto 0);
2944
	signal or_550 : std_logic_vector(31 downto 0);
2945
	signal and_551 : std_logic_vector(31 downto 0);
2946
	signal or_581 : std_logic_vector(31 downto 0);
2947
	signal and_582 : std_logic_vector(31 downto 0);
2948
	signal or_583 : std_logic_vector(31 downto 0);
2949
	signal and_584 : std_logic_vector(31 downto 0);
2950
	signal or_587 : std_logic_vector(31 downto 0);
2951
	signal and_588 : std_logic_vector(31 downto 0);
2952
	signal and_161 : std_logic;
2953
	signal or_228 : std_logic_vector(31 downto 0);
2954
	signal and_229 : std_logic_vector(31 downto 0);
2955
	signal or_239 : std_logic_vector(31 downto 0);
2956
	signal and_240 : std_logic_vector(31 downto 0);
2957
	signal or_241 : std_logic_vector(31 downto 0);
2958
	signal and_242 : std_logic_vector(31 downto 0);
2959
	signal or_244 : std_logic_vector(31 downto 0);
2960
	signal and_245 : std_logic_vector(31 downto 0);
2961
	signal or_246 : std_logic_vector(31 downto 0);
2962
	signal and_247 : std_logic_vector(31 downto 0);
2963
	signal or_248 : std_logic_vector(31 downto 0);
2964
	signal and_249 : std_logic_vector(31 downto 0);
2965
	signal or_258 : std_logic_vector(31 downto 0);
2966
	signal and_259 : std_logic_vector(31 downto 0);
2967
	signal not_264 : std_logic;
2968
	signal or_266 : std_logic_vector(31 downto 0);
2969
	signal and_267 : std_logic_vector(31 downto 0);
2970
	signal or_272 : std_logic_vector(31 downto 0);
2971
	signal and_273 : std_logic_vector(31 downto 0);
2972
	signal or_280 : std_logic_vector(31 downto 0);
2973
	signal and_281 : std_logic_vector(31 downto 0);
2974
	signal or_287 : std_logic_vector(31 downto 0);
2975
	signal and_288 : std_logic_vector(31 downto 0);
2976
	signal or_293 : std_logic_vector(31 downto 0);
2977
	signal and_294 : std_logic_vector(31 downto 0);
2978
	signal or_301 : std_logic_vector(31 downto 0);
2979
	signal and_302 : std_logic_vector(31 downto 0);
2980
	signal or_304 : std_logic_vector(31 downto 0);
2981
	signal and_305 : std_logic_vector(31 downto 0);
2982
	signal or_306 : std_logic_vector(31 downto 0);
2983
	signal and_307 : std_logic_vector(31 downto 0);
2984
	signal or_308 : std_logic_vector(31 downto 0);
2985
	signal and_309 : std_logic_vector(31 downto 0);
2986
	signal or_312 : std_logic_vector(31 downto 0);
2987
	signal and_313 : std_logic_vector(31 downto 0);
2988
	signal or_318 : std_logic_vector(31 downto 0);
2989
	signal and_319 : std_logic_vector(31 downto 0);
2990
	signal or_329 : std_logic_vector(31 downto 0);
2991
	signal and_330 : std_logic_vector(31 downto 0);
2992
	signal or_335 : std_logic_vector(31 downto 0);
2993
	signal and_336 : std_logic_vector(31 downto 0);
2994
	signal or_339 : std_logic_vector(31 downto 0);
2995
	signal and_340 : std_logic_vector(31 downto 0);
2996
	signal or_342 : std_logic_vector(31 downto 0);
2997
	signal and_343 : std_logic_vector(31 downto 0);
2998
	signal or_346 : std_logic_vector(31 downto 0);
2999
	signal and_347 : std_logic_vector(31 downto 0);
3000
	signal or_348 : std_logic_vector(31 downto 0);
3001
	signal and_349 : std_logic_vector(31 downto 0);
3002
	signal or_351 : std_logic_vector(30 downto 0);
3003
	signal and_352 : std_logic_vector(30 downto 0);
3004
	signal or_355 : std_logic_vector(30 downto 0);
3005
	signal and_356 : std_logic_vector(30 downto 0);
3006
	signal or_360 : std_logic_vector(31 downto 0);
3007
	signal and_361 : std_logic_vector(31 downto 0);
3008
	signal or_371 : std_logic_vector(31 downto 0);
3009
	signal and_372 : std_logic_vector(31 downto 0);
3010
	signal or_378 : std_logic_vector(31 downto 0);
3011
	signal and_379 : std_logic_vector(31 downto 0);
3012
	signal or_380 : std_logic_vector(31 downto 0);
3013
	signal and_381 : std_logic_vector(31 downto 0);
3014
	signal or_384 : std_logic_vector(31 downto 0);
3015
	signal and_385 : std_logic_vector(31 downto 0);
3016
	signal or_386 : std_logic_vector(31 downto 0);
3017
	signal and_387 : std_logic_vector(31 downto 0);
3018
	signal or_388 : std_logic_vector(31 downto 0);
3019
	signal and_389 : std_logic_vector(31 downto 0);
3020
	signal or_394 : std_logic_vector(7 downto 0);
3021
	signal and_395 : std_logic_vector(7 downto 0);
3022
	signal and_397 : std_logic_vector(7 downto 0);
3023
	signal and_399 : std_logic_vector(7 downto 0);
3024
	signal and_401 : std_logic_vector(7 downto 0);
3025
	signal or_414 : std_logic_vector(30 downto 0);
3026
	signal or_423 : std_logic_vector(31 downto 0);
3027
	signal and_424 : std_logic_vector(31 downto 0);
3028
	signal or_425 : std_logic_vector(31 downto 0);
3029
	signal and_426 : std_logic_vector(31 downto 0);
3030
	signal or_427 : std_logic_vector(31 downto 0);
3031
	signal and_428 : std_logic_vector(31 downto 0);
3032
	signal or_431 : std_logic_vector(31 downto 0);
3033
	signal and_432 : std_logic_vector(31 downto 0);
3034
	signal or_433 : std_logic_vector(31 downto 0);
3035
	signal and_434 : std_logic_vector(31 downto 0);
3036
	signal or_438 : std_logic_vector(31 downto 0);
3037
	signal and_439 : std_logic_vector(31 downto 0);
3038
	signal or_440 : std_logic_vector(31 downto 0);
3039
	signal and_441 : std_logic_vector(31 downto 0);
3040
	signal or_443 : std_logic_vector(31 downto 0);
3041
	signal and_444 : std_logic_vector(31 downto 0);
3042
	signal or_450 : std_logic_vector(31 downto 0);
3043
	signal and_451 : std_logic_vector(31 downto 0);
3044
	signal or_454 : std_logic_vector(30 downto 0);
3045
	signal and_455 : std_logic_vector(30 downto 0);
3046
	signal or_458 : std_logic_vector(31 downto 0);
3047
	signal and_459 : std_logic_vector(31 downto 0);
3048
	signal or_462 : std_logic_vector(31 downto 0);
3049
	signal and_463 : std_logic_vector(31 downto 0);
3050
	signal or_467 : std_logic_vector(30 downto 0);
3051
	signal and_468 : std_logic_vector(30 downto 0);
3052
	signal or_475 : std_logic_vector(30 downto 0);
3053
	signal and_476 : std_logic_vector(30 downto 0);
3054
	signal or_479 : std_logic_vector(31 downto 0);
3055
	signal and_480 : std_logic_vector(31 downto 0);
3056
	signal or_481 : std_logic_vector(31 downto 0);
3057
	signal and_482 : std_logic_vector(31 downto 0);
3058
	signal or_485 : std_logic_vector(31 downto 0);
3059
	signal and_486 : std_logic_vector(31 downto 0);
3060
	signal or_490 : std_logic_vector(31 downto 0);
3061
	signal and_491 : std_logic_vector(31 downto 0);
3062
	signal or_493 : std_logic_vector(31 downto 0);
3063
	signal or_497 : std_logic_vector(31 downto 0);
3064
	signal or_512 : std_logic_vector(31 downto 0);
3065
	signal and_513 : std_logic_vector(31 downto 0);
3066
	signal or_518 : std_logic_vector(30 downto 0);
3067
	signal and_519 : std_logic_vector(30 downto 0);
3068
	signal or_525 : std_logic_vector(31 downto 0);
3069
	signal and_526 : std_logic_vector(31 downto 0);
3070
	signal or_529 : std_logic_vector(30 downto 0);
3071
	signal and_530 : std_logic_vector(30 downto 0);
3072
	signal or_532 : std_logic_vector(30 downto 0);
3073
	signal and_533 : std_logic_vector(30 downto 0);
3074
	signal or_535 : std_logic_vector(31 downto 0);
3075
	signal and_536 : std_logic_vector(31 downto 0);
3076
	signal or_538 : std_logic_vector(31 downto 0);
3077
	signal and_539 : std_logic_vector(31 downto 0);
3078
	signal or_541 : std_logic_vector(31 downto 0);
3079
	signal and_542 : std_logic_vector(31 downto 0);
3080
	signal or_545 : std_logic_vector(30 downto 0);
3081
	signal and_546 : std_logic_vector(30 downto 0);
3082
	signal or_548 : std_logic_vector(31 downto 0);
3083
	signal and_549 : std_logic_vector(31 downto 0);
3084
	signal or_554 : std_logic_vector(30 downto 0);
3085
	signal and_555 : std_logic_vector(30 downto 0);
3086
	signal or_557 : std_logic_vector(30 downto 0);
3087
	signal and_558 : std_logic_vector(30 downto 0);
3088
	signal or_568 : std_logic_vector(31 downto 0);
3089
	signal and_569 : std_logic_vector(31 downto 0);
3090
	signal or_571 : std_logic_vector(30 downto 0);
3091
	signal and_572 : std_logic_vector(30 downto 0);
3092
	signal or_575 : std_logic_vector(30 downto 0);
3093
	signal and_576 : std_logic_vector(30 downto 0);
3094
	signal or_590 : std_logic_vector(31 downto 0);
3095
	signal and_591 : std_logic_vector(31 downto 0);
3096
	signal or_597 : std_logic_vector(31 downto 0);
3097
	signal and_598 : std_logic_vector(31 downto 0);
3098
	signal or_603 : std_logic_vector(30 downto 0);
3099
	signal and_604 : std_logic_vector(30 downto 0);
3100

    
3101
	-- This utility function is used for to generate concatenations of std_logic
3102

    
3103
	-- Little utility function to ease concatenation of an std_logic
3104
	-- and explicitely return an std_logic_vector
3105
	function repeat(N: natural; B: std_logic) return std_logic_vector is
3106
		variable result: std_logic_vector(N-1 downto 0);
3107
	begin
3108
		result := (others => B);
3109
		return result;
3110
	end;
3111

    
3112
begin
3113

    
3114
	-- Instantiation of components
3115

    
3116
	output_split2_i : output_split2 port map (
3117
		wa0_data => mux_141,
3118
		wa0_addr => mux_142,
3119
		ra0_data => sig_1159,
3120
		ra0_addr => mux_143,
3121
		wa0_en => mux_144,
3122
		clk => sig_clock
3123
	);
3124

    
3125
	output_split3_i : output_split3 port map (
3126
		wa0_data => mux_137,
3127
		wa0_addr => mux_138,
3128
		ra0_data => sig_1158,
3129
		ra0_addr => mux_139,
3130
		wa0_en => mux_140,
3131
		clk => sig_clock
3132
	);
3133

    
3134
	sub_159_i : sub_159 port map (
3135
		gt => sig_1157,
3136
		result => sig_1156,
3137
		in_a => idct_2d_r,
3138
		in_b => "00000000000000000000000011111111",
3139
		sign => '1'
3140
	);
3141

    
3142
	add_165_i : add_165 port map (
3143
		result => sig_1155,
3144
		in_a => idct_2d_yc_reg7(31 downto 5),
3145
		in_b => "000000000000000000000000001"
3146
	);
3147

    
3148
	output_split1_i : output_split1 port map (
3149
		wa0_data => mux_89,
3150
		wa0_addr => mux_90,
3151
		ra0_data => sig_1154,
3152
		ra0_addr => mux_91,
3153
		wa0_en => mux_92,
3154
		clk => sig_clock
3155
	);
3156

    
3157
	output_split0_i : output_split0 port map (
3158
		wa0_data => mux_85,
3159
		wa0_addr => mux_86,
3160
		ra0_data => sig_1153,
3161
		ra0_addr => mux_87,
3162
		wa0_en => mux_88,
3163
		clk => sig_clock
3164
	);
3165

    
3166
	add_172_i : add_172 port map (
3167
		result => sig_1152,
3168
		in_a => sig_1183,
3169
		in_b => "00000000000000000001"
3170
	);
3171

    
3172
	add_176_i : add_176 port map (
3173
		result => sig_1151,
3174
		in_a => sig_1182,
3175
		in_b => "00000000000000000001"
3176
	);
3177

    
3178
	add_181_i : add_181 port map (
3179
		result => sig_1150,
3180
		in_a => idct_z2_reg0,
3181
		in_b => idct_z3_reg7
3182
	);
3183

    
3184
	sub_187_i : sub_187 port map (
3185
		result => sig_1149,
3186
		in_a => idct_z2_reg1,
3187
		in_b => idct_z3_reg6
3188
	);
3189

    
3190
	mul_189_i : mul_189 port map (
3191
		result => sig_1148,
3192
		in_a => idct_z2_reg4(30 downto 0),
3193
		in_b => "01000111000111"
3194
	);
3195

    
3196
	add_191_i : add_191 port map (
3197
		result => sig_1147,
3198
		in_a => sig_1148,
3199
		in_b => sig_1123(31 downto 1)
3200
	);
3201

    
3202
	mul_192_i : mul_192 port map (
3203
		result => sig_1146,
3204
		in_a => idct_z2_reg5(29 downto 0),
3205
		in_b => "01100011111"
3206
	);
3207

    
3208
	mul_193_i : mul_193 port map (
3209
		result => sig_1145,
3210
		in_a => idct_z2_reg6,
3211
		in_b => "011111011000101"
3212
	);
3213

    
3214
	mul_198_i : mul_198 port map (
3215
		result => sig_1144,
3216
		in_a => idct_z2_reg4,
3217
		in_b => "011010100110111"
3218
	);
3219

    
3220
	mul_199_i : mul_199 port map (
3221
		result => sig_1143,
3222
		in_a => idct_z2_reg7(30 downto 0),
3223
		in_b => "01000111000111"
3224
	);
3225

    
3226
	sub_209_i : sub_209 port map (
3227
		result => sig_1142,
3228
		in_a => idct_2d_yc_reg1,
3229
		in_b => idct_2d_yc_reg7
3230
	);
3231

    
3232
	add_212_i : add_212 port map (
3233
		result => sig_1141,
3234
		in_a => idct_z1_reg1,
3235
		in_b => idct_z1_reg2
3236
	);
3237

    
3238
	sub_213_i : sub_213 port map (
3239
		result => sig_1140,
3240
		in_a => idct_z1_reg1,
3241
		in_b => idct_z1_reg2
3242
	);
3243

    
3244
	sub_214_i : sub_214 port map (
3245
		result => sig_1139,
3246
		in_a => idct_z1_reg0,
3247
		in_b => idct_z1_reg3
3248
	);
3249

    
3250
	mul_215_i : mul_215 port map (
3251
		result => sig_1138,
3252
		in_a => idct_2d_yc_reg2,
3253
		in_b => "0101001110011111"
3254
	);
3255

    
3256
	mul_216_i : mul_216 port map (
3257
		result => sig_1137,
3258
		in_a => idct_2d_yc_reg6,
3259
		in_b => "010001010100011"
3260
	);
3261

    
3262
	sub_217_i : sub_217 port map (
3263
		result => sig_1136,
3264
		in_a => sig_1138,
3265
		in_b => sig_1137
3266
	);
3267

    
3268
	mul_218_i : mul_218 port map (
3269
		result => sig_1135,
3270
		in_a => idct_2d_yc_reg2,
3271
		in_b => "010001010100011"
3272
	);
3273

    
3274
	mul_219_i : mul_219 port map (
3275
		result => sig_1134,
3276
		in_a => idct_2d_yc_reg6,
3277
		in_b => "0101001110011111"
3278
	);
3279

    
3280
	sub_220_i : sub_220 port map (
3281
		result => sig_1133,
3282
		in_a => sig_1135,
3283
		in_b => sig_1134
3284
	);
3285

    
3286
	mul_223_i : mul_223 port map (
3287
		result => sig_1132,
3288
		in_a => idct_2d_yc_reg5(30 downto 0),
3289
		in_b => "010110101000001"
3290
	);
3291

    
3292
	sub_227_i : sub_227 port map (
3293
		result => sig_1131,
3294
		in_a => idct_2d_yc_reg0,
3295
		in_b => idct_2d_yc_reg4
3296
	);
3297

    
3298
	sub_157_i : sub_157 port map (
3299
		ge => sig_1130,
3300
		result => sig_1129,
3301
		in_a => idct_2d_r,
3302
		in_b => "00000000000000000000000000000000",
3303
		sign => '1'
3304
	);
3305

    
3306
	add_163_i : add_163 port map (
3307
		result => sig_1128,
3308
		in_a => psc_loop_reg_13,
3309
		in_b => "0000000000000001"
3310
	);
3311

    
3312
	cmp_164_i : cmp_164 port map (
3313
		ne => memextrct_loop_sig_21,
3314
		in0 => "0000000000011111",
3315
		in1 => psc_loop_reg_13
3316
	);
3317

    
3318
	add_170_i : add_170 port map (
3319
		result => sig_1127,
3320
		in_a => sig_1181,
3321
		in_b => "00000000000000000001"
3322
	);
3323

    
3324
	add_174_i : add_174 port map (
3325
		result => sig_1126,
3326
		in_a => sig_1180,
3327
		in_b => "00000000000000000001"
3328
	);
3329

    
3330
	add_180_i : add_180 port map (
3331
		result => sig_1125,
3332
		in_a => sig_1179,
3333
		in_b => "00000000000000000001"
3334
	);
3335

    
3336
	sub_186_i : sub_186 port map (
3337
		result => sig_1124,
3338
		in_a => idct_z2_reg2,
3339
		in_b => idct_z3_reg5
3340
	);
3341

    
3342
	mul_190_i : mul_190 port map (
3343
		result => sig_1123,
3344
		in_a => idct_z2_reg7,
3345
		in_b => "011010100110111"
3346
	);
3347

    
3348
	mul_196_i : mul_196 port map (
3349
		result => sig_1122,
3350
		in_a => idct_z2_reg6(29 downto 0),
3351
		in_b => "01100011111"
3352
	);
3353

    
3354
	sub_200_i : sub_200 port map (
3355
		result => sig_1121,
3356
		in_a => sig_1144,
3357
		in_b => sig_1178
3358
	);
3359

    
3360
	add_206_i : add_206 port map (
3361
		result => sig_1120,
3362
		in_a => idct_z1_reg4,
3363
		in_b => idct_z1_reg6
3364
	);
3365

    
3366
	add_210_i : add_210 port map (
3367
		result => sig_1119,
3368
		in_a => idct_2d_yc_reg1,
3369
		in_b => idct_2d_yc_reg7
3370
	);
3371

    
3372
	add_171_i : add_171 port map (
3373
		result => sig_1118,
3374
		in_a => idct_2d_yc_reg4(31 downto 5),
3375
		in_b => "000000000000000000000000001"
3376
	);
3377

    
3378
	add_177_i : add_177 port map (
3379
		result => sig_1117,
3380
		in_a => idct_2d_yc_reg1(31 downto 5),
3381
		in_b => "000000000000000000000000001"
3382
	);
3383

    
3384
	add_179_i : add_179 port map (
3385
		result => sig_1116,
3386
		in_a => idct_2d_yc_reg0(31 downto 5),
3387
		in_b => "000000000000000000000000001"
3388
	);
3389

    
3390
	mul_195_i : mul_195 port map (
3391
		result => sig_1115,
3392
		in_a => idct_z2_reg5,
3393
		in_b => "011111011000101"
3394
	);
3395

    
3396
	sub_197_i : sub_197 port map (
3397
		result => sig_1114,
3398
		in_a => sig_1115,
3399
		in_b => sig_1177
3400
	);
3401

    
3402
	sub_207_i : sub_207 port map (
3403
		result => sig_1113,
3404
		in_a => idct_z1_reg7,
3405
		in_b => idct_z1_reg5
3406
	);
3407

    
3408
	mul_230_i : mul_230 port map (
3409
		result => sig_1112,
3410
		in_a => idct_2d_yc_reg3(30 downto 0),
3411
		in_b => "010110101000001"
3412
	);
3413

    
3414
	sub_185_i : sub_185 port map (
3415
		result => sig_1111,
3416
		in_a => idct_z2_reg3,
3417
		in_b => idct_z3_reg4
3418
	);
3419

    
3420
	add_211_i : add_211 port map (
3421
		result => sig_1110,
3422
		in_a => idct_z1_reg0,
3423
		in_b => idct_z1_reg3
3424
	);
3425

    
3426
	add_226_i : add_226 port map (
3427
		result => sig_1109,
3428
		in_a => idct_2d_yc_reg0,
3429
		in_b => idct_2d_yc_reg4
3430
	);
3431

    
3432
	add_235_i : add_235 port map (
3433
		result => sig_1108,
3434
		in_a => idct_2d_yc_reg2(31 downto 5),
3435
		in_b => "000000000000000000000000001"
3436
	);
3437

    
3438
	add_314_i : add_314 port map (
3439
		result => sig_1107,
3440
		in_a => idct_2d_yc_reg2(31 downto 5),
3441
		in_b => "000000000000000000000000001"
3442
	);
3443

    
3444
	sub_160_i : sub_160 port map (
3445
		le => sig_1106,
3446
		result => sig_1105,
3447
		in_a => idct_2d_r,
3448
		in_b => "00000000000000000000000011111111",
3449
		sign => '1'
3450
	);
3451

    
3452
	add_173_i : add_173 port map (
3453
		result => sig_1104,
3454
		in_a => idct_2d_yc_reg3(31 downto 5),
3455
		in_b => "000000000000000000000000001"
3456
	);
3457

    
3458
	add_182_i : add_182 port map (
3459
		result => sig_1103,
3460
		in_a => idct_z2_reg1,
3461
		in_b => idct_z3_reg6
3462
	);
3463

    
3464
	sub_188_i : sub_188 port map (
3465
		result => sig_1102,
3466
		in_a => idct_z2_reg0,
3467
		in_b => idct_z3_reg7
3468
	);
3469

    
3470
	sub_243_i : sub_243 port map (
3471
		result => sig_1101,
3472
		in_a => sig_1115,
3473
		in_b => sig_1176
3474
	);
3475

    
3476
	sub_262_i : sub_262 port map (
3477
		result => sig_1100,
3478
		in_a => sig_1115,
3479
		in_b => sig_1175
3480
	);
3481

    
3482
	output_split4_i : output_split4 port map (
3483
		wa0_data => mux_65,
3484
		wa0_addr => mux_66,
3485
		ra0_data => sig_1099,
3486
		ra0_addr => mux_67,
3487
		wa0_en => mux_68,
3488
		clk => sig_clock
3489
	);
3490

    
3491
	output_split5_i : output_split5 port map (
3492
		wa0_data => mux_61,
3493
		wa0_addr => mux_62,
3494
		ra0_data => sig_1098,
3495
		ra0_addr => mux_63,
3496
		wa0_en => mux_64,
3497
		clk => sig_clock
3498
	);
3499

    
3500
	output_split6_i : output_split6 port map (
3501
		wa0_data => mux_57,
3502
		wa0_addr => mux_58,
3503
		ra0_data => sig_1097,
3504
		ra0_addr => mux_59,
3505
		wa0_en => mux_60,
3506
		clk => sig_clock
3507
	);
3508

    
3509
	output_split7_i : output_split7 port map (
3510
		wa0_data => mux_53,
3511
		wa0_addr => mux_54,
3512
		ra0_data => sig_1096,
3513
		ra0_addr => mux_55,
3514
		wa0_en => mux_56,
3515
		clk => sig_clock
3516
	);
3517

    
3518
	input_split0_i : input_split0 port map (
3519
		ra0_data => sig_1095,
3520
		ra0_addr => mux_46,
3521
		ra1_data => sig_1094,
3522
		ra1_addr => mux_47,
3523
		ra2_data => sig_1093,
3524
		ra2_addr => mux_48,
3525
		ra3_data => sig_1092,
3526
		ra3_addr => mux_49,
3527
		clk => sig_clock,
3528
		wa2_data => mux_50,
3529
		wa2_addr => mux_51,
3530
		wa2_en => mux_52
3531
	);
3532

    
3533
	add_194_i : add_194 port map (
3534
		result => sig_1091,
3535
		in_a => sig_1146,
3536
		in_b => sig_1145(31 downto 2)
3537
	);
3538

    
3539
	add_205_i : add_205 port map (
3540
		result => sig_1090,
3541
		in_a => idct_z1_reg7,
3542
		in_b => idct_z1_reg5
3543
	);
3544

    
3545
	add_254_i : add_254 port map (
3546
		result => sig_1089,
3547
		in_a => idct_2d_yc_reg2(31 downto 5),
3548
		in_b => "000000000000000000000000001"
3549
	);
3550

    
3551
	add_276_i : add_276 port map (
3552
		result => sig_1088,
3553
		in_a => idct_2d_yc_reg2(31 downto 5),
3554
		in_b => "000000000000000000000000001"
3555
	);
3556

    
3557
	sub_284_i : sub_284 port map (
3558
		result => sig_1087,
3559
		in_a => sig_1115,
3560
		in_b => sig_1174
3561
	);
3562

    
3563
	input_split1_i : input_split1 port map (
3564
		wa0_data => mux_39,
3565
		wa0_addr => mux_40,
3566
		ra0_data => sig_1086,
3567
		ra0_addr => mux_41,
3568
		wa0_en => mux_42,
3569
		ra1_data => sig_1085,
3570
		ra1_addr => mux_43,
3571
		ra2_data => sig_1084,
3572
		ra2_addr => mux_44,
3573
		ra3_data => sig_1083,
3574
		ra3_addr => mux_45,
3575
		clk => sig_clock
3576
	);
3577

    
3578
	add_166_i : add_166 port map (
3579
		result => sig_1082,
3580
		in_a => sig_1173,
3581
		in_b => "00000000000000000001"
3582
	);
3583

    
3584
	add_168_i : add_168 port map (
3585
		result => sig_1081,
3586
		in_a => sig_1172,
3587
		in_b => "00000000000000000001"
3588
	);
3589

    
3590
	add_178_i : add_178 port map (
3591
		result => sig_1080,
3592
		in_a => sig_1171,
3593
		in_b => "00000000000000000001"
3594
	);
3595

    
3596
	add_183_i : add_183 port map (
3597
		result => sig_1079,
3598
		in_a => idct_z2_reg2,
3599
		in_b => idct_z3_reg5
3600
	);
3601

    
3602
	sub_332_i : sub_332 port map (
3603
		result => sig_1078,
3604
		in_a => sig_689,
3605
		in_b => sig_688
3606
	);
3607

    
3608
	mul_341_i : mul_341 port map (
3609
		result => sig_1077,
3610
		in_a => or_339,
3611
		in_b => "0101001110011111"
3612
	);
3613

    
3614
	mul_357_i : mul_357 port map (
3615
		result => sig_1076,
3616
		in_a => or_355,
3617
		in_b => "010110101000001"
3618
	);
3619

    
3620
	mul_365_i : mul_365 port map (
3621
		result => sig_1075,
3622
		in_a => or_363,
3623
		in_b => "010001010100011"
3624
	);
3625

    
3626
	mul_368_i : mul_368 port map (
3627
		result => sig_1074,
3628
		in_a => or_366,
3629
		in_b => "0101001110011111"
3630
	);
3631

    
3632
	sub_369_i : sub_369 port map (
3633
		result => sig_1073,
3634
		in_a => sig_1075,
3635
		in_b => sig_1074
3636
	);
3637

    
3638
	sub_370_i : sub_370 port map (
3639
		result => sig_1072,
3640
		in_a => sig_1115,
3641
		in_b => sig_1170
3642
	);
3643

    
3644
	sub_377_i : sub_377 port map (
3645
		result => sig_1071,
3646
		in_a => sig_680,
3647
		in_b => sig_715
3648
	);
3649

    
3650
	cmp_398_i : cmp_398 port map (
3651
		eq => sig_1070,
3652
		in0 => "110",
3653
		in1 => augh_main_k(2 downto 0)
3654
	);
3655

    
3656
	cmp_400_i : cmp_400 port map (
3657
		eq => sig_1069,
3658
		in0 => "101",
3659
		in1 => augh_main_k(2 downto 0)
3660
	);
3661

    
3662
	cmp_404_i : cmp_404 port map (
3663
		eq => sig_1068,
3664
		in0 => "011",
3665
		in1 => augh_main_k(2 downto 0)
3666
	);
3667

    
3668
	cmp_406_i : cmp_406 port map (
3669
		eq => sig_1067,
3670
		in0 => "010",
3671
		in1 => augh_main_k(2 downto 0)
3672
	);
3673

    
3674
	cmp_408_i : cmp_408 port map (
3675
		eq => sig_1066,
3676
		in0 => "001",
3677
		in1 => augh_main_k(2 downto 0)
3678
	);
3679

    
3680
	cmp_410_i : cmp_410 port map (
3681
		eq => sig_1065,
3682
		in0 => "000",
3683
		in1 => augh_main_k(2 downto 0)
3684
	);
3685

    
3686
	cmp_412_i : cmp_412 port map (
3687
		eq => sig_1064,
3688
		in0 => '0',
3689
		in1 => augh_main_k(0)
3690
	);
3691

    
3692
	sub_429_i : sub_429 port map (
3693
		result => sig_1063,
3694
		in_a => or_421,
3695
		in_b => or_427
3696
	);
3697

    
3698
	add_466_i : add_466 port map (
3699
		result => sig_1062,
3700
		in_a => or_462,
3701
		in_b => or_464
3702
	);
3703

    
3704
	sub_496_i : sub_496 port map (
3705
		result => sig_1061,
3706
		in_a => sig_652,
3707
		in_b => sig_651
3708
	);
3709

    
3710
	sub_521_i : sub_521 port map (
3711
		result => sig_1060,
3712
		in_a => or_438,
3713
		in_b => or_464
3714
	);
3715

    
3716
	sub_528_i : sub_528 port map (
3717
		result => sig_1059,
3718
		in_a => sig_643,
3719
		in_b => sig_642
3720
	);
3721

    
3722
	fsm_23_i : fsm_23 port map (
3723
		clock => sig_clock,
3724
		reset => sig_reset,
3725
		in0 => memextrct_loop_sig_21,
3726
		out181 => sig_1058,
3727
		out182 => sig_1057,
3728
		out183 => sig_1056,
3729
		out184 => sig_1055,
3730
		out185 => sig_1054,
3731
		out8 => sig_1053,
3732
		out13 => sig_1052,
3733
		out14 => sig_1051,
3734
		out16 => sig_1050,
3735
		out18 => sig_1049,
3736
		out19 => sig_1048,
3737
		out20 => sig_1047,
3738
		out21 => sig_1046,
3739
		out22 => sig_1045,
3740
		in2 => sig_start,
3741
		out23 => sig_1044,
3742
		out24 => sig_1043,
3743
		out25 => sig_1042,
3744
		out26 => sig_1041,
3745
		out27 => sig_1040,
3746
		out28 => sig_1039,
3747
		out29 => sig_1038,
3748
		out30 => sig_1037,
3749
		out31 => sig_1036,
3750
		out33 => sig_1035,
3751
		out35 => sig_1034,
3752
		out36 => sig_1033,
3753
		out38 => sig_1032,
3754
		out40 => sig_1031,
3755
		out42 => sig_1030,
3756
		in3 => memextrct_loop_sig_22,
3757
		out44 => sig_1029,
3758
		out46 => sig_1028,
3759
		out48 => sig_1027,
3760
		out49 => sig_1026,
3761
		out50 => sig_1025,
3762
		out52 => sig_1024,
3763
		out54 => sig_1023,
3764
		out56 => sig_1022,
3765
		out57 => sig_1021,
3766
		out58 => sig_1020,
3767
		in4 => test_cp_0_16,
3768
		out60 => sig_1019,
3769
		in5 => test_cp_1_17,
3770
		out164 => sig_1018,
3771
		out165 => sig_1017,
3772
		out167 => sig_1016,
3773
		out168 => sig_1015,
3774
		out170 => sig_1014,
3775
		out171 => sig_1013,
3776
		out173 => sig_1012,
3777
		out174 => sig_1011,
3778
		out176 => sig_1010,
3779
		out178 => sig_1009,
3780
		out0 => sig_1008,
3781
		out1 => sig_1007,
3782
		out2 => sig_1006,
3783
		in1 => cp_rest,
3784
		out4 => sig_1005,
3785
		out90 => sig_1004,
3786
		out91 => sig_1003,
3787
		out97 => sig_1002,
3788
		out99 => sig_1001,
3789
		out101 => sig_1000,
3790
		in6 => stdout_ack,
3791
		out103 => sig_999,
3792
		out105 => sig_998,
3793
		out106 => sig_997,
3794
		out107 => sig_996,
3795
		out108 => sig_995,
3796
		out135 => sig_994,
3797
		out136 => sig_993,
3798
		out137 => sig_992,
3799
		out138 => sig_991,
3800
		in11 => augh_test_9,
3801
		out140 => sig_990,
3802
		out141 => sig_989,
3803
		out142 => sig_988,
3804
		out143 => sig_987,
3805
		out145 => sig_986,
3806
		out146 => sig_985,
3807
		out148 => sig_984,
3808
		out150 => sig_983,
3809
		out153 => sig_982,
3810
		out154 => sig_981,
3811
		out155 => sig_980,
3812
		out156 => sig_979,
3813
		out157 => sig_978,
3814
		out158 => sig_977,
3815
		out159 => sig_976,
3816
		out160 => sig_975,
3817
		out161 => sig_974,
3818
		out162 => sig_973,
3819
		out111 => sig_972,
3820
		out112 => sig_971,
3821
		out114 => sig_970,
3822
		out116 => sig_969,
3823
		out118 => sig_968,
3824
		out120 => sig_967,
3825
		out121 => sig_966,
3826
		out122 => sig_965,
3827
		out123 => sig_964,
3828
		out124 => sig_963,
3829
		out125 => sig_962,
3830
		out126 => sig_961,
3831
		in7 => cp_en,
3832
		out129 => sig_960,
3833
		out130 => sig_959,
3834
		in8 => stdin_ack,
3835
		out131 => sig_958,
3836
		in9 => psc_loop_sig_20,
3837
		out132 => sig_957,
3838
		out133 => sig_956,
3839
		out134 => sig_955,
3840
		in10 => augh_test_11,
3841
		out186 => sig_954,
3842
		out187 => sig_953,
3843
		out190 => sig_952,
3844
		out195 => sig_951,
3845
		out197 => sig_950,
3846
		out198 => sig_949,
3847
		out199 => sig_948,
3848
		out200 => sig_947,
3849
		out201 => sig_946,
3850
		out203 => sig_945,
3851
		out204 => sig_944,
3852
		out206 => sig_943,
3853
		out207 => sig_942,
3854
		out209 => sig_941,
3855
		out210 => sig_940,
3856
		out212 => sig_939,
3857
		out213 => sig_938,
3858
		out215 => sig_937,
3859
		out217 => sig_936,
3860
		out220 => sig_935,
3861
		out221 => sig_934,
3862
		out222 => sig_933,
3863
		out223 => sig_932,
3864
		out224 => sig_931,
3865
		out225 => sig_930,
3866
		out226 => sig_929,
3867
		out227 => sig_928,
3868
		out228 => sig_927,
3869
		out229 => sig_926,
3870
		out231 => sig_925,
3871
		out232 => sig_924,
3872
		out234 => sig_923,
3873
		out235 => sig_922,
3874
		out237 => sig_921,
3875
		out238 => sig_920,
3876
		out240 => sig_919,
3877
		out241 => sig_918,
3878
		out243 => sig_917,
3879
		out245 => sig_916,
3880
		out248 => sig_915,
3881
		out249 => sig_914,
3882
		out250 => sig_913,
3883
		out251 => sig_912,
3884
		out252 => sig_911,
3885
		out253 => sig_910,
3886
		out254 => sig_909,
3887
		out255 => sig_908,
3888
		out256 => sig_907,
3889
		out257 => sig_906,
3890
		out259 => sig_905,
3891
		out260 => sig_904,
3892
		out262 => sig_903,
3893
		out263 => sig_902,
3894
		out265 => sig_901,
3895
		out266 => sig_900,
3896
		out268 => sig_899,
3897
		out269 => sig_898,
3898
		out271 => sig_897,
3899
		out273 => sig_896,
3900
		out276 => sig_895,
3901
		out277 => sig_894,
3902
		out278 => sig_893,
3903
		out279 => sig_892,
3904
		out280 => sig_891,
3905
		out281 => sig_890,
3906
		out282 => sig_889,
3907
		out283 => sig_888,
3908
		out284 => sig_887,
3909
		out285 => sig_886,
3910
		out286 => sig_885,
3911
		out287 => sig_884,
3912
		out288 => sig_883,
3913
		out289 => sig_882,
3914
		out290 => sig_881,
3915
		out291 => sig_880,
3916
		out292 => sig_879,
3917
		out293 => sig_878,
3918
		out294 => sig_877,
3919
		out295 => sig_876,
3920
		out296 => sig_875,
3921
		out297 => sig_874,
3922
		out298 => sig_873,
3923
		out311 => sig_872,
3924
		out312 => sig_871,
3925
		out313 => sig_870,
3926
		out314 => sig_869,
3927
		out315 => sig_868,
3928
		out316 => sig_867,
3929
		out318 => sig_866,
3930
		out321 => sig_865,
3931
		out322 => sig_864,
3932
		out323 => sig_863,
3933
		out324 => sig_862,
3934
		out325 => sig_861,
3935
		out326 => sig_860,
3936
		out327 => sig_859,
3937
		out328 => sig_858,
3938
		out329 => sig_857,
3939
		out333 => sig_856,
3940
		out341 => sig_855,
3941
		out342 => sig_854,
3942
		out343 => sig_853,
3943
		out344 => sig_852,
3944
		out345 => sig_851,
3945
		out346 => sig_850,
3946
		out349 => sig_849,
3947
		out350 => sig_848,
3948
		out351 => sig_847,
3949
		out352 => sig_846,
3950
		out353 => sig_845,
3951
		out354 => sig_844,
3952
		out355 => sig_843,
3953
		out357 => sig_842,
3954
		out361 => sig_841,
3955
		out362 => sig_840,
3956
		out363 => sig_839,
3957
		out364 => sig_838,
3958
		out366 => sig_837,
3959
		out367 => sig_836,
3960
		out371 => sig_835,
3961
		out372 => sig_834,
3962
		out373 => sig_833,
3963
		out382 => sig_832,
3964
		out383 => sig_831,
3965
		out385 => sig_830,
3966
		out393 => sig_829,
3967
		out394 => sig_828,
3968
		out395 => sig_827,
3969
		out396 => sig_826,
3970
		out398 => sig_825,
3971
		out400 => sig_824,
3972
		out401 => sig_823,
3973
		out402 => sig_822,
3974
		out404 => sig_821,
3975
		out406 => sig_820,
3976
		out407 => sig_819,
3977
		out408 => sig_818,
3978
		out409 => sig_817,
3979
		out410 => sig_816,
3980
		out411 => sig_815,
3981
		out412 => sig_814,
3982
		out413 => sig_813,
3983
		out414 => sig_812,
3984
		out416 => sig_811,
3985
		out417 => sig_810,
3986
		out418 => sig_809,
3987
		out419 => sig_808,
3988
		out422 => sig_807,
3989
		out423 => sig_806,
3990
		out425 => sig_805,
3991
		out426 => sig_804,
3992
		out428 => sig_803,
3993
		out429 => sig_802,
3994
		out430 => sig_801,
3995
		out431 => sig_800,
3996
		out433 => sig_799,
3997
		out434 => sig_798,
3998
		out435 => sig_797,
3999
		out436 => sig_796,
4000
		out437 => sig_795,
4001
		out438 => sig_794,
4002
		out440 => sig_793,
4003
		out441 => sig_792,
4004
		out443 => sig_791,
4005
		out444 => sig_790,
4006
		out445 => sig_789,
4007
		out446 => sig_788,
4008
		out447 => sig_787,
4009
		out450 => sig_786,
4010
		out451 => sig_785,
4011
		out454 => sig_784,
4012
		out455 => sig_783,
4013
		out457 => sig_782,
4014
		out458 => sig_781,
4015
		out459 => sig_780,
4016
		out460 => sig_779,
4017
		out461 => sig_778,
4018
		out462 => sig_777,
4019
		out463 => sig_776,
4020
		out464 => sig_775,
4021
		out465 => sig_774,
4022
		out466 => sig_773,
4023
		out467 => sig_772,
4024
		out468 => sig_771,
4025
		out469 => sig_770,
4026
		out472 => sig_769,
4027
		out475 => sig_768,
4028
		out481 => sig_767,
4029
		out482 => sig_766,
4030
		out483 => sig_765,
4031
		out484 => sig_764,
4032
		out487 => sig_763,
4033
		out488 => sig_762,
4034
		out491 => sig_761,
4035
		out495 => sig_760,
4036
		out496 => sig_759,
4037
		out497 => sig_758,
4038
		out498 => sig_757,
4039
		out499 => sig_756,
4040
		out500 => sig_755,
4041
		out501 => sig_754,
4042
		out512 => sig_753,
4043
		out513 => sig_752,
4044
		out517 => sig_751,
4045
		out518 => sig_750,
4046
		out519 => sig_749,
4047
		out521 => sig_748,
4048
		out522 => sig_747,
4049
		out524 => sig_746,
4050
		out525 => sig_745,
4051
		out526 => sig_744,
4052
		out527 => sig_743,
4053
		out528 => sig_742,
4054
		out531 => sig_741,
4055
		out540 => sig_740,
4056
		out542 => sig_739,
4057
		out544 => sig_738,
4058
		out545 => sig_737,
4059
		out554 => sig_736,
4060
		out555 => sig_735,
4061
		out559 => sig_734,
4062
		out560 => sig_733,
4063
		out561 => sig_732,
4064
		out562 => sig_731,
4065
		out563 => sig_730,
4066
		out566 => sig_729,
4067
		out567 => sig_728,
4068
		out570 => sig_727,
4069
		out572 => sig_726,
4070
		out575 => sig_725,
4071
		out577 => sig_724,
4072
		out578 => sig_723,
4073
		out580 => sig_722,
4074
		out581 => sig_721
4075
	);
4076

    
4077
	add_167_i : add_167 port map (
4078
		result => sig_720,
4079
		in_a => idct_2d_yc_reg6(31 downto 5),
4080
		in_b => "000000000000000000000000001"
4081
	);
4082

    
4083
	add_169_i : add_169 port map (
4084
		result => sig_719,
4085
		in_a => idct_2d_yc_reg5(31 downto 5),
4086
		in_b => "000000000000000000000000001"
4087
	);
4088

    
4089
	add_175_i : add_175 port map (
4090
		result => sig_718,
4091
		in_a => idct_2d_yc_reg2(31 downto 5),
4092
		in_b => "000000000000000000000000001"
4093
	);
4094

    
4095
	add_255_i : add_255 port map (
4096
		result => sig_717,
4097
		in_a => sig_1169,
4098
		in_b => "00000000000000000001"
4099
	);
4100

    
4101
	sub_362_i : sub_362 port map (
4102
		result => sig_716,
4103
		in_a => or_358,
4104
		in_b => or_360
4105
	);
4106

    
4107
	mul_376_i : mul_376 port map (
4108
		result => sig_715,
4109
		in_a => or_374,
4110
		in_b => "010001010100011"
4111
	);
4112

    
4113
	add_420_i : add_420 port map (
4114
		result => sig_714,
4115
		in_a => sig_1168,
4116
		in_b => "00000000000000000001"
4117
	);
4118

    
4119
	sub_446_i : sub_446 port map (
4120
		result => sig_713,
4121
		in_a => sig_667,
4122
		in_b => sig_666
4123
	);
4124

    
4125
	mul_456_i : mul_456 port map (
4126
		result => sig_712,
4127
		in_a => or_454,
4128
		in_b => "010110101000001"
4129
	);
4130

    
4131
	mul_457_i : mul_457 port map (
4132
		result => sig_711,
4133
		in_a => or_450,
4134
		in_b => "0101001110011111"
4135
	);
4136

    
4137
	sub_461_i : sub_461 port map (
4138
		result => sig_710,
4139
		in_a => sig_711,
4140
		in_b => sig_662
4141
	);
4142

    
4143
	sub_517_i : sub_517 port map (
4144
		result => sig_709,
4145
		in_a => or_512,
4146
		in_b => or_514
4147
	);
4148

    
4149
	mul_560_i : mul_560 port map (
4150
		result => sig_708,
4151
		in_a => or_435,
4152
		in_b => "010001010100011"
4153
	);
4154

    
4155
	mul_565_i : mul_565 port map (
4156
		result => sig_707,
4157
		in_a => or_363,
4158
		in_b => "0101001110011111"
4159
	);
4160

    
4161
	mul_578_i : mul_578 port map (
4162
		result => sig_706,
4163
		in_a => or_431,
4164
		in_b => "010001010100011"
4165
	);
4166

    
4167
	muxb_162_i : muxb_162 port map (
4168
		in_sel => cp_en,
4169
		out_data => sig_705,
4170
		in_data0 => '0',
4171
		in_data1 => '1'
4172
	);
4173

    
4174
	add_184_i : add_184 port map (
4175
		result => sig_704,
4176
		in_a => idct_z2_reg3,
4177
		in_b => idct_z3_reg4
4178
	);
4179

    
4180
	muxb_201_i : muxb_201 port map (
4181
		in_sel => cp_en,
4182
		out_data => sig_703,
4183
		in_data0 => '0',
4184
		in_data1 => '1'
4185
	);
4186

    
4187
	cmp_202_i : cmp_202 port map (
4188
		ne => memextrct_loop_sig_22,
4189
		in0 => "0000000000000111",
4190
		in1 => psc_loop_reg_13
4191
	);
4192

    
4193
	cmp_203_i : cmp_203 port map (
4194
		eq => test_cp_1_17,
4195
		in0 => '1',
4196
		in1 => cp_id_reg_stable_15
4197
	);
4198

    
4199
	cmp_204_i : cmp_204 port map (
4200
		eq => sig_702,
4201
		in0 => '0',
4202
		in1 => cp_id_reg_stable_15
4203
	);
4204

    
4205
	sub_208_i : sub_208 port map (
4206
		result => sig_701,
4207
		in_a => idct_z1_reg4,
4208
		in_b => idct_z1_reg6
4209
	);
4210

    
4211
	add_236_i : add_236 port map (
4212
		result => sig_700,
4213
		in_a => sig_1167,
4214
		in_b => "00000000000000000001"
4215
	);
4216

    
4217
	muxb_263_i : muxb_263 port map (
4218
		in_sel => not_264,
4219
		out_data => sig_699,
4220
		in_data0 => '0',
4221
		in_data1 => '1'
4222
	);
4223

    
4224
	muxb_265_i : muxb_265 port map (
4225
		in_sel => not_264,
4226
		out_data => sig_698,
4227
		in_data0 => '0',
4228
		in_data1 => '1'
4229
	);
4230

    
4231
	add_277_i : add_277 port map (
4232
		result => sig_697,
4233
		in_a => sig_1166,
4234
		in_b => "00000000000000000001"
4235
	);
4236

    
4237
	add_295_i : add_295 port map (
4238
		result => sig_696,
4239
		in_a => idct_2d_yc_reg2(31 downto 5),
4240
		in_b => "000000000000000000000000001"
4241
	);
4242

    
4243
	add_296_i : add_296 port map (
4244
		result => sig_695,
4245
		in_a => sig_1165,
4246
		in_b => "00000000000000000001"
4247
	);
4248

    
4249
	sub_303_i : sub_303 port map (
4250
		result => sig_694,
4251
		in_a => sig_1115,
4252
		in_b => sig_1164
4253
	);
4254

    
4255
	add_315_i : add_315 port map (
4256
		result => sig_693,
4257
		in_a => sig_1163,
4258
		in_b => "00000000000000000001"
4259
	);
4260

    
4261
	muxb_322_i : muxb_322 port map (
4262
		in_sel => cp_en,
4263
		out_data => sig_692,
4264
		in_data0 => '0',
4265
		in_data1 => '1'
4266
	);
4267

    
4268
	add_323_i : add_323 port map (
4269
		result => sig_691,
4270
		in_a => psc_loop_reg_13,
4271
		in_b => "0000000000000001"
4272
	);
4273

    
4274
	cmp_324_i : cmp_324 port map (
4275
		ne => psc_loop_sig_20,
4276
		in0 => "0000000000000001",
4277
		in1 => psc_loop_reg_13
4278
	);
4279

    
4280
	cmp_325_i : cmp_325 port map (
4281
		eq => sig_690,
4282
		in0 => '0',
4283
		in1 => cp_id_reg_stable_15
4284
	);
4285

    
4286
	mul_328_i : mul_328 port map (
4287
		result => sig_689,
4288
		in_a => or_326,
4289
		in_b => "010001010100011"
4290
	);
4291

    
4292
	mul_331_i : mul_331 port map (
4293
		result => sig_688,
4294
		in_a => or_329,
4295
		in_b => "0101001110011111"
4296
	);
4297

    
4298
	sub_337_i : sub_337 port map (
4299
		result => sig_687,
4300
		in_a => or_333,
4301
		in_b => or_335
4302
	);
4303

    
4304
	add_338_i : add_338 port map (
4305
		result => sig_686,
4306
		in_a => or_333,
4307
		in_b => or_297
4308
	);
4309

    
4310
	mul_344_i : mul_344 port map (
4311
		result => sig_685,
4312
		in_a => or_342,
4313
		in_b => "010001010100011"
4314
	);
4315

    
4316
	sub_345_i : sub_345 port map (
4317
		result => sig_684,
4318
		in_a => sig_1077,
4319
		in_b => sig_685
4320
	);
4321

    
4322
	add_350_i : add_350 port map (
4323
		result => sig_683,
4324
		in_a => or_346,
4325
		in_b => or_348
4326
	);
4327

    
4328
	mul_353_i : mul_353 port map (
4329
		result => sig_682,
4330
		in_a => or_351,
4331
		in_b => "010110101000001"
4332
	);
4333

    
4334
	sub_354_i : sub_354 port map (
4335
		result => sig_681,
4336
		in_a => or_346,
4337
		in_b => or_348
4338
	);
4339

    
4340
	mul_373_i : mul_373 port map (
4341
		result => sig_680,
4342
		in_a => or_371,
4343
		in_b => "0101001110011111"
4344
	);
4345

    
4346
	add_382_i : add_382 port map (
4347
		result => sig_679,
4348
		in_a => or_378,
4349
		in_b => or_380
4350
	);
4351

    
4352
	mul_383_i : mul_383 port map (
4353
		result => sig_678,
4354
		in_a => idct_2d_yc_reg3(30 downto 0),
4355
		in_b => "010110101000001"
4356
	);
4357

    
4358
	add_390_i : add_390 port map (
4359
		result => sig_677,
4360
		in_a => or_386,
4361
		in_b => or_388
4362
	);
4363

    
4364
	sub_391_i : sub_391 port map (
4365
		result => sig_676,
4366
		in_a => or_386,
4367
		in_b => or_388
4368
	);
4369

    
4370
	cmp_392_i : cmp_392 port map (
4371
		ne => augh_test_11,
4372
		in0 => "00000000000000000000000000111111",
4373
		in1 => augh_main_k
4374
	);
4375

    
4376
	add_393_i : add_393 port map (
4377
		result => sig_675,
4378
		in_a => augh_main_k,
4379
		in_b => "00000000000000000000000000000001"
4380
	);
4381

    
4382
	cmp_396_i : cmp_396 port map (
4383
		eq => sig_674,
4384
		in0 => "111",
4385
		in1 => augh_main_k(2 downto 0)
4386
	);
4387

    
4388
	cmp_402_i : cmp_402 port map (
4389
		eq => sig_673,
4390
		in0 => "100",
4391
		in1 => augh_main_k(2 downto 0)
4392
	);
4393

    
4394
	cmp_411_i : cmp_411 port map (
4395
		eq => sig_672,
4396
		in0 => '1',
4397
		in1 => augh_main_k(0)
4398
	);
4399

    
4400
	cmp_413_i : cmp_413 port map (
4401
		ne => augh_test_9,
4402
		in0 => "00000000000000000000000000111111",
4403
		in1 => augh_main_k
4404
	);
4405

    
4406
	mul_416_i : mul_416 port map (
4407
		result => sig_671,
4408
		in_a => or_414,
4409
		in_b => "010110101000001"
4410
	);
4411

    
4412
	add_419_i : add_419 port map (
4413
		result => sig_670,
4414
		in_a => idct_2d_yc_reg2(31 downto 5),
4415
		in_b => "000000000000000000000000001"
4416
	);
4417

    
4418
	add_430_i : add_430 port map (
4419
		result => sig_669,
4420
		in_a => or_421,
4421
		in_b => or_427
4422
	);
4423

    
4424
	sub_437_i : sub_437 port map (
4425
		result => sig_668,
4426
		in_a => sig_1115,
4427
		in_b => sig_1162
4428
	);
4429

    
4430
	mul_442_i : mul_442 port map (
4431
		result => sig_667,
4432
		in_a => or_440,
4433
		in_b => "0101001110011111"
4434
	);
4435

    
4436
	mul_445_i : mul_445 port map (
4437
		result => sig_666,
4438
		in_a => or_443,
4439
		in_b => "010001010100011"
4440
	);
4441

    
4442
	mul_447_i : mul_447 port map (
4443
		result => sig_665,
4444
		in_a => or_440,
4445
		in_b => "010001010100011"
4446
	);
4447

    
4448
	mul_448_i : mul_448 port map (
4449
		result => sig_664,
4450
		in_a => or_443,
4451
		in_b => "0101001110011111"
4452
	);
4453

    
4454
	sub_449_i : sub_449 port map (
4455
		result => sig_663,
4456
		in_a => sig_665,
4457
		in_b => sig_664
4458
	);
4459

    
4460
	mul_460_i : mul_460 port map (
4461
		result => sig_662,
4462
		in_a => or_458,
4463
		in_b => "010001010100011"
4464
	);
4465

    
4466
	mul_469_i : mul_469 port map (
4467
		result => sig_661,
4468
		in_a => or_467,
4469
		in_b => "010110101000001"
4470
	);
4471

    
4472
	add_474_i : add_474 port map (
4473
		result => sig_660,
4474
		in_a => or_470,
4475
		in_b => or_472
4476
	);
4477

    
4478
	mul_477_i : mul_477 port map (
4479
		result => sig_659,
4480
		in_a => or_475,
4481
		in_b => "010110101000001"
4482
	);
4483

    
4484
	sub_478_i : sub_478 port map (
4485
		result => sig_658,
4486
		in_a => or_470,
4487
		in_b => or_472
4488
	);
4489

    
4490
	add_483_i : add_483 port map (
4491
		result => sig_657,
4492
		in_a => or_479,
4493
		in_b => or_481
4494
	);
4495

    
4496
	sub_484_i : sub_484 port map (
4497
		result => sig_656,
4498
		in_a => or_479,
4499
		in_b => or_481
4500
	);
4501

    
4502
	add_487_i : add_487 port map (
4503
		result => sig_655,
4504
		in_a => or_425,
4505
		in_b => or_485
4506
	);
4507

    
4508
	sub_488_i : sub_488 port map (
4509
		result => sig_654,
4510
		in_a => or_425,
4511
		in_b => or_485
4512
	);
4513

    
4514
	sub_489_i : sub_489 port map (
4515
		result => sig_653,
4516
		in_a => or_378,
4517
		in_b => or_285
4518
	);
4519

    
4520
	mul_492_i : mul_492 port map (
4521
		result => sig_652,
4522
		in_a => or_490,
4523
		in_b => "010001010100011"
4524
	);
4525

    
4526
	mul_495_i : mul_495 port map (
4527
		result => sig_651,
4528
		in_a => or_493,
4529
		in_b => "0101001110011111"
4530
	);
4531

    
4532
	mul_499_i : mul_499 port map (
4533
		result => sig_650,
4534
		in_a => or_435,
4535
		in_b => "0101001110011111"
4536
	);
4537

    
4538
	mul_502_i : mul_502 port map (
4539
		result => sig_649,
4540
		in_a => or_500,
4541
		in_b => "010001010100011"
4542
	);
4543

    
4544
	sub_503_i : sub_503 port map (
4545
		result => sig_648,
4546
		in_a => sig_650,
4547
		in_b => sig_649
4548
	);
4549

    
4550
	add_508_i : add_508 port map (
4551
		result => sig_647,
4552
		in_a => or_504,
4553
		in_b => or_506
4554
	);
4555

    
4556
	mul_511_i : mul_511 port map (
4557
		result => sig_646,
4558
		in_a => or_509,
4559
		in_b => "010110101000001"
4560
	);
4561

    
4562
	add_516_i : add_516 port map (
4563
		result => sig_645,
4564
		in_a => or_512,
4565
		in_b => or_514
4566
	);
4567

    
4568
	mul_520_i : mul_520 port map (
4569
		result => sig_644,
4570
		in_a => or_518,
4571
		in_b => "010110101000001"
4572
	);
4573

    
4574
	mul_524_i : mul_524 port map (
4575
		result => sig_643,
4576
		in_a => or_522,
4577
		in_b => "010001010100011"
4578
	);
4579

    
4580
	mul_527_i : mul_527 port map (
4581
		result => sig_642,
4582
		in_a => or_525,
4583
		in_b => "0101001110011111"
4584
	);
4585

    
4586
	mul_531_i : mul_531 port map (
4587
		result => sig_641,
4588
		in_a => or_529,
4589
		in_b => "010110101000001"
4590
	);
4591

    
4592
	mul_534_i : mul_534 port map (
4593
		result => sig_640,
4594
		in_a => or_532,
4595
		in_b => "010110101000001"
4596
	);
4597

    
4598
	add_537_i : add_537 port map (
4599
		result => sig_639,
4600
		in_a => or_497,
4601
		in_b => or_535
4602
	);
4603

    
4604
	mul_540_i : mul_540 port map (
4605
		result => sig_638,
4606
		in_a => or_538,
4607
		in_b => "0101001110011111"
4608
	);
4609

    
4610
	mul_543_i : mul_543 port map (
4611
		result => sig_637,
4612
		in_a => or_541,
4613
		in_b => "010001010100011"
4614
	);
4615

    
4616
	sub_544_i : sub_544 port map (
4617
		result => sig_636,
4618
		in_a => sig_638,
4619
		in_b => sig_637
4620
	);
4621

    
4622
	mul_547_i : mul_547 port map (
4623
		result => sig_635,
4624
		in_a => or_545,
4625
		in_b => "010110101000001"
4626
	);
4627

    
4628
	add_552_i : add_552 port map (
4629
		result => sig_634,
4630
		in_a => or_548,
4631
		in_b => or_550
4632
	);
4633

    
4634
	sub_553_i : sub_553 port map (
4635
		result => sig_633,
4636
		in_a => or_548,
4637
		in_b => or_550
4638
	);
4639

    
4640
	mul_556_i : mul_556 port map (
4641
		result => sig_632,
4642
		in_a => or_554,
4643
		in_b => "010110101000001"
4644
	);
4645

    
4646
	mul_559_i : mul_559 port map (
4647
		result => sig_631,
4648
		in_a => or_557,
4649
		in_b => "010110101000001"
4650
	);
4651

    
4652
	mul_561_i : mul_561 port map (
4653
		result => sig_630,
4654
		in_a => or_500,
4655
		in_b => "0101001110011111"
4656
	);
4657

    
4658
	sub_562_i : sub_562 port map (
4659
		result => sig_629,
4660
		in_a => sig_708,
4661
		in_b => sig_630
4662
	);
4663

    
4664
	sub_563_i : sub_563 port map (
4665
		result => sig_628,
4666
		in_a => or_504,
4667
		in_b => or_506
4668
	);
4669

    
4670
	add_564_i : add_564 port map (
4671
		result => sig_627,
4672
		in_a => or_358,
4673
		in_b => or_360
4674
	);
4675

    
4676
	mul_566_i : mul_566 port map (
4677
		result => sig_626,
4678
		in_a => or_366,
4679
		in_b => "010001010100011"
4680
	);
4681

    
4682
	sub_567_i : sub_567 port map (
4683
		result => sig_625,
4684
		in_a => sig_707,
4685
		in_b => sig_626
4686
	);
4687

    
4688
	add_570_i : add_570 port map (
4689
		result => sig_624,
4690
		in_a => or_417,
4691
		in_b => or_568
4692
	);
4693

    
4694
	mul_573_i : mul_573 port map (
4695
		result => sig_623,
4696
		in_a => or_571,
4697
		in_b => "010110101000001"
4698
	);
4699

    
4700
	sub_574_i : sub_574 port map (
4701
		result => sig_622,
4702
		in_a => or_417,
4703
		in_b => or_568
4704
	);
4705

    
4706
	mul_577_i : mul_577 port map (
4707
		result => sig_621,
4708
		in_a => or_575,
4709
		in_b => "010110101000001"
4710
	);
4711

    
4712
	mul_579_i : mul_579 port map (
4713
		result => sig_620,
4714
		in_a => or_541,
4715
		in_b => "0101001110011111"
4716
	);
4717

    
4718
	sub_580_i : sub_580 port map (
4719
		result => sig_619,
4720
		in_a => sig_706,
4721
		in_b => sig_620
4722
	);
4723

    
4724
	sub_585_i : sub_585 port map (
4725
		result => sig_618,
4726
		in_a => or_581,
4727
		in_b => or_583
4728
	);
4729

    
4730
	sub_586_i : sub_586 port map (
4731
		result => sig_617,
4732
		in_a => sig_1115,
4733
		in_b => sig_1161
4734
	);
4735

    
4736
	mul_589_i : mul_589 port map (
4737
		result => sig_616,
4738
		in_a => or_587,
4739
		in_b => "0101001110011111"
4740
	);
4741

    
4742
	mul_592_i : mul_592 port map (
4743
		result => sig_615,
4744
		in_a => or_590,
4745
		in_b => "010001010100011"
4746
	);
4747

    
4748
	sub_593_i : sub_593 port map (
4749
		result => sig_614,
4750
		in_a => sig_616,
4751
		in_b => sig_615
4752
	);
4753

    
4754
	mul_594_i : mul_594 port map (
4755
		result => sig_613,
4756
		in_a => or_587,
4757
		in_b => "010001010100011"
4758
	);
4759

    
4760
	mul_595_i : mul_595 port map (
4761
		result => sig_612,
4762
		in_a => or_590,
4763
		in_b => "0101001110011111"
4764
	);
4765

    
4766
	sub_596_i : sub_596 port map (
4767
		result => sig_611,
4768
		in_a => sig_613,
4769
		in_b => sig_612
4770
	);
4771

    
4772
	sub_599_i : sub_599 port map (
4773
		result => sig_610,
4774
		in_a => or_423,
4775
		in_b => or_597
4776
	);
4777

    
4778
	add_600_i : add_600 port map (
4779
		result => sig_609,
4780
		in_a => or_423,
4781
		in_b => or_597
4782
	);
4783

    
4784
	add_601_i : add_601 port map (
4785
		result => sig_608,
4786
		in_a => idct_2d_yc_reg2(31 downto 5),
4787
		in_b => "000000000000000000000000001"
4788
	);
4789

    
4790
	add_602_i : add_602 port map (
4791
		result => sig_607,
4792
		in_a => sig_1160,
4793
		in_b => "00000000000000000001"
4794
	);
4795

    
4796
	mul_605_i : mul_605 port map (
4797
		result => sig_606,
4798
		in_a => or_603,
4799
		in_b => "010110101000001"
4800
	);
4801

    
4802
	-- Behaviour of component 'mux_66' model 'mux'
4803
	mux_66 <=
4804
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
4805
		(repeat(3, sig_947) and "110") or
4806
		(repeat(3, sig_945) and "101") or
4807
		(repeat(3, sig_943) and "100") or
4808
		(repeat(3, sig_941) and "011") or
4809
		(repeat(3, sig_949) and "111") or
4810
		(repeat(3, sig_939) and "010") or
4811
		(repeat(3, sig_937) and "001");
4812

    
4813
	-- Behaviour of component 'mux_30' model 'mux'
4814
	mux_30 <=
4815
		(sig_873 and cp_en);
4816

    
4817
	-- Behaviour of component 'mux_32' model 'mux'
4818
	mux_32 <=
4819
		(sig_1002 and sig_702) or
4820
		(sig_872 and sig_690);
4821

    
4822
	-- Behaviour of component 'mux_33' model 'mux'
4823
	mux_33 <=
4824
		(sig_1039 and cp_din(0)) or
4825
		(sig_954 and '1');
4826

    
4827
	-- Behaviour of component 'mux_34' model 'mux'
4828
	mux_34 <=
4829
		(sig_1038 and cp_rest) or
4830
		(sig_953 and '1');
4831

    
4832
	-- Behaviour of component 'mux_58' model 'mux'
4833
	mux_58 <=
4834
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
4835
		(repeat(3, sig_966) and "110") or
4836
		(repeat(3, sig_957) and "101") or
4837
		(repeat(3, sig_956) and "100") or
4838
		(repeat(3, sig_990) and "011") or
4839
		(repeat(3, sig_996) and "111") or
4840
		(repeat(3, sig_986) and "010") or
4841
		(repeat(3, sig_984) and "001");
4842

    
4843
	-- Behaviour of component 'mux_59' model 'mux'
4844
	mux_59 <=
4845
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
4846
		(repeat(3, sig_833) and augh_main_k(5 downto 3));
4847

    
4848
	-- Behaviour of component 'mux_60' model 'mux'
4849
	mux_60 <=
4850
		(sig_1004 and and_161) or
4851
		(sig_995 and '1');
4852

    
4853
	-- Behaviour of component 'mux_61' model 'mux'
4854
	mux_61 <=
4855
		(repeat(8, sig_1003) and cp_din(23 downto 16)) or
4856
		(repeat(8, sig_977) and mux_156);
4857

    
4858
	-- Behaviour of component 'mux_62' model 'mux'
4859
	mux_62 <=
4860
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
4861
		(repeat(3, sig_974) and "110") or
4862
		(repeat(3, sig_1018) and "101") or
4863
		(repeat(3, sig_1016) and "100") or
4864
		(repeat(3, sig_1014) and "011") or
4865
		(repeat(3, sig_976) and "111") or
4866
		(repeat(3, sig_1012) and "010") or
4867
		(repeat(3, sig_1010) and "001");
4868

    
4869
	-- Behaviour of component 'mux_63' model 'mux'
4870
	mux_63 <=
4871
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
4872
		(repeat(3, sig_833) and augh_main_k(5 downto 3));
4873

    
4874
	-- Behaviour of component 'mux_64' model 'mux'
4875
	mux_64 <=
4876
		(sig_1004 and and_161) or
4877
		(sig_975 and '1');
4878

    
4879
	-- Behaviour of component 'mux_65' model 'mux'
4880
	mux_65 <=
4881
		(repeat(8, sig_1003) and cp_din(31 downto 24)) or
4882
		(repeat(8, sig_950) and mux_156);
4883

    
4884
	-- Behaviour of component 'mux_35' model 'mux'
4885
	mux_35 <=
4886
		(sig_954 and '1') or
4887
		(sig_874 and augh_main_k(0));
4888

    
4889
	-- Behaviour of component 'mux_36' model 'mux'
4890
	mux_36 <=
4891
		(sig_953 and '1') or
4892
		(sig_873 and cp_en);
4893

    
4894
	-- Behaviour of component 'mux_37' model 'mux'
4895
	mux_37 <=
4896
		(repeat(16, sig_1052) and sig_1128) or
4897
		(repeat(16, sig_874) and sig_691);
4898

    
4899
	-- Behaviour of component 'mux_38' model 'mux'
4900
	mux_38 <=
4901
		(sig_1051 and cp_en) or
4902
		(sig_1049 and '1');
4903

    
4904
	-- Behaviour of component 'mux_39' model 'mux'
4905
	mux_39 <=
4906
		(repeat(32, sig_1005) and cp_din(31 downto 0)) or
4907
		(repeat(32, sig_884) and sig_704) or
4908
		(repeat(32, sig_880) and sig_1124) or
4909
		(repeat(32, sig_862) and sig_1103) or
4910
		(repeat(32, sig_859) and sig_1102) or
4911
		(repeat(32, sig_887) and (sig_1084(28 downto 0) & "000")) or
4912
		(repeat(32, sig_831) and read32_ret0_10) or
4913
		(repeat(32, sig_733) and (sig_1085(28 downto 0) & "000"));
4914

    
4915
	-- Behaviour of component 'mux_45' model 'mux'
4916
	mux_45 <=
4917
		(repeat(5, sig_857) and "01101") or
4918
		(repeat(5, sig_754) and "11011") or
4919
		(repeat(5, sig_742) and "10111") or
4920
		(repeat(5, sig_737) and "10001") or
4921
		(repeat(5, sig_770) and "11111");
4922

    
4923
	-- Behaviour of component 'mux_46' model 'mux'
4924
	mux_46 <=
4925
		(repeat(5, sig_867) and "01010") or
4926
		(repeat(5, sig_852) and "01111") or
4927
		(repeat(5, sig_843) and "11110") or
4928
		(repeat(5, sig_769) and "11010") or
4929
		(repeat(5, sig_761) and "11111") or
4930
		(repeat(5, sig_857) and "01011") or
4931
		(repeat(5, sig_755) and "10110") or
4932
		(repeat(5, sig_741) and "10011");
4933

    
4934
	-- Behaviour of component 'mux_47' model 'mux'
4935
	mux_47 <=
4936
		(repeat(5, sig_867) and "01011") or
4937
		(repeat(5, sig_852) and "01110") or
4938
		(repeat(5, sig_843) and "11111") or
4939
		(repeat(5, sig_788) and "00001") or
4940
		(repeat(5, sig_770) and "11011") or
4941
		(repeat(5, sig_730) and "00111") or
4942
		(repeat(5, sig_857) and "01001") or
4943
		(repeat(5, sig_764) and "00110") or
4944
		(repeat(5, sig_742) and "10010") or
4945
		(repeat(5, sig_735) and "10000") or
4946
		(repeat(5, sig_762) and "00010") or
4947
		(repeat(5, sig_761) and "11101") or
4948
		(repeat(5, sig_755) and "10111") or
4949
		(repeat(5, sig_752) and "11001");
4950

    
4951
	-- Behaviour of component 'mux_48' model 'mux'
4952
	mux_48 <=
4953
		(repeat(5, sig_1005) and psc_loop_reg_13(4 downto 0)) or
4954
		(repeat(5, sig_865) and "01101") or
4955
		(repeat(5, sig_844) and "11101") or
4956
		(repeat(5, sig_823) and "11000") or
4957
		(repeat(5, sig_818) and "10100") or
4958
		(repeat(5, sig_810) and "00100") or
4959
		(repeat(5, sig_804) and "10001") or
4960
		(repeat(5, sig_797) and "10101") or
4961
		(repeat(5, sig_785) and "11001") or
4962
		(repeat(5, sig_758) and "10000") or
4963
		(repeat(5, sig_731) and "00101") or
4964
		(repeat(5, sig_1017) and "11011") or
4965
		(repeat(5, sig_1015) and "10111") or
4966
		(repeat(5, sig_1013) and "10011") or
4967
		(repeat(5, sig_1011) and "01111") or
4968
		(repeat(5, sig_918) and "01110") or
4969
		(repeat(5, sig_916) and "01010") or
4970
		(repeat(5, sig_915) and "00110") or
4971
		(repeat(5, sig_973) and "11111") or
4972
		(repeat(5, sig_913) and "00010") or
4973
		(repeat(5, sig_891) and "01001") or
4974
		(repeat(5, sig_871) and "01100") or
4975
		(repeat(5, sig_1009) and "01011") or
4976
		(repeat(5, sig_922) and "10110") or
4977
		(repeat(5, sig_920) and "10010") or
4978
		(repeat(5, sig_1058) and "00111") or
4979
		(repeat(5, sig_1056) and "00011") or
4980
		(repeat(5, sig_926) and "11110") or
4981
		(repeat(5, sig_924) and "11010");
4982

    
4983
	-- Behaviour of component 'mux_49' model 'mux'
4984
	mux_49 <=
4985
		(repeat(5, sig_866) and "01000") or
4986
		(repeat(5, sig_842) and "11100") or
4987
		(repeat(5, sig_787) and "00011") or
4988
		(repeat(5, sig_770) and "11000") or
4989
		(repeat(5, sig_755) and "10100") or
4990
		(repeat(5, sig_850) and "01101") or
4991
		(repeat(5, sig_752) and "11011") or
4992
		(repeat(5, sig_742) and "10001") or
4993
		(repeat(5, sig_735) and "10010");
4994

    
4995
	-- Behaviour of component 'mux_40' model 'mux'
4996
	mux_40 <=
4997
		(repeat(5, sig_1005) and psc_loop_reg_13(4 downto 0)) or
4998
		(repeat(5, sig_794) and "11000") or
4999
		(repeat(5, sig_782) and "10100") or
5000
		(repeat(5, sig_781) and "11100") or
5001
		(repeat(5, sig_780) and "11110") or
5002
		(repeat(5, sig_776) and "11001") or
5003
		(repeat(5, sig_773) and "01001") or
5004
		(repeat(5, sig_771) and "10011") or
5005
		(repeat(5, sig_763) and "10001") or
5006
		(repeat(5, sig_760) and "11010") or
5007
		(repeat(5, sig_759) and "10101") or
5008
		(repeat(5, sig_751) and "10110") or
5009
		(repeat(5, sig_750) and "00111") or
5010
		(repeat(5, sig_748) and "01011") or
5011
		(repeat(5, sig_744) and "01110") or
5012
		(repeat(5, sig_736) and "01100") or
5013
		(repeat(5, sig_883) and "00101") or
5014
		(repeat(5, sig_879) and "00010") or
5015
		(repeat(5, sig_875) and "00110") or
5016
		(repeat(5, sig_863) and "01010") or
5017
		(repeat(5, sig_828) and "10000") or
5018
		(repeat(5, sig_827) and "01111") or
5019
		(repeat(5, sig_886) and "01101") or
5020
		(repeat(5, sig_824) and "11011") or
5021
		(repeat(5, sig_807) and "00001") or
5022
		(repeat(5, sig_803) and "11111") or
5023
		(repeat(5, sig_861) and "00100") or
5024
		(repeat(5, sig_845) and "10111") or
5025
		(repeat(5, sig_831) and augh_main_k(5 downto 1)) or
5026
		(repeat(5, sig_860) and "10010") or
5027
		(repeat(5, sig_858) and "00011") or
5028
		(repeat(5, sig_854) and "01000") or
5029
		(repeat(5, sig_849) and "11101");
5030

    
5031
	-- Behaviour of component 'mux_41' model 'mux'
5032
	mux_41 <=
5033
		(repeat(5, sig_857) and "01110") or
5034
		(repeat(5, sig_754) and "11010") or
5035
		(repeat(5, sig_742) and "10110") or
5036
		(repeat(5, sig_737) and "10010") or
5037
		(repeat(5, sig_770) and "11110");
5038

    
5039
	-- Behaviour of component 'mux_42' model 'mux'
5040
	mux_42 <=
5041
		(sig_1053 and and_161) or
5042
		(sig_830 and sig_672) or
5043
		(sig_885 and '1');
5044

    
5045
	-- Behaviour of component 'mux_43' model 'mux'
5046
	mux_43 <=
5047
		(repeat(5, sig_857) and "01111") or
5048
		(repeat(5, sig_826) and "00001") or
5049
		(repeat(5, sig_808) and "01011") or
5050
		(repeat(5, sig_768) and "11100") or
5051
		(repeat(5, sig_754) and "11000") or
5052
		(repeat(5, sig_836) and "00111") or
5053
		(repeat(5, sig_749) and "00101") or
5054
		(repeat(5, sig_728) and "00011") or
5055
		(repeat(5, sig_747) and "00110") or
5056
		(repeat(5, sig_742) and "10100") or
5057
		(repeat(5, sig_740) and "00010") or
5058
		(repeat(5, sig_737) and "10011");
5059

    
5060
	-- Behaviour of component 'mux_44' model 'mux'
5061
	mux_44 <=
5062
		(repeat(5, sig_1005) and psc_loop_reg_13(4 downto 0)) or
5063
		(repeat(5, sig_902) and "10101") or
5064
		(repeat(5, sig_900) and "10001") or
5065
		(repeat(5, sig_898) and "01101") or
5066
		(repeat(5, sig_896) and "01001") or
5067
		(repeat(5, sig_895) and "00101") or
5068
		(repeat(5, sig_893) and "00001") or
5069
		(repeat(5, sig_856) and "01100") or
5070
		(repeat(5, sig_838) and "10100") or
5071
		(repeat(5, sig_837) and "00100") or
5072
		(repeat(5, sig_829) and "10000") or
5073
		(repeat(5, sig_821) and "01000") or
5074
		(repeat(5, sig_800) and "11000") or
5075
		(repeat(5, sig_958) and "11011") or
5076
		(repeat(5, sig_991) and "10111") or
5077
		(repeat(5, sig_987) and "10011") or
5078
		(repeat(5, sig_985) and "01111") or
5079
		(repeat(5, sig_938) and "01110") or
5080
		(repeat(5, sig_936) and "01010") or
5081
		(repeat(5, sig_935) and "00110") or
5082
		(repeat(5, sig_961) and "11111") or
5083
		(repeat(5, sig_933) and "00010") or
5084
		(repeat(5, sig_906) and "11101") or
5085
		(repeat(5, sig_904) and "11001") or
5086
		(repeat(5, sig_983) and "01011") or
5087
		(repeat(5, sig_942) and "10110") or
5088
		(repeat(5, sig_940) and "10010") or
5089
		(repeat(5, sig_982) and "00111") or
5090
		(repeat(5, sig_980) and "00011") or
5091
		(repeat(5, sig_946) and "11110") or
5092
		(repeat(5, sig_944) and "11010");
5093

    
5094
	-- Behaviour of component 'mux_50' model 'mux'
5095
	mux_50 <=
5096
		(repeat(32, sig_1005) and cp_din(63 downto 32)) or
5097
		(repeat(32, sig_882) and sig_1111) or
5098
		(repeat(32, sig_877) and sig_1079) or
5099
		(repeat(32, sig_869) and sig_1149) or
5100
		(repeat(32, sig_847) and sig_1150) or
5101
		(repeat(32, sig_890) and (sig_1093(28 downto 0) & "000")) or
5102
		(repeat(32, sig_831) and read32_ret0_10) or
5103
		(repeat(32, sig_777) and (sig_1094(28 downto 0) & "000")) or
5104
		(repeat(32, sig_766) and (sig_1092(28 downto 0) & "000"));
5105

    
5106
	-- Behaviour of component 'mux_51' model 'mux'
5107
	mux_51 <=
5108
		(repeat(5, sig_1005) and psc_loop_reg_13(4 downto 0)) or
5109
		(repeat(5, sig_796) and "10101") or
5110
		(repeat(5, sig_795) and "10110") or
5111
		(repeat(5, sig_793) and "11111") or
5112
		(repeat(5, sig_790) and "11101") or
5113
		(repeat(5, sig_779) and "11010") or
5114
		(repeat(5, sig_778) and "01011") or
5115
		(repeat(5, sig_775) and "11001") or
5116
		(repeat(5, sig_767) and "11100") or
5117
		(repeat(5, sig_765) and "01000") or
5118
		(repeat(5, sig_756) and "10000") or
5119
		(repeat(5, sig_753) and "10011") or
5120
		(repeat(5, sig_746) and "10010") or
5121
		(repeat(5, sig_745) and "01010") or
5122
		(repeat(5, sig_729) and "11110") or
5123
		(repeat(5, sig_881) and "00110") or
5124
		(repeat(5, sig_878) and "01111") or
5125
		(repeat(5, sig_876) and "00101") or
5126
		(repeat(5, sig_870) and "01100") or
5127
		(repeat(5, sig_817) and "10100") or
5128
		(repeat(5, sig_813) and "00010") or
5129
		(repeat(5, sig_812) and "00001") or
5130
		(repeat(5, sig_889) and "01001") or
5131
		(repeat(5, sig_809) and "00100") or
5132
		(repeat(5, sig_799) and "10001") or
5133
		(repeat(5, sig_798) and "11011") or
5134
		(repeat(5, sig_868) and "00011") or
5135
		(repeat(5, sig_831) and augh_main_k(5 downto 1)) or
5136
		(repeat(5, sig_819) and "10111") or
5137
		(repeat(5, sig_864) and "01101") or
5138
		(repeat(5, sig_855) and "01110") or
5139
		(repeat(5, sig_853) and "00111") or
5140
		(repeat(5, sig_846) and "11000");
5141

    
5142
	-- Behaviour of component 'mux_52' model 'mux'
5143
	mux_52 <=
5144
		(sig_1053 and and_161) or
5145
		(sig_830 and sig_1064) or
5146
		(sig_888 and '1');
5147

    
5148
	-- Behaviour of component 'mux_53' model 'mux'
5149
	mux_53 <=
5150
		(repeat(8, sig_1008) and mux_156) or
5151
		(repeat(8, sig_1003) and cp_din(7 downto 0));
5152

    
5153
	-- Behaviour of component 'mux_54' model 'mux'
5154
	mux_54 <=
5155
		(repeat(3, sig_1007) and "111") or
5156
		(repeat(3, sig_1045) and "101") or
5157
		(repeat(3, sig_1043) and "100") or
5158
		(repeat(3, sig_1041) and "011") or
5159
		(repeat(3, sig_1037) and "010") or
5160
		(repeat(3, sig_1048) and "110") or
5161
		(repeat(3, sig_1035) and "001") or
5162
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0));
5163

    
5164
	-- Behaviour of component 'mux_55' model 'mux'
5165
	mux_55 <=
5166
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5167
		(repeat(3, sig_833) and augh_main_k(5 downto 3));
5168

    
5169
	-- Behaviour of component 'mux_56' model 'mux'
5170
	mux_56 <=
5171
		(sig_1006 and '1') or
5172
		(sig_1004 and and_161);
5173

    
5174
	-- Behaviour of component 'mux_57' model 'mux'
5175
	mux_57 <=
5176
		(repeat(8, sig_1003) and cp_din(15 downto 8)) or
5177
		(repeat(8, sig_997) and mux_156);
5178

    
5179
	-- Behaviour of component 'mux_88' model 'mux'
5180
	mux_88 <=
5181
		(sig_1004 and and_161) or
5182
		(sig_839 and '1');
5183

    
5184
	-- Behaviour of component 'mux_67' model 'mux'
5185
	mux_67 <=
5186
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5187
		(repeat(3, sig_833) and augh_main_k(5 downto 3));
5188

    
5189
	-- Behaviour of component 'mux_68' model 'mux'
5190
	mux_68 <=
5191
		(sig_1004 and and_161) or
5192
		(sig_948 and '1');
5193

    
5194
	-- Behaviour of component 'mux_69' model 'mux'
5195
	mux_69 <=
5196
		(repeat(32, sig_1026) and sig_1102) or
5197
		(repeat(32, sig_974) and or_244) or
5198
		(repeat(32, sig_947) and or_266) or
5199
		(repeat(32, sig_927) and or_285) or
5200
		(repeat(32, sig_907) and or_304) or
5201
		(repeat(32, sig_966) and or_221) or
5202
		(repeat(32, sig_802) and or_378) or
5203
		(repeat(32, sig_727) and or_371) or
5204
		(repeat(32, sig_723) and or_470);
5205

    
5206
	-- Behaviour of component 'mux_71' model 'mux'
5207
	mux_71 <=
5208
		(repeat(32, sig_1026) and sig_1149) or
5209
		(repeat(32, sig_1018) and or_246) or
5210
		(repeat(32, sig_945) and or_268) or
5211
		(repeat(32, sig_925) and or_287) or
5212
		(repeat(32, sig_905) and or_306) or
5213
		(repeat(32, sig_957) and or_224) or
5214
		(repeat(32, sig_801) and or_433) or
5215
		(repeat(32, sig_789) and or_438) or
5216
		(repeat(32, sig_786) and or_450);
5217

    
5218
	-- Behaviour of component 'mux_73' model 'mux'
5219
	mux_73 <=
5220
		(repeat(32, sig_1026) and sig_1124) or
5221
		(repeat(32, sig_1016) and or_248) or
5222
		(repeat(32, sig_943) and or_270) or
5223
		(repeat(32, sig_923) and or_289) or
5224
		(repeat(32, sig_903) and or_308) or
5225
		(repeat(32, sig_956) and or_228) or
5226
		(repeat(32, sig_840) and or_384) or
5227
		(repeat(32, sig_792) and or_435) or
5228
		(repeat(32, sig_774) and or_452);
5229

    
5230
	-- Behaviour of component 'mux_75' model 'mux'
5231
	mux_75 <=
5232
		(repeat(32, sig_1026) and sig_1111) or
5233
		(repeat(32, sig_1014) and or_250) or
5234
		(repeat(32, sig_941) and or_272) or
5235
		(repeat(32, sig_921) and or_291) or
5236
		(repeat(32, sig_901) and or_310) or
5237
		(repeat(32, sig_990) and or_231) or
5238
		(repeat(32, sig_825) and or_417) or
5239
		(repeat(32, sig_805) and or_431) or
5240
		(repeat(32, sig_757) and or_497);
5241

    
5242
	-- Behaviour of component 'mux_77' model 'mux'
5243
	mux_77 <=
5244
		(repeat(32, sig_1026) and sig_704) or
5245
		(repeat(32, sig_1012) and or_252) or
5246
		(repeat(32, sig_939) and or_274) or
5247
		(repeat(32, sig_919) and or_293) or
5248
		(repeat(32, sig_899) and or_312) or
5249
		(repeat(32, sig_986) and or_233) or
5250
		(repeat(32, sig_806) and or_363) or
5251
		(repeat(32, sig_783) and or_346) or
5252
		(repeat(32, sig_743) and or_358);
5253

    
5254
	-- Behaviour of component 'mux_79' model 'mux'
5255
	mux_79 <=
5256
		(repeat(32, sig_1026) and sig_1079) or
5257
		(repeat(32, sig_1010) and or_256) or
5258
		(repeat(32, sig_937) and or_278) or
5259
		(repeat(32, sig_917) and or_297) or
5260
		(repeat(32, sig_897) and or_316) or
5261
		(repeat(32, sig_984) and or_237) or
5262
		(repeat(32, sig_822) and or_421) or
5263
		(repeat(32, sig_738) and or_333) or
5264
		(repeat(32, sig_726) and or_326);
5265

    
5266
	-- Behaviour of component 'mux_81' model 'mux'
5267
	mux_81 <=
5268
		(repeat(32, sig_1026) and sig_1103) or
5269
		(repeat(32, sig_1057) and or_258) or
5270
		(repeat(32, sig_934) and or_280) or
5271
		(repeat(32, sig_914) and or_299) or
5272
		(repeat(32, sig_894) and or_318) or
5273
		(repeat(32, sig_981) and or_239) or
5274
		(repeat(32, sig_784) and or_386) or
5275
		(repeat(32, sig_734) and or_479) or
5276
		(repeat(32, sig_724) and or_587);
5277

    
5278
	-- Behaviour of component 'mux_83' model 'mux'
5279
	mux_83 <=
5280
		(repeat(32, sig_1026) and sig_1150) or
5281
		(repeat(32, sig_1055) and or_260) or
5282
		(repeat(32, sig_932) and or_282) or
5283
		(repeat(32, sig_912) and or_301) or
5284
		(repeat(32, sig_892) and or_320) or
5285
		(repeat(32, sig_979) and or_241) or
5286
		(repeat(32, sig_820) and or_423) or
5287
		(repeat(32, sig_811) and or_425) or
5288
		(repeat(32, sig_722) and or_440);
5289

    
5290
	-- Behaviour of component 'mux_85' model 'mux'
5291
	mux_85 <=
5292
		(repeat(8, sig_1003) and cp_din(63 downto 56)) or
5293
		(repeat(8, sig_841) and mux_156);
5294

    
5295
	-- Behaviour of component 'mux_86' model 'mux'
5296
	mux_86 <=
5297
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5298
		(repeat(3, sig_825) and "011") or
5299
		(repeat(3, sig_822) and "001") or
5300
		(repeat(3, sig_801) and "101") or
5301
		(repeat(3, sig_840) and "100") or
5302
		(repeat(3, sig_783) and "010") or
5303
		(repeat(3, sig_725) and "111") or
5304
		(repeat(3, sig_723) and "110");
5305

    
5306
	-- Behaviour of component 'mux_87' model 'mux'
5307
	mux_87 <=
5308
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5309
		(repeat(3, sig_833) and augh_main_k(5 downto 3));
5310

    
5311
	-- Behaviour of component 'mux_28' model 'mux'
5312
	mux_28 <=
5313
		(sig_873 and cp_en);
5314

    
5315
	-- Behaviour of component 'mux_109' model 'mux'
5316
	mux_109 <=
5317
		(repeat(32, sig_972) and sig_1119) or
5318
		(repeat(32, sig_836) and sig_677) or
5319
		(repeat(32, sig_808) and sig_669) or
5320
		(repeat(32, sig_770) and sig_660) or
5321
		(repeat(32, sig_754) and sig_645) or
5322
		(repeat(32, sig_857) and sig_683) or
5323
		(repeat(32, sig_742) and sig_634) or
5324
		(repeat(32, sig_737) and sig_624) or
5325
		(repeat(32, sig_728) and sig_609);
5326

    
5327
	-- Behaviour of component 'mux_154' model 'mux'
5328
	mux_154 <=
5329
		(sig_952 and sig_699);
5330

    
5331
	-- Behaviour of component 'mux_156' model 'mux'
5332
	mux_156 <=
5333
		(repeat(8, sig_1130) and mux_158);
5334

    
5335
	-- Behaviour of component 'mux_89' model 'mux'
5336
	mux_89 <=
5337
		(repeat(8, sig_1003) and cp_din(55 downto 48)) or
5338
		(repeat(8, sig_816) and mux_156);
5339

    
5340
	-- Behaviour of component 'mux_90' model 'mux'
5341
	mux_90 <=
5342
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5343
		(repeat(3, sig_806) and "010") or
5344
		(repeat(3, sig_805) and "011") or
5345
		(repeat(3, sig_792) and "100") or
5346
		(repeat(3, sig_786) and "101") or
5347
		(repeat(3, sig_815) and "111") or
5348
		(repeat(3, sig_727) and "110") or
5349
		(repeat(3, sig_726) and "001");
5350

    
5351
	-- Behaviour of component 'mux_134' model 'mux'
5352
	mux_134 <=
5353
		(sig_873 and cp_en) or
5354
		(sig_832 and '1');
5355

    
5356
	-- Behaviour of component 'mux_91' model 'mux'
5357
	mux_91 <=
5358
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5359
		(repeat(3, sig_833) and augh_main_k(5 downto 3));
5360

    
5361
	-- Behaviour of component 'mux_92' model 'mux'
5362
	mux_92 <=
5363
		(sig_1004 and and_161) or
5364
		(sig_814 and '1');
5365

    
5366
	-- Behaviour of component 'mux_158' model 'mux'
5367
	mux_158 <=
5368
		(repeat(8, sig_1157) and "11111111") or
5369
		(repeat(8, sig_1106) and idct_2d_r(7 downto 0));
5370

    
5371
	-- Behaviour of component 'mux_111' model 'mux'
5372
	mux_111 <=
5373
		(repeat(32, sig_960) and (sig_1132 & '0')) or
5374
		(repeat(32, sig_770) and (sig_659 & '0')) or
5375
		(repeat(32, sig_754) and (sig_644 & '0')) or
5376
		(repeat(32, sig_747) and (sig_640 & '0')) or
5377
		(repeat(32, sig_742) and (sig_632 & '0')) or
5378
		(repeat(32, sig_857) and (sig_1076 & '0')) or
5379
		(repeat(32, sig_740) and (sig_631 & '0')) or
5380
		(repeat(32, sig_737) and (sig_621 & '0')) or
5381
		(repeat(32, sig_721) and (sig_606 & '0'));
5382

    
5383
	-- Behaviour of component 'mux_113' model 'mux'
5384
	mux_113 <=
5385
		(repeat(32, sig_989) and (sig_1112 & '0')) or
5386
		(repeat(32, sig_843) and (sig_678 & '0')) or
5387
		(repeat(32, sig_826) and (sig_671 & '0')) or
5388
		(repeat(32, sig_772) and (sig_712 & '0')) or
5389
		(repeat(32, sig_770) and (sig_661 & '0')) or
5390
		(repeat(32, sig_857) and (sig_682 & '0')) or
5391
		(repeat(32, sig_754) and (sig_646 & '0')) or
5392
		(repeat(32, sig_749) and (sig_641 & '0')) or
5393
		(repeat(32, sig_742) and (sig_635 & '0')) or
5394
		(repeat(32, sig_737) and (sig_623 & '0'));
5395

    
5396
	-- Behaviour of component 'mux_115' model 'mux'
5397
	mux_115 <=
5398
		(repeat(32, sig_972) and sig_1142) or
5399
		(repeat(32, sig_836) and sig_676) or
5400
		(repeat(32, sig_808) and sig_1063) or
5401
		(repeat(32, sig_770) and sig_658) or
5402
		(repeat(32, sig_754) and sig_709) or
5403
		(repeat(32, sig_857) and sig_681) or
5404
		(repeat(32, sig_742) and sig_633) or
5405
		(repeat(32, sig_737) and sig_622) or
5406
		(repeat(32, sig_728) and sig_610);
5407

    
5408
	-- Behaviour of component 'mux_117' model 'mux'
5409
	mux_117 <=
5410
		(repeat(32, sig_965) and sig_1136) or
5411
		(repeat(32, sig_843) and sig_1071) or
5412
		(repeat(32, sig_787) and sig_713) or
5413
		(repeat(32, sig_770) and sig_710) or
5414
		(repeat(32, sig_754) and sig_648) or
5415
		(repeat(32, sig_857) and sig_684) or
5416
		(repeat(32, sig_742) and sig_636) or
5417
		(repeat(32, sig_737) and sig_625) or
5418
		(repeat(32, sig_730) and sig_614);
5419

    
5420
	-- Behaviour of component 'mux_119' model 'mux'
5421
	mux_119 <=
5422
		(repeat(32, sig_963) and sig_1133) or
5423
		(repeat(32, sig_851) and sig_1073) or
5424
		(repeat(32, sig_787) and sig_663) or
5425
		(repeat(32, sig_761) and sig_1061) or
5426
		(repeat(32, sig_752) and sig_1059) or
5427
		(repeat(32, sig_867) and sig_1078) or
5428
		(repeat(32, sig_739) and sig_629) or
5429
		(repeat(32, sig_735) and sig_619) or
5430
		(repeat(32, sig_730) and sig_611);
5431

    
5432
	-- Behaviour of component 'mux_121' model 'mux'
5433
	mux_121 <=
5434
		(repeat(32, sig_993) and sig_1131) or
5435
		(repeat(32, sig_851) and sig_716) or
5436
		(repeat(32, sig_764) and sig_656) or
5437
		(repeat(32, sig_762) and sig_654) or
5438
		(repeat(32, sig_761) and sig_653) or
5439
		(repeat(32, sig_867) and sig_687) or
5440
		(repeat(32, sig_752) and sig_1060) or
5441
		(repeat(32, sig_739) and sig_628) or
5442
		(repeat(32, sig_735) and sig_618);
5443

    
5444
	-- Behaviour of component 'mux_123' model 'mux'
5445
	mux_123 <=
5446
		(repeat(32, sig_955) and sig_1109) or
5447
		(repeat(32, sig_843) and sig_679) or
5448
		(repeat(32, sig_770) and sig_1062) or
5449
		(repeat(32, sig_764) and sig_657) or
5450
		(repeat(32, sig_762) and sig_655) or
5451
		(repeat(32, sig_857) and sig_686) or
5452
		(repeat(32, sig_754) and sig_647) or
5453
		(repeat(32, sig_742) and sig_639) or
5454
		(repeat(32, sig_737) and sig_627);
5455

    
5456
	-- Behaviour of component 'or_224' model 'or'
5457
	or_224 <=
5458
		and_225;
5459

    
5460
	-- Behaviour of component 'and_225' model 'and'
5461
	and_225 <=
5462
		sig_1084;
5463

    
5464
	-- Behaviour of component 'or_231' model 'or'
5465
	or_231 <=
5466
		and_232;
5467

    
5468
	-- Behaviour of component 'and_232' model 'and'
5469
	and_232 <=
5470
		sig_1084;
5471

    
5472
	-- Behaviour of component 'or_250' model 'or'
5473
	or_250 <=
5474
		and_251;
5475

    
5476
	-- Behaviour of component 'and_251' model 'and'
5477
	and_251 <=
5478
		sig_1093;
5479

    
5480
	-- Behaviour of component 'or_260' model 'or'
5481
	or_260 <=
5482
		and_261;
5483

    
5484
	-- Behaviour of component 'and_261' model 'and'
5485
	and_261 <=
5486
		sig_1093;
5487

    
5488
	-- Behaviour of component 'or_282' model 'or'
5489
	or_282 <=
5490
		and_283;
5491

    
5492
	-- Behaviour of component 'and_283' model 'and'
5493
	and_283 <=
5494
		sig_1084;
5495

    
5496
	-- Behaviour of component 'or_285' model 'or'
5497
	or_285 <=
5498
		and_286;
5499

    
5500
	-- Behaviour of component 'and_286' model 'and'
5501
	and_286 <=
5502
		sig_1093;
5503

    
5504
	-- Behaviour of component 'or_289' model 'or'
5505
	or_289 <=
5506
		and_290;
5507

    
5508
	-- Behaviour of component 'and_290' model 'and'
5509
	and_290 <=
5510
		sig_1093;
5511

    
5512
	-- Behaviour of component 'or_291' model 'or'
5513
	or_291 <=
5514
		and_292;
5515

    
5516
	-- Behaviour of component 'and_292' model 'and'
5517
	and_292 <=
5518
		sig_1093;
5519

    
5520
	-- Behaviour of component 'or_297' model 'or'
5521
	or_297 <=
5522
		and_298;
5523

    
5524
	-- Behaviour of component 'and_298' model 'and'
5525
	and_298 <=
5526
		sig_1093;
5527

    
5528
	-- Behaviour of component 'or_299' model 'or'
5529
	or_299 <=
5530
		and_300;
5531

    
5532
	-- Behaviour of component 'and_300' model 'and'
5533
	and_300 <=
5534
		sig_1093;
5535

    
5536
	-- Behaviour of component 'or_320' model 'or'
5537
	or_320 <=
5538
		and_321;
5539

    
5540
	-- Behaviour of component 'and_321' model 'and'
5541
	and_321 <=
5542
		sig_1084;
5543

    
5544
	-- Behaviour of component 'or_326' model 'or'
5545
	or_326 <=
5546
		and_327;
5547

    
5548
	-- Behaviour of component 'and_327' model 'and'
5549
	and_327 <=
5550
		sig_1093;
5551

    
5552
	-- Behaviour of component 'or_333' model 'or'
5553
	or_333 <=
5554
		and_334;
5555

    
5556
	-- Behaviour of component 'and_334' model 'and'
5557
	and_334 <=
5558
		sig_1092;
5559

    
5560
	-- Behaviour of component 'or_363' model 'or'
5561
	or_363 <=
5562
		and_364;
5563

    
5564
	-- Behaviour of component 'and_364' model 'and'
5565
	and_364 <=
5566
		sig_1092;
5567

    
5568
	-- Behaviour of component 'and_403' model 'and'
5569
	and_403 <=
5570
		sig_1158 and
5571
		repeat(8, sig_1068);
5572

    
5573
	-- Behaviour of component 'and_405' model 'and'
5574
	and_405 <=
5575
		sig_1159 and
5576
		repeat(8, sig_1067);
5577

    
5578
	-- Behaviour of component 'and_407' model 'and'
5579
	and_407 <=
5580
		sig_1154 and
5581
		repeat(8, sig_1066);
5582

    
5583
	-- Behaviour of component 'and_409' model 'and'
5584
	and_409 <=
5585
		sig_1153 and
5586
		repeat(8, sig_1065);
5587

    
5588
	-- Behaviour of component 'and_415' model 'and'
5589
	and_415 <=
5590
		sig_1085(30 downto 0);
5591

    
5592
	-- Behaviour of component 'or_464' model 'or'
5593
	or_464 <=
5594
		and_465;
5595

    
5596
	-- Behaviour of component 'and_465' model 'and'
5597
	and_465 <=
5598
		sig_1095;
5599

    
5600
	-- Behaviour of component 'or_470' model 'or'
5601
	or_470 <=
5602
		and_471;
5603

    
5604
	-- Behaviour of component 'and_471' model 'and'
5605
	and_471 <=
5606
		sig_1085;
5607

    
5608
	-- Behaviour of component 'or_472' model 'or'
5609
	or_472 <=
5610
		and_473;
5611

    
5612
	-- Behaviour of component 'and_473' model 'and'
5613
	and_473 <=
5614
		sig_1083;
5615

    
5616
	-- Behaviour of component 'or_500' model 'or'
5617
	or_500 <=
5618
		and_501;
5619

    
5620
	-- Behaviour of component 'and_501' model 'and'
5621
	and_501 <=
5622
		sig_1094;
5623

    
5624
	-- Behaviour of component 'or_504' model 'or'
5625
	or_504 <=
5626
		and_505;
5627

    
5628
	-- Behaviour of component 'and_505' model 'and'
5629
	and_505 <=
5630
		sig_1092;
5631

    
5632
	-- Behaviour of component 'or_506' model 'or'
5633
	or_506 <=
5634
		and_507;
5635

    
5636
	-- Behaviour of component 'and_507' model 'and'
5637
	and_507 <=
5638
		sig_1095;
5639

    
5640
	-- Behaviour of component 'or_514' model 'or'
5641
	or_514 <=
5642
		and_515;
5643

    
5644
	-- Behaviour of component 'and_515' model 'and'
5645
	and_515 <=
5646
		sig_1083;
5647

    
5648
	-- Behaviour of component 'or_522' model 'or'
5649
	or_522 <=
5650
		and_523;
5651

    
5652
	-- Behaviour of component 'and_523' model 'and'
5653
	and_523 <=
5654
		sig_1094;
5655

    
5656
	-- Behaviour of component 'mux_129' model 'mux'
5657
	mux_129 <=
5658
		(repeat(32, sig_1021) and sig_1114) or
5659
		(repeat(32, sig_1054) and sig_1100) or
5660
		(repeat(32, sig_931) and sig_1087) or
5661
		(repeat(32, sig_911) and sig_694) or
5662
		(repeat(32, sig_848) and sig_1072) or
5663
		(repeat(32, sig_978) and sig_1101) or
5664
		(repeat(32, sig_791) and sig_668) or
5665
		(repeat(32, sig_732) and sig_617);
5666

    
5667
	-- Behaviour of component 'mux_133' model 'mux'
5668
	mux_133 <=
5669
		(repeat(8, sig_874) and cp_din(39 downto 32)) or
5670
		(repeat(8, sig_833) and or_394);
5671

    
5672
	-- Behaviour of component 'mux_135' model 'mux'
5673
	mux_135 <=
5674
		(repeat(32, sig_1047) and (repeat(5, sig_1082(19)) & sig_1082 & sig_1155(7 downto 1))) or
5675
		(repeat(32, sig_1042) and (repeat(5, sig_1127(19)) & sig_1127 & sig_719(7 downto 1))) or
5676
		(repeat(32, sig_1040) and (repeat(5, sig_1152(19)) & sig_1152 & sig_1118(7 downto 1))) or
5677
		(repeat(32, sig_1036) and (repeat(5, sig_1126(19)) & sig_1126 & sig_1104(7 downto 1))) or
5678
		(repeat(32, sig_1035) and (repeat(5, sig_1151(19)) & sig_1151 & sig_718(7 downto 1))) or
5679
		(repeat(32, sig_822) and (repeat(5, sig_714(19)) & sig_714 & sig_670(7 downto 1))) or
5680
		(repeat(32, sig_726) and (repeat(5, sig_607(19)) & sig_607 & sig_608(7 downto 1))) or
5681
		(repeat(32, sig_1044) and (repeat(5, sig_1081(19)) & sig_1081 & sig_720(7 downto 1))) or
5682
		(repeat(32, sig_1034) and (repeat(5, sig_1080(19)) & sig_1080 & sig_1117(7 downto 1))) or
5683
		(repeat(32, sig_917) and (repeat(5, sig_695(19)) & sig_695 & sig_696(7 downto 1))) or
5684
		(repeat(32, sig_897) and (repeat(5, sig_693(19)) & sig_693 & sig_1107(7 downto 1))) or
5685
		(repeat(32, sig_1033) and (repeat(5, sig_1125(19)) & sig_1125 & sig_1116(7 downto 1))) or
5686
		(repeat(32, sig_984) and (repeat(5, sig_700(19)) & sig_700 & sig_1108(7 downto 1))) or
5687
		(repeat(32, sig_1010) and (repeat(5, sig_717(19)) & sig_717 & sig_1089(7 downto 1))) or
5688
		(repeat(32, sig_937) and (repeat(5, sig_697(19)) & sig_697 & sig_1088(7 downto 1)));
5689

    
5690
	-- Behaviour of component 'mux_137' model 'mux'
5691
	mux_137 <=
5692
		(repeat(8, sig_1003) and cp_din(39 downto 32)) or
5693
		(repeat(8, sig_930) and mux_156);
5694

    
5695
	-- Behaviour of component 'mux_138' model 'mux'
5696
	mux_138 <=
5697
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5698
		(repeat(3, sig_927) and "110") or
5699
		(repeat(3, sig_925) and "101") or
5700
		(repeat(3, sig_923) and "100") or
5701
		(repeat(3, sig_921) and "011") or
5702
		(repeat(3, sig_929) and "111") or
5703
		(repeat(3, sig_919) and "010") or
5704
		(repeat(3, sig_917) and "001");
5705

    
5706
	-- Behaviour of component 'mux_139' model 'mux'
5707
	mux_139 <=
5708
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5709
		(repeat(3, sig_833) and augh_main_k(5 downto 3));
5710

    
5711
	-- Behaviour of component 'mux_140' model 'mux'
5712
	mux_140 <=
5713
		(sig_1004 and and_161) or
5714
		(sig_928 and '1');
5715

    
5716
	-- Behaviour of component 'mux_141' model 'mux'
5717
	mux_141 <=
5718
		(repeat(8, sig_1003) and cp_din(47 downto 40)) or
5719
		(repeat(8, sig_910) and mux_156);
5720

    
5721
	-- Behaviour of component 'mux_142' model 'mux'
5722
	mux_142 <=
5723
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5724
		(repeat(3, sig_907) and "110") or
5725
		(repeat(3, sig_905) and "101") or
5726
		(repeat(3, sig_903) and "100") or
5727
		(repeat(3, sig_901) and "011") or
5728
		(repeat(3, sig_909) and "111") or
5729
		(repeat(3, sig_899) and "010") or
5730
		(repeat(3, sig_897) and "001");
5731

    
5732
	-- Behaviour of component 'mux_143' model 'mux'
5733
	mux_143 <=
5734
		(repeat(3, sig_1003) and psc_loop_reg_13(2 downto 0)) or
5735
		(repeat(3, sig_833) and augh_main_k(5 downto 3));
5736

    
5737
	-- Behaviour of component 'mux_144' model 'mux'
5738
	mux_144 <=
5739
		(sig_1004 and and_161) or
5740
		(sig_908 and '1');
5741

    
5742
	-- Behaviour of component 'mux_147' model 'mux'
5743
	mux_147 <=
5744
		(sig_951 and not_264);
5745

    
5746
	-- Behaviour of component 'mux_149' model 'mux'
5747
	mux_149 <=
5748
		(repeat(32, sig_874) and cp_din(31 downto 0)) or
5749
		(repeat(32, sig_835) and sig_675);
5750

    
5751
	-- Behaviour of component 'mux_150' model 'mux'
5752
	mux_150 <=
5753
		(sig_873 and cp_en) or
5754
		(sig_834 and '1');
5755

    
5756
	-- Behaviour of component 'mux_151' model 'mux'
5757
	mux_151 <=
5758
		(sig_1005 and sig_705) or
5759
		(sig_1003 and sig_703) or
5760
		(sig_874 and sig_692) or
5761
		(sig_1050 and '1');
5762

    
5763
	-- Behaviour of component 'mux_152' model 'mux'
5764
	mux_152 <=
5765
		(repeat(64, sig_1005) and (sig_1093 & sig_1084)) or
5766
		(repeat(64, sig_874) and (psc_stuff_reg_19 & cp_id_reg_14)) or
5767
		(repeat(64, sig_1003) and (sig_1153 & sig_1154 & sig_1159 & sig_1158 & sig_1099 & sig_1098 & sig_1097 & sig_1096));
5768

    
5769
	-- Behaviour of component 'mux_155' model 'mux'
5770
	mux_155 <=
5771
		(sig_951 and sig_698);
5772

    
5773
	-- Behaviour of component 'or_221' model 'or'
5774
	or_221 <=
5775
		and_222;
5776

    
5777
	-- Behaviour of component 'and_222' model 'and'
5778
	and_222 <=
5779
		sig_1084;
5780

    
5781
	-- Behaviour of component 'or_233' model 'or'
5782
	or_233 <=
5783
		and_234;
5784

    
5785
	-- Behaviour of component 'and_234' model 'and'
5786
	and_234 <=
5787
		sig_1084;
5788

    
5789
	-- Behaviour of component 'or_237' model 'or'
5790
	or_237 <=
5791
		and_238;
5792

    
5793
	-- Behaviour of component 'and_238' model 'and'
5794
	and_238 <=
5795
		sig_1084;
5796

    
5797
	-- Behaviour of component 'or_252' model 'or'
5798
	or_252 <=
5799
		and_253;
5800

    
5801
	-- Behaviour of component 'and_253' model 'and'
5802
	and_253 <=
5803
		sig_1093;
5804

    
5805
	-- Behaviour of component 'or_256' model 'or'
5806
	or_256 <=
5807
		and_257;
5808

    
5809
	-- Behaviour of component 'and_257' model 'and'
5810
	and_257 <=
5811
		sig_1093;
5812

    
5813
	-- Behaviour of component 'or_268' model 'or'
5814
	or_268 <=
5815
		and_269;
5816

    
5817
	-- Behaviour of component 'and_269' model 'and'
5818
	and_269 <=
5819
		sig_1084;
5820

    
5821
	-- Behaviour of component 'or_270' model 'or'
5822
	or_270 <=
5823
		and_271;
5824

    
5825
	-- Behaviour of component 'and_271' model 'and'
5826
	and_271 <=
5827
		sig_1084;
5828

    
5829
	-- Behaviour of component 'or_274' model 'or'
5830
	or_274 <=
5831
		and_275;
5832

    
5833
	-- Behaviour of component 'and_275' model 'and'
5834
	and_275 <=
5835
		sig_1084;
5836

    
5837
	-- Behaviour of component 'or_278' model 'or'
5838
	or_278 <=
5839
		and_279;
5840

    
5841
	-- Behaviour of component 'and_279' model 'and'
5842
	and_279 <=
5843
		sig_1084;
5844

    
5845
	-- Behaviour of component 'or_310' model 'or'
5846
	or_310 <=
5847
		and_311;
5848

    
5849
	-- Behaviour of component 'and_311' model 'and'
5850
	and_311 <=
5851
		sig_1084;
5852

    
5853
	-- Behaviour of component 'or_316' model 'or'
5854
	or_316 <=
5855
		and_317;
5856

    
5857
	-- Behaviour of component 'and_317' model 'and'
5858
	and_317 <=
5859
		sig_1084;
5860

    
5861
	-- Behaviour of component 'or_358' model 'or'
5862
	or_358 <=
5863
		and_359;
5864

    
5865
	-- Behaviour of component 'and_359' model 'and'
5866
	and_359 <=
5867
		sig_1093;
5868

    
5869
	-- Behaviour of component 'or_366' model 'or'
5870
	or_366 <=
5871
		and_367;
5872

    
5873
	-- Behaviour of component 'and_367' model 'and'
5874
	and_367 <=
5875
		sig_1095;
5876

    
5877
	-- Behaviour of component 'or_374' model 'or'
5878
	or_374 <=
5879
		and_375;
5880

    
5881
	-- Behaviour of component 'and_375' model 'and'
5882
	and_375 <=
5883
		sig_1094;
5884

    
5885
	-- Behaviour of component 'or_417' model 'or'
5886
	or_417 <=
5887
		and_418;
5888

    
5889
	-- Behaviour of component 'and_418' model 'and'
5890
	and_418 <=
5891
		sig_1084;
5892

    
5893
	-- Behaviour of component 'or_421' model 'or'
5894
	or_421 <=
5895
		and_422;
5896

    
5897
	-- Behaviour of componen