lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / cnes_guidelines / rule / data / STD_01600_good.json @ 2051e520
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{
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"DESIGN_FILE" : {
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"design_units" : [{
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"contexts" : [["LIBRARY_CLAUSE", [["IDENTIFIER", "IEEE"]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "IEEE"], ["SIMPLE_NAME", "std_logic_1164"]]]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "IEEE"], ["SIMPLE_NAME", "numeric_std"]]]]], ["LIBRARY_CLAUSE", [["IDENTIFIER", "work"]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["SIMPLE_NAME", "pkg_HBK"]]]]]], "library" : ["ENTITY_DECLARATION", { |
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"name" : ["IDENTIFIER", "STD_01600_good"], "ports" : [{ |
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"names" : [["IDENTIFIER", "i_Clock"]], "mode" : ["in"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "i_Reset_n"]], "mode" : ["in"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "i_A1"]], "mode" : ["in"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "i_B1"]], "mode" : ["in"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "i_Sel1"]], "mode" : ["in"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "o_Q1"]], "mode" : ["out"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "i_A2"]], "mode" : ["in"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "i_B2"]], "mode" : ["in"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "i_Sel2"]], "mode" : ["in"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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, {
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"names" : [["IDENTIFIER", "o_Q2"]], "mode" : ["out"], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []} |
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]} |
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, {
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"contexts" : [], "library" : ["ARCHITECTURE_BODY", { |
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"name" : ["IDENTIFIER", "Behavioral"], "entity" : ["IDENTIFIER", "STD_01600_good"], "ARCHITECTURE_DECLARATIVE_PART" : [{ |
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"declaration" : ["SIGNAL_DECLARATION", { |
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"names" : [["IDENTIFIER", "Q1"]], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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]} |
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, {
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"declaration" : ["SIGNAL_DECLARATION", { |
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"names" : [["IDENTIFIER", "Q2"]], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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]} |
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, {
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"declaration" : ["SIGNAL_DECLARATION", { |
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"names" : [["IDENTIFIER", "OutMux1"]], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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]} |
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, {
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"declaration" : ["SIGNAL_DECLARATION", { |
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"names" : [["IDENTIFIER", "OutMux2"]], "typ" : { |
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"name" : ["SIMPLE_NAME", "std_logic"]} |
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} |
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]} |
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], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", { |
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"name" : ["IDENTIFIER", "Mux1"], "inst_unit" : ["SIMPLE_NAME", "Mux"], "port_map" : [{ |
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"formal_name" : ["SIMPLE_NAME", "i_A"], "actual_designator" : ["SIMPLE_NAME", "i_A1"]} |
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, {
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"formal_name" : ["SIMPLE_NAME", "i_B"], "actual_designator" : ["SIMPLE_NAME", "i_B1"]} |
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, {
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"formal_name" : ["SIMPLE_NAME", "i_S"], "actual_designator" : ["SIMPLE_NAME", "i_Sel1"]} |
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, {
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"formal_name" : ["SIMPLE_NAME", "o_O"], "actual_designator" : ["SIMPLE_NAME", "OutMux1"]} |
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]} |
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], ["COMPONENT_INSTANTIATION_STATEMENT", {
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"name" : ["IDENTIFIER", "Mux2"], "inst_unit" : ["SIMPLE_NAME", "Mux"], "port_map" : [{ |
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"formal_name" : ["SIMPLE_NAME", "i_A"], "actual_designator" : ["SIMPLE_NAME", "i_A2"]} |
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, {
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"formal_name" : ["SIMPLE_NAME", "i_B"], "actual_designator" : ["SIMPLE_NAME", "i_B2"]} |
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, {
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"formal_name" : ["SIMPLE_NAME", "i_S"], "actual_designator" : ["SIMPLE_NAME", "i_Sel2"]} |
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, {
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"formal_name" : ["SIMPLE_NAME", "o_O"], "actual_designator" : ["SIMPLE_NAME", "OutMux2"]} |
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]} |
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], ["PROCESS_STATEMENT", {
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"id" : ["IDENTIFIER", "P_SyncMux"], "active_sigs" : [["SIMPLE_NAME", "i_Reset_n"], ["SIMPLE_NAME", "i_Clock"]], "PROCESS_STATEMENT_PART" : [["IF_STATEMENT", { |
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"if_cases" : [{
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"if_cond" : ["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"id" : "=", "args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CALL", ["SIMPLE_NAME", "i_Reset_n"]]]} |
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]]} |
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]]} |
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], ["EXPRESSION", {
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CONSTANT_VALUE", { |
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"value" : ["CST_LITERAL", "'0'"]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]]} |
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], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", { |
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"lhs" : ["SIMPLE_NAME", "Q1"], "rhs" : [{ |
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"value" : ["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CONSTANT_VALUE", { |
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"value" : ["CST_LITERAL", "'0'"]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]} |
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]} |
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], ["SIGNAL_ASSIGNMENT_STATEMENT", {
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"lhs" : ["SIMPLE_NAME", "Q2"], "rhs" : [{ |
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"value" : ["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CONSTANT_VALUE", { |
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"value" : ["CST_LITERAL", "'0'"]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]} |
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]} |
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]]} |
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, {
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"if_cond" : ["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CALL", ["FUNCTION_CALL", { |
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"id" : ["SIMPLE_NAME", "rising_edge"], "assoc_list" : [{ |
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"actual_designator" : ["SIMPLE_NAME", "i_Clock"]} |
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]} |
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]]]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]]} |
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]]} |
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], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", { |
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"lhs" : ["SIMPLE_NAME", "Q1"], "rhs" : [{ |
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"value" : ["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CALL", ["SIMPLE_NAME", "OutMux1"]]]} |
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]]} |
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]]} |
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]]} |
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]} |
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]} |
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], ["SIGNAL_ASSIGNMENT_STATEMENT", {
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"lhs" : ["SIMPLE_NAME", "Q2"], "rhs" : [{ |
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"value" : ["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CALL", ["SIMPLE_NAME", "OutMux2"]]]} |
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]]} |
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]]} |
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]]} |
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]} |
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]} |
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]]} |
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]} |
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]]} |
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], ["CONDITIONAL_SIGNAL_ASSIGNMENT", {
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"postponed" : false, "lhs" : ["SIMPLE_NAME", "o_Q1"], "rhs" : [{ |
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"expr" : [{
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"value" : ["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CALL", ["SIMPLE_NAME", "Q1"]]]} |
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]]} |
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]]} |
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]]} |
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]} |
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]} |
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]} |
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], ["CONDITIONAL_SIGNAL_ASSIGNMENT", {
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"postponed" : false, "lhs" : ["SIMPLE_NAME", "o_Q2"], "rhs" : [{ |
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"expr" : [{
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"value" : ["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["EXPRESSION", { |
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"args" : [["CALL", ["SIMPLE_NAME", "Q2"]]]} |
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]]} |
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]]} |
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]]} |
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]} |
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]} |
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]} |
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]]} |
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]} |
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]} |
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} |