lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / ghdl / ghdl / testsuite / gna / issue50 / idct.d / mul_376.vhd @ 2051e520
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1 | 2051e520 | Arnaud Dieumegard | library ieee; |
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2 | use ieee.std_logic_1164.all; |
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3 | |||
4 | library ieee; |
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5 | use ieee.numeric_std.all; |
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6 | |||
7 | entity mul_376 is |
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8 | port ( |
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9 | result : out std_logic_vector(31 downto 0); |
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10 | in_a : in std_logic_vector(31 downto 0); |
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11 | in_b : in std_logic_vector(14 downto 0) |
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12 | ); |
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13 | end mul_376; |
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14 | |||
15 | architecture augh of mul_376 is |
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16 | |||
17 | signal tmp_res : signed(46 downto 0); |
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18 | |||
19 | begin |
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20 | |||
21 | -- The actual multiplication |
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22 | tmp_res <= signed(in_a) * signed(in_b); |
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23 | |||
24 | -- Set the output |
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25 | result <= std_logic_vector(tmp_res(31 downto 0)); |
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26 | |||
27 | end architecture; |