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lustrec-tests / vhdl_json / vhdl_files / 2-exportOK / ghdl / ghdl / testsuite / gna / issue301 / packages / pkg_types.vhd @ 2051e520

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1 2051e520 Arnaud Dieumegard
--!
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--! Copyright (C) 2011 - 2014 Creonic GmbH
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--!
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--! This file is part of the Creonic Viterbi Decoder, which is distributed
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--! under the terms of the GNU General Public License version 2.
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--!
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--! @file
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--! @brief  Global types for the Viterbi decoder
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--! @author Markus Fehrenz
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--! @date   2011/07/04
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--!
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--! @details Most types are shared and used in different context.
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--!          Changing single types should be done with adding an additional type.
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--!
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library dec_viterbi;
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use dec_viterbi.pkg_param.all;
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use dec_viterbi.pkg_param_derived.all;
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package pkg_types is
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	-- Parity structure: p1_bit, p2_bit, ..., pN_bit
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	type t_input_block is array (NUMBER_PARITY_BITS - 1 downto 0) of signed(BW_LLR_INPUT - 1 downto 0);
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	-- Types are used for bulk information to ACS and branch unit.
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	type t_node_s is array (NUMBER_TRELLIS_STATES - 1 downto 0) of signed(BW_MAX_PROBABILITY - 1 downto 0);
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	type t_node   is array (NUMBER_TRELLIS_STATES - 1 downto 0) of std_logic_vector(BW_MAX_PROBABILITY - 1 downto 0);
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	type t_branch is array (NUMBER_BRANCH_UNITS - 1 downto 0)   of std_logic_vector(BW_BRANCH_RESULT - 1 downto 0);
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	-- RAM Data
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	type t_ram_rd_data is array (1 downto 0) of std_logic_vector(NUMBER_TRELLIS_STATES - 1 downto 0);
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end package pkg_types;