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{
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  "DESIGN_FILE" : {
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    "design_units" : [{
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      "contexts" : [], "library" : ["ARCHITECTURE_BODY", {
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        "name" : ["IDENTIFIER", "struct"], "entity" : ["IDENTIFIER", "reg4"], "ARCHITECTURE_DECLARATIVE_PART" : [{
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          "declaration" : ["SIGNAL_DECLARATION", {
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            "names" : [["IDENTIFIER", "int_clk"]], "typ" : {
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              "name" : ["SIMPLE_NAME", "bit"]}
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            }
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          ]}
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        ], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", {
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          "name" : ["IDENTIFIER", "bit0"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "d_latch"]]], "inst_unit_type" : "entity", "archi_name" : ["IDENTIFIER", "basic"], "port_map" : [{
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            "actual_designator" : ["SIMPLE_NAME", "d0"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "int_clk"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "q0"]}
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          ]}
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        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
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          "name" : ["IDENTIFIER", "bit1"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "d_latch"]]], "inst_unit_type" : "entity", "archi_name" : ["IDENTIFIER", "basic"], "port_map" : [{
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            "actual_designator" : ["SIMPLE_NAME", "d1"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "int_clk"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "q1"]}
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          ]}
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        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
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          "name" : ["IDENTIFIER", "bit2"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "d_latch"]]], "inst_unit_type" : "entity", "archi_name" : ["IDENTIFIER", "basic"], "port_map" : [{
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            "actual_designator" : ["SIMPLE_NAME", "d2"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "int_clk"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "q2"]}
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          ]}
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        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
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          "name" : ["IDENTIFIER", "bit3"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "d_latch"]]], "inst_unit_type" : "entity", "archi_name" : ["IDENTIFIER", "basic"], "port_map" : [{
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            "actual_designator" : ["SIMPLE_NAME", "d3"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "int_clk"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "q3"]}
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          ]}
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        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
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          "name" : ["IDENTIFIER", "gate"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "and2"]]], "inst_unit_type" : "entity", "archi_name" : ["IDENTIFIER", "basic"], "port_map" : [{
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            "actual_designator" : ["SIMPLE_NAME", "en"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "clk"]}
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          , {
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            "actual_designator" : ["SIMPLE_NAME", "int_clk"]}
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          ]}
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        ]]}
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      ]}
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    ]}
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  }
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