lustrec-tests/vhdl_json/vhdl_files/2-exportOK/ghdl/ghdl/testsuite/gna/issue50/vector.d/muxb_121.vhd @ ddabd63e
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library ieee; |
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use ieee.std_logic_1164.all; |
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library ieee; |
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use ieee.numeric_std.all; |
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entity muxb_121 is |
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port ( |
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in_sel : in std_logic; |
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out_data : out std_logic; |
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in_data0 : in std_logic; |
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in_data1 : in std_logic |
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);
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end muxb_121; |
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architecture augh of muxb_121 is |
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begin
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out_data <= in_data0 when in_sel = '0' else in_data1; |
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end architecture; |
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