Project

General

Profile

Download (44.7 KB) Statistics
| Branch: | Tag: | Revision:
1
{
2
  "DESIGN_FILE" : {
3
    "design_units" : [{
4
      "contexts" : [["LIBRARY_CLAUSE", [["IDENTIFIER", "ieee"]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "ieee"], ["SIMPLE_NAME", "std_logic_1164"]]]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "ieee"], ["SIMPLE_NAME", "std_logic_unsigned"]]]]], ["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["SIMPLE_NAME", "plasmaPeriphRegisters"]]]]]], "library" : ["ENTITY_DECLARATION", {
5
        "name" : ["IDENTIFIER", "PlasmaEthernet"], "generics" : [{
6
          "names" : [["IDENTIFIER", "uartLogFile"]], "typ" : {
7
            "name" : ["SIMPLE_NAME", "string"]}
8
          , "expr" : ["EXPRESSION", {
9
            "args" : [["EXPRESSION", {
10
              "args" : [["EXPRESSION", {
11
                "args" : [["EXPRESSION", {
12
                  "args" : [["CONSTANT_VALUE", {
13
                    "value" : ["CST_LITERAL", "\"UNUSED\""]}
14
                  ]]}
15
                ]]}
16
              ]]}
17
            ]]}
18
          ]}
19
        , {
20
          "names" : [["IDENTIFIER", "simulateRam"]], "typ" : {
21
            "name" : ["SIMPLE_NAME", "std_logic"]}
22
          , "expr" : ["EXPRESSION", {
23
            "args" : [["EXPRESSION", {
24
              "args" : [["EXPRESSION", {
25
                "args" : [["EXPRESSION", {
26
                  "args" : [["CONSTANT_VALUE", {
27
                    "value" : ["CST_LITERAL", "'0'"]}
28
                  ]]}
29
                ]]}
30
              ]]}
31
            ]]}
32
          ]}
33
        , {
34
          "names" : [["IDENTIFIER", "simulateProgram"]], "typ" : {
35
            "name" : ["SIMPLE_NAME", "std_logic"]}
36
          , "expr" : ["EXPRESSION", {
37
            "args" : [["EXPRESSION", {
38
              "args" : [["EXPRESSION", {
39
                "args" : [["EXPRESSION", {
40
                  "args" : [["CONSTANT_VALUE", {
41
                    "value" : ["CST_LITERAL", "'0'"]}
42
                  ]]}
43
                ]]}
44
              ]]}
45
            ]]}
46
          ]}
47
        ], "ports" : [{
48
          "names" : [["IDENTIFIER", "clk_100"]], "mode" : ["in"], "typ" : {
49
            "name" : ["SIMPLE_NAME", "std_logic"]}
50
          }
51
        , {
52
          "names" : [["IDENTIFIER", "reset_ex_n"]], "mode" : ["in"], "typ" : {
53
            "name" : ["SIMPLE_NAME", "std_logic"]}
54
          }
55
        , {
56
          "names" : [["IDENTIFIER", "UartRx"]], "mode" : ["in"], "typ" : {
57
            "name" : ["SIMPLE_NAME", "std_logic"]}
58
          }
59
        , {
60
          "names" : [["IDENTIFIER", "UartTx"]], "mode" : ["out"], "typ" : {
61
            "name" : ["SIMPLE_NAME", "std_logic"]}
62
          }
63
        , {
64
          "names" : [["IDENTIFIER", "leds"]], "mode" : ["out"], "typ" : {
65
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
66
              "ranges" : [["RANGE_WITH_DIRECTION", {
67
                "direction" : "downto", "from" : ["EXPRESSION", {
68
                  "args" : [["EXPRESSION", {
69
                    "args" : [["CONSTANT_VALUE", {
70
                      "value" : ["CST_LITERAL", "7"]}
71
                    ]]}
72
                  ]]}
73
                ], "_to" : ["EXPRESSION", {
74
                  "args" : [["EXPRESSION", {
75
                    "args" : [["CONSTANT_VALUE", {
76
                      "value" : ["CST_LITERAL", "0"]}
77
                    ]]}
78
                  ]]}
79
                ]}
80
              ]]}
81
            ]}
82
          }
83
        , {
84
          "names" : [["IDENTIFIER", "switches"]], "mode" : ["in"], "typ" : {
85
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
86
              "ranges" : [["RANGE_WITH_DIRECTION", {
87
                "direction" : "downto", "from" : ["EXPRESSION", {
88
                  "args" : [["EXPRESSION", {
89
                    "args" : [["CONSTANT_VALUE", {
90
                      "value" : ["CST_LITERAL", "7"]}
91
                    ]]}
92
                  ]]}
93
                ], "_to" : ["EXPRESSION", {
94
                  "args" : [["EXPRESSION", {
95
                    "args" : [["CONSTANT_VALUE", {
96
                      "value" : ["CST_LITERAL", "0"]}
97
                    ]]}
98
                  ]]}
99
                ]}
100
              ]]}
101
            ]}
102
          }
103
        , {
104
          "names" : [["IDENTIFIER", "buttons"]], "mode" : ["in"], "typ" : {
105
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
106
              "ranges" : [["RANGE_WITH_DIRECTION", {
107
                "direction" : "downto", "from" : ["EXPRESSION", {
108
                  "args" : [["EXPRESSION", {
109
                    "args" : [["CONSTANT_VALUE", {
110
                      "value" : ["CST_LITERAL", "4"]}
111
                    ]]}
112
                  ]]}
113
                ], "_to" : ["EXPRESSION", {
114
                  "args" : [["EXPRESSION", {
115
                    "args" : [["CONSTANT_VALUE", {
116
                      "value" : ["CST_LITERAL", "0"]}
117
                    ]]}
118
                  ]]}
119
                ]}
120
              ]]}
121
            ]}
122
          }
123
        , {
124
          "names" : [["IDENTIFIER", "pmod"]], "mode" : ["inout"], "typ" : {
125
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
126
              "ranges" : [["RANGE_WITH_DIRECTION", {
127
                "direction" : "downto", "from" : ["EXPRESSION", {
128
                  "args" : [["EXPRESSION", {
129
                    "args" : [["CONSTANT_VALUE", {
130
                      "value" : ["CST_LITERAL", "7"]}
131
                    ]]}
132
                  ]]}
133
                ], "_to" : ["EXPRESSION", {
134
                  "args" : [["EXPRESSION", {
135
                    "args" : [["CONSTANT_VALUE", {
136
                      "value" : ["CST_LITERAL", "0"]}
137
                    ]]}
138
                  ]]}
139
                ]}
140
              ]]}
141
            ]}
142
          }
143
        , {
144
          "names" : [["IDENTIFIER", "Uart_bypassRx"]], "mode" : ["in"], "typ" : {
145
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
146
              "ranges" : [["RANGE_WITH_DIRECTION", {
147
                "direction" : "downto", "from" : ["EXPRESSION", {
148
                  "args" : [["EXPRESSION", {
149
                    "args" : [["CONSTANT_VALUE", {
150
                      "value" : ["CST_LITERAL", "7"]}
151
                    ]]}
152
                  ]]}
153
                ], "_to" : ["EXPRESSION", {
154
                  "args" : [["EXPRESSION", {
155
                    "args" : [["CONSTANT_VALUE", {
156
                      "value" : ["CST_LITERAL", "0"]}
157
                    ]]}
158
                  ]]}
159
                ]}
160
              ]]}
161
            ]}
162
          }
163
        , {
164
          "names" : [["IDENTIFIER", "Uart_bypassRxWeToggle"]], "mode" : ["in"], "typ" : {
165
            "name" : ["SIMPLE_NAME", "std_logic"]}
166
          }
167
        , {
168
          "names" : [["IDENTIFIER", "Uart_bypassTx"]], "mode" : ["out"], "typ" : {
169
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
170
              "ranges" : [["RANGE_WITH_DIRECTION", {
171
                "direction" : "downto", "from" : ["EXPRESSION", {
172
                  "args" : [["EXPRESSION", {
173
                    "args" : [["CONSTANT_VALUE", {
174
                      "value" : ["CST_LITERAL", "7"]}
175
                    ]]}
176
                  ]]}
177
                ], "_to" : ["EXPRESSION", {
178
                  "args" : [["EXPRESSION", {
179
                    "args" : [["CONSTANT_VALUE", {
180
                      "value" : ["CST_LITERAL", "0"]}
181
                    ]]}
182
                  ]]}
183
                ]}
184
              ]]}
185
            ]}
186
          }
187
        , {
188
          "names" : [["IDENTIFIER", "Uart_bypassTxDvToggle"]], "mode" : ["out"], "typ" : {
189
            "name" : ["SIMPLE_NAME", "std_logic"]}
190
          }
191
        , {
192
          "names" : [["IDENTIFIER", "ethernetMDIO"]], "mode" : ["inout"], "typ" : {
193
            "name" : ["SIMPLE_NAME", "std_logic"]}
194
          , "expr" : ["EXPRESSION", {
195
            "args" : [["EXPRESSION", {
196
              "args" : [["EXPRESSION", {
197
                "args" : [["EXPRESSION", {
198
                  "args" : [["CONSTANT_VALUE", {
199
                    "value" : ["CST_LITERAL", "'0'"]}
200
                  ]]}
201
                ]]}
202
              ]]}
203
            ]]}
204
          ]}
205
        , {
206
          "names" : [["IDENTIFIER", "ethernetMDC"]], "mode" : ["out"], "typ" : {
207
            "name" : ["SIMPLE_NAME", "std_logic"]}
208
          , "expr" : ["EXPRESSION", {
209
            "args" : [["EXPRESSION", {
210
              "args" : [["EXPRESSION", {
211
                "args" : [["EXPRESSION", {
212
                  "args" : [["CONSTANT_VALUE", {
213
                    "value" : ["CST_LITERAL", "'0'"]}
214
                  ]]}
215
                ]]}
216
              ]]}
217
            ]]}
218
          ]}
219
        , {
220
          "names" : [["IDENTIFIER", "ethernetINT_n"]], "mode" : ["out"], "typ" : {
221
            "name" : ["SIMPLE_NAME", "std_logic"]}
222
          , "expr" : ["EXPRESSION", {
223
            "args" : [["EXPRESSION", {
224
              "args" : [["EXPRESSION", {
225
                "args" : [["EXPRESSION", {
226
                  "args" : [["CONSTANT_VALUE", {
227
                    "value" : ["CST_LITERAL", "'0'"]}
228
                  ]]}
229
                ]]}
230
              ]]}
231
            ]]}
232
          ]}
233
        , {
234
          "names" : [["IDENTIFIER", "ethernetRESET_n"]], "mode" : ["out"], "typ" : {
235
            "name" : ["SIMPLE_NAME", "std_logic"]}
236
          , "expr" : ["EXPRESSION", {
237
            "args" : [["EXPRESSION", {
238
              "args" : [["EXPRESSION", {
239
                "args" : [["EXPRESSION", {
240
                  "args" : [["CONSTANT_VALUE", {
241
                    "value" : ["CST_LITERAL", "'1'"]}
242
                  ]]}
243
                ]]}
244
              ]]}
245
            ]]}
246
          ]}
247
        , {
248
          "names" : [["IDENTIFIER", "ethernetCOL"]], "mode" : ["in"], "typ" : {
249
            "name" : ["SIMPLE_NAME", "std_logic"]}
250
          , "expr" : ["EXPRESSION", {
251
            "args" : [["EXPRESSION", {
252
              "args" : [["EXPRESSION", {
253
                "args" : [["EXPRESSION", {
254
                  "args" : [["CONSTANT_VALUE", {
255
                    "value" : ["CST_LITERAL", "'0'"]}
256
                  ]]}
257
                ]]}
258
              ]]}
259
            ]]}
260
          ]}
261
        , {
262
          "names" : [["IDENTIFIER", "ethernetCRS"]], "mode" : ["in"], "typ" : {
263
            "name" : ["SIMPLE_NAME", "std_logic"]}
264
          , "expr" : ["EXPRESSION", {
265
            "args" : [["EXPRESSION", {
266
              "args" : [["EXPRESSION", {
267
                "args" : [["EXPRESSION", {
268
                  "args" : [["CONSTANT_VALUE", {
269
                    "value" : ["CST_LITERAL", "'0'"]}
270
                  ]]}
271
                ]]}
272
              ]]}
273
            ]]}
274
          ]}
275
        , {
276
          "names" : [["IDENTIFIER", "ethernetRXDV"]], "mode" : ["in"], "typ" : {
277
            "name" : ["SIMPLE_NAME", "std_logic"]}
278
          , "expr" : ["EXPRESSION", {
279
            "args" : [["EXPRESSION", {
280
              "args" : [["EXPRESSION", {
281
                "args" : [["EXPRESSION", {
282
                  "args" : [["CONSTANT_VALUE", {
283
                    "value" : ["CST_LITERAL", "'0'"]}
284
                  ]]}
285
                ]]}
286
              ]]}
287
            ]]}
288
          ]}
289
        , {
290
          "names" : [["IDENTIFIER", "ethernetRXCLK"]], "mode" : ["in"], "typ" : {
291
            "name" : ["SIMPLE_NAME", "std_logic"]}
292
          , "expr" : ["EXPRESSION", {
293
            "args" : [["EXPRESSION", {
294
              "args" : [["EXPRESSION", {
295
                "args" : [["EXPRESSION", {
296
                  "args" : [["CONSTANT_VALUE", {
297
                    "value" : ["CST_LITERAL", "'0'"]}
298
                  ]]}
299
                ]]}
300
              ]]}
301
            ]]}
302
          ]}
303
        , {
304
          "names" : [["IDENTIFIER", "ethernetRXER"]], "mode" : ["in"], "typ" : {
305
            "name" : ["SIMPLE_NAME", "std_logic"]}
306
          , "expr" : ["EXPRESSION", {
307
            "args" : [["EXPRESSION", {
308
              "args" : [["EXPRESSION", {
309
                "args" : [["EXPRESSION", {
310
                  "args" : [["CONSTANT_VALUE", {
311
                    "value" : ["CST_LITERAL", "'0'"]}
312
                  ]]}
313
                ]]}
314
              ]]}
315
            ]]}
316
          ]}
317
        , {
318
          "names" : [["IDENTIFIER", "ethernetRXD"]], "mode" : ["in"], "typ" : {
319
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
320
              "ranges" : [["RANGE_WITH_DIRECTION", {
321
                "direction" : "downto", "from" : ["EXPRESSION", {
322
                  "args" : [["EXPRESSION", {
323
                    "args" : [["CONSTANT_VALUE", {
324
                      "value" : ["CST_LITERAL", "7"]}
325
                    ]]}
326
                  ]]}
327
                ], "_to" : ["EXPRESSION", {
328
                  "args" : [["EXPRESSION", {
329
                    "args" : [["CONSTANT_VALUE", {
330
                      "value" : ["CST_LITERAL", "0"]}
331
                    ]]}
332
                  ]]}
333
                ]}
334
              ]]}
335
            ]}
336
          , "expr" : ["EXPRESSION", {
337
            "args" : [["EXPRESSION", {
338
              "args" : [["EXPRESSION", {
339
                "args" : [["EXPRESSION", {
340
                  "args" : [["AGGREGATE", {
341
                    "elems" : [{
342
                      "choices" : [["OTHERS"]], "expr" : ["EXPRESSION", {
343
                        "args" : [["EXPRESSION", {
344
                          "args" : [["EXPRESSION", {
345
                            "args" : [["EXPRESSION", {
346
                              "args" : [["CONSTANT_VALUE", {
347
                                "value" : ["CST_LITERAL", "'0'"]}
348
                              ]]}
349
                            ]]}
350
                          ]]}
351
                        ]]}
352
                      ]}
353
                    ]}
354
                  ]]}
355
                ]]}
356
              ]]}
357
            ]]}
358
          ]}
359
        , {
360
          "names" : [["IDENTIFIER", "ethernetGTXCLK"]], "mode" : ["out"], "typ" : {
361
            "name" : ["SIMPLE_NAME", "std_logic"]}
362
          , "expr" : ["EXPRESSION", {
363
            "args" : [["EXPRESSION", {
364
              "args" : [["EXPRESSION", {
365
                "args" : [["EXPRESSION", {
366
                  "args" : [["CONSTANT_VALUE", {
367
                    "value" : ["CST_LITERAL", "'0'"]}
368
                  ]]}
369
                ]]}
370
              ]]}
371
            ]]}
372
          ]}
373
        , {
374
          "names" : [["IDENTIFIER", "ethernetTXCLK"]], "mode" : ["in"], "typ" : {
375
            "name" : ["SIMPLE_NAME", "std_logic"]}
376
          , "expr" : ["EXPRESSION", {
377
            "args" : [["EXPRESSION", {
378
              "args" : [["EXPRESSION", {
379
                "args" : [["EXPRESSION", {
380
                  "args" : [["CONSTANT_VALUE", {
381
                    "value" : ["CST_LITERAL", "'0'"]}
382
                  ]]}
383
                ]]}
384
              ]]}
385
            ]]}
386
          ]}
387
        , {
388
          "names" : [["IDENTIFIER", "ethernetTXER"]], "mode" : ["out"], "typ" : {
389
            "name" : ["SIMPLE_NAME", "std_logic"]}
390
          , "expr" : ["EXPRESSION", {
391
            "args" : [["EXPRESSION", {
392
              "args" : [["EXPRESSION", {
393
                "args" : [["EXPRESSION", {
394
                  "args" : [["CONSTANT_VALUE", {
395
                    "value" : ["CST_LITERAL", "'0'"]}
396
                  ]]}
397
                ]]}
398
              ]]}
399
            ]]}
400
          ]}
401
        , {
402
          "names" : [["IDENTIFIER", "ethernetTXEN"]], "mode" : ["out"], "typ" : {
403
            "name" : ["SIMPLE_NAME", "std_logic"]}
404
          , "expr" : ["EXPRESSION", {
405
            "args" : [["EXPRESSION", {
406
              "args" : [["EXPRESSION", {
407
                "args" : [["EXPRESSION", {
408
                  "args" : [["CONSTANT_VALUE", {
409
                    "value" : ["CST_LITERAL", "'0'"]}
410
                  ]]}
411
                ]]}
412
              ]]}
413
            ]]}
414
          ]}
415
        , {
416
          "names" : [["IDENTIFIER", "ethernetTXD"]], "mode" : ["out"], "typ" : {
417
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
418
              "ranges" : [["RANGE_WITH_DIRECTION", {
419
                "direction" : "downto", "from" : ["EXPRESSION", {
420
                  "args" : [["EXPRESSION", {
421
                    "args" : [["CONSTANT_VALUE", {
422
                      "value" : ["CST_LITERAL", "7"]}
423
                    ]]}
424
                  ]]}
425
                ], "_to" : ["EXPRESSION", {
426
                  "args" : [["EXPRESSION", {
427
                    "args" : [["CONSTANT_VALUE", {
428
                      "value" : ["CST_LITERAL", "0"]}
429
                    ]]}
430
                  ]]}
431
                ]}
432
              ]]}
433
            ]}
434
          , "expr" : ["EXPRESSION", {
435
            "args" : [["EXPRESSION", {
436
              "args" : [["EXPRESSION", {
437
                "args" : [["EXPRESSION", {
438
                  "args" : [["AGGREGATE", {
439
                    "elems" : [{
440
                      "choices" : [["OTHERS"]], "expr" : ["EXPRESSION", {
441
                        "args" : [["EXPRESSION", {
442
                          "args" : [["EXPRESSION", {
443
                            "args" : [["EXPRESSION", {
444
                              "args" : [["CONSTANT_VALUE", {
445
                                "value" : ["CST_LITERAL", "'0'"]}
446
                              ]]}
447
                            ]]}
448
                          ]]}
449
                        ]]}
450
                      ]}
451
                    ]}
452
                  ]]}
453
                ]]}
454
              ]]}
455
            ]]}
456
          ]}
457
        , {
458
          "names" : [["IDENTIFIER", "FlashCLK"]], "mode" : ["out"], "typ" : {
459
            "name" : ["SIMPLE_NAME", "std_logic"]}
460
          }
461
        , {
462
          "names" : [["IDENTIFIER", "FlashCS"]], "mode" : ["out"], "typ" : {
463
            "name" : ["SIMPLE_NAME", "std_logic"]}
464
          }
465
        , {
466
          "names" : [["IDENTIFIER", "FlashTris"]], "mode" : ["out"], "typ" : {
467
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
468
              "ranges" : [["RANGE_WITH_DIRECTION", {
469
                "direction" : "downto", "from" : ["EXPRESSION", {
470
                  "args" : [["EXPRESSION", {
471
                    "args" : [["CONSTANT_VALUE", {
472
                      "value" : ["CST_LITERAL", "3"]}
473
                    ]]}
474
                  ]]}
475
                ], "_to" : ["EXPRESSION", {
476
                  "args" : [["EXPRESSION", {
477
                    "args" : [["CONSTANT_VALUE", {
478
                      "value" : ["CST_LITERAL", "0"]}
479
                    ]]}
480
                  ]]}
481
                ]}
482
              ]]}
483
            ]}
484
          }
485
        , {
486
          "names" : [["IDENTIFIER", "FlashMemDq"]], "mode" : ["inout"], "typ" : {
487
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
488
              "ranges" : [["RANGE_WITH_DIRECTION", {
489
                "direction" : "downto", "from" : ["EXPRESSION", {
490
                  "args" : [["EXPRESSION", {
491
                    "args" : [["CONSTANT_VALUE", {
492
                      "value" : ["CST_LITERAL", "3"]}
493
                    ]]}
494
                  ]]}
495
                ], "_to" : ["EXPRESSION", {
496
                  "args" : [["EXPRESSION", {
497
                    "args" : [["CONSTANT_VALUE", {
498
                      "value" : ["CST_LITERAL", "0"]}
499
                    ]]}
500
                  ]]}
501
                ]}
502
              ]]}
503
            ]}
504
          }
505
        , {
506
          "names" : [["IDENTIFIER", "ddr_s_dq"]], "mode" : ["inout"], "typ" : {
507
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
508
              "ranges" : [["RANGE_WITH_DIRECTION", {
509
                "direction" : "downto", "from" : ["EXPRESSION", {
510
                  "args" : [["EXPRESSION", {
511
                    "args" : [["CONSTANT_VALUE", {
512
                      "value" : ["CST_LITERAL", "15"]}
513
                    ]]}
514
                  ]]}
515
                ], "_to" : ["EXPRESSION", {
516
                  "args" : [["EXPRESSION", {
517
                    "args" : [["CONSTANT_VALUE", {
518
                      "value" : ["CST_LITERAL", "0"]}
519
                    ]]}
520
                  ]]}
521
                ]}
522
              ]]}
523
            ]}
524
          , "expr" : ["EXPRESSION", {
525
            "args" : [["EXPRESSION", {
526
              "args" : [["EXPRESSION", {
527
                "args" : [["EXPRESSION", {
528
                  "args" : [["AGGREGATE", {
529
                    "elems" : [{
530
                      "choices" : [["OTHERS"]], "expr" : ["EXPRESSION", {
531
                        "args" : [["EXPRESSION", {
532
                          "args" : [["EXPRESSION", {
533
                            "args" : [["EXPRESSION", {
534
                              "args" : [["CONSTANT_VALUE", {
535
                                "value" : ["CST_LITERAL", "'Z'"]}
536
                              ]]}
537
                            ]]}
538
                          ]]}
539
                        ]]}
540
                      ]}
541
                    ]}
542
                  ]]}
543
                ]]}
544
              ]]}
545
            ]]}
546
          ]}
547
        , {
548
          "names" : [["IDENTIFIER", "ddr_s_a"]], "mode" : ["out"], "typ" : {
549
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
550
              "ranges" : [["RANGE_WITH_DIRECTION", {
551
                "direction" : "downto", "from" : ["EXPRESSION", {
552
                  "args" : [["EXPRESSION", {
553
                    "args" : [["CONSTANT_VALUE", {
554
                      "value" : ["CST_LITERAL", "12"]}
555
                    ]]}
556
                  ]]}
557
                ], "_to" : ["EXPRESSION", {
558
                  "args" : [["EXPRESSION", {
559
                    "args" : [["CONSTANT_VALUE", {
560
                      "value" : ["CST_LITERAL", "0"]}
561
                    ]]}
562
                  ]]}
563
                ]}
564
              ]]}
565
            ]}
566
          }
567
        , {
568
          "names" : [["IDENTIFIER", "ddr_s_ba"]], "mode" : ["out"], "typ" : {
569
            "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
570
              "ranges" : [["RANGE_WITH_DIRECTION", {
571
                "direction" : "downto", "from" : ["EXPRESSION", {
572
                  "args" : [["EXPRESSION", {
573
                    "args" : [["CONSTANT_VALUE", {
574
                      "value" : ["CST_LITERAL", "2"]}
575
                    ]]}
576
                  ]]}
577
                ], "_to" : ["EXPRESSION", {
578
                  "args" : [["EXPRESSION", {
579
                    "args" : [["CONSTANT_VALUE", {
580
                      "value" : ["CST_LITERAL", "0"]}
581
                    ]]}
582
                  ]]}
583
                ]}
584
              ]]}
585
            ]}
586
          }
587
        , {
588
          "names" : [["IDENTIFIER", "ddr_s_ras_n"]], "mode" : ["out"], "typ" : {
589
            "name" : ["SIMPLE_NAME", "std_logic"]}
590
          }
591
        , {
592
          "names" : [["IDENTIFIER", "ddr_s_cas_n"]], "mode" : ["out"], "typ" : {
593
            "name" : ["SIMPLE_NAME", "std_logic"]}
594
          }
595
        , {
596
          "names" : [["IDENTIFIER", "ddr_s_we_n"]], "mode" : ["out"], "typ" : {
597
            "name" : ["SIMPLE_NAME", "std_logic"]}
598
          }
599
        , {
600
          "names" : [["IDENTIFIER", "ddr_s_odt"]], "mode" : ["out"], "typ" : {
601
            "name" : ["SIMPLE_NAME", "std_logic"]}
602
          }
603
        , {
604
          "names" : [["IDENTIFIER", "ddr_s_cke"]], "mode" : ["out"], "typ" : {
605
            "name" : ["SIMPLE_NAME", "std_logic"]}
606
          }
607
        , {
608
          "names" : [["IDENTIFIER", "ddr_s_dm"]], "mode" : ["out"], "typ" : {
609
            "name" : ["SIMPLE_NAME", "std_logic"]}
610
          }
611
        , {
612
          "names" : [["IDENTIFIER", "ddr_d_udqs"]], "mode" : ["inout"], "typ" : {
613
            "name" : ["SIMPLE_NAME", "std_logic"]}
614
          , "expr" : ["EXPRESSION", {
615
            "args" : [["EXPRESSION", {
616
              "args" : [["EXPRESSION", {
617
                "args" : [["EXPRESSION", {
618
                  "args" : [["CONSTANT_VALUE", {
619
                    "value" : ["CST_LITERAL", "'Z'"]}
620
                  ]]}
621
                ]]}
622
              ]]}
623
            ]]}
624
          ]}
625
        , {
626
          "names" : [["IDENTIFIER", "ddr_d_udqs_n"]], "mode" : ["inout"], "typ" : {
627
            "name" : ["SIMPLE_NAME", "std_logic"]}
628
          , "expr" : ["EXPRESSION", {
629
            "args" : [["EXPRESSION", {
630
              "args" : [["EXPRESSION", {
631
                "args" : [["EXPRESSION", {
632
                  "args" : [["CONSTANT_VALUE", {
633
                    "value" : ["CST_LITERAL", "'Z'"]}
634
                  ]]}
635
                ]]}
636
              ]]}
637
            ]]}
638
          ]}
639
        , {
640
          "names" : [["IDENTIFIER", "ddr_s_rzq"]], "mode" : ["inout"], "typ" : {
641
            "name" : ["SIMPLE_NAME", "std_logic"]}
642
          , "expr" : ["EXPRESSION", {
643
            "args" : [["EXPRESSION", {
644
              "args" : [["EXPRESSION", {
645
                "args" : [["EXPRESSION", {
646
                  "args" : [["CONSTANT_VALUE", {
647
                    "value" : ["CST_LITERAL", "'Z'"]}
648
                  ]]}
649
                ]]}
650
              ]]}
651
            ]]}
652
          ]}
653
        , {
654
          "names" : [["IDENTIFIER", "ddr_s_zio"]], "mode" : ["inout"], "typ" : {
655
            "name" : ["SIMPLE_NAME", "std_logic"]}
656
          , "expr" : ["EXPRESSION", {
657
            "args" : [["EXPRESSION", {
658
              "args" : [["EXPRESSION", {
659
                "args" : [["EXPRESSION", {
660
                  "args" : [["CONSTANT_VALUE", {
661
                    "value" : ["CST_LITERAL", "'Z'"]}
662
                  ]]}
663
                ]]}
664
              ]]}
665
            ]]}
666
          ]}
667
        , {
668
          "names" : [["IDENTIFIER", "ddr_s_udm"]], "mode" : ["out"], "typ" : {
669
            "name" : ["SIMPLE_NAME", "std_logic"]}
670
          }
671
        , {
672
          "names" : [["IDENTIFIER", "ddr_d_dqs"]], "mode" : ["inout"], "typ" : {
673
            "name" : ["SIMPLE_NAME", "std_logic"]}
674
          , "expr" : ["EXPRESSION", {
675
            "args" : [["EXPRESSION", {
676
              "args" : [["EXPRESSION", {
677
                "args" : [["EXPRESSION", {
678
                  "args" : [["CONSTANT_VALUE", {
679
                    "value" : ["CST_LITERAL", "'Z'"]}
680
                  ]]}
681
                ]]}
682
              ]]}
683
            ]]}
684
          ]}
685
        , {
686
          "names" : [["IDENTIFIER", "ddr_d_dqs_n"]], "mode" : ["inout"], "typ" : {
687
            "name" : ["SIMPLE_NAME", "std_logic"]}
688
          , "expr" : ["EXPRESSION", {
689
            "args" : [["EXPRESSION", {
690
              "args" : [["EXPRESSION", {
691
                "args" : [["EXPRESSION", {
692
                  "args" : [["CONSTANT_VALUE", {
693
                    "value" : ["CST_LITERAL", "'Z'"]}
694
                  ]]}
695
                ]]}
696
              ]]}
697
            ]]}
698
          ]}
699
        , {
700
          "names" : [["IDENTIFIER", "ddr_d_ck"]], "mode" : ["out"], "typ" : {
701
            "name" : ["SIMPLE_NAME", "std_logic"]}
702
          }
703
        , {
704
          "names" : [["IDENTIFIER", "ddr_d_ck_n"]], "mode" : ["out"], "typ" : {
705
            "name" : ["SIMPLE_NAME", "std_logic"]}
706
          }
707
        ], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []}
708
      ]}
709
    , {
710
      "contexts" : [], "library" : ["ARCHITECTURE_BODY", {
711
        "name" : ["IDENTIFIER", "logic"], "entity" : ["IDENTIFIER", "PlasmaEthernet"], "ARCHITECTURE_DECLARATIVE_PART" : [{
712
          "declaration" : ["SIGNAL_DECLARATION", {
713
            "names" : [["IDENTIFIER", "clk_50"]], "typ" : {
714
              "name" : ["SIMPLE_NAME", "std_logic"]}
715
            }
716
          ]}
717
        , {
718
          "declaration" : ["SIGNAL_DECLARATION", {
719
            "names" : [["IDENTIFIER", "reset_n"]], "typ" : {
720
              "name" : ["SIMPLE_NAME", "std_logic"]}
721
            }
722
          ]}
723
        , {
724
          "declaration" : ["SIGNAL_DECLARATION", {
725
            "names" : [["IDENTIFIER", "FifoDin"]], "typ" : {
726
              "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
727
                "ranges" : [["RANGE_WITH_DIRECTION", {
728
                  "direction" : "downto", "from" : ["EXPRESSION", {
729
                    "args" : [["EXPRESSION", {
730
                      "args" : [["CONSTANT_VALUE", {
731
                        "value" : ["CST_LITERAL", "7"]}
732
                      ]]}
733
                    ]]}
734
                  ], "_to" : ["EXPRESSION", {
735
                    "args" : [["EXPRESSION", {
736
                      "args" : [["CONSTANT_VALUE", {
737
                        "value" : ["CST_LITERAL", "0"]}
738
                      ]]}
739
                    ]]}
740
                  ]}
741
                ]]}
742
              ]}
743
            , "init_val" : ["EXPRESSION", {
744
              "args" : [["EXPRESSION", {
745
                "args" : [["EXPRESSION", {
746
                  "args" : [["EXPRESSION", {
747
                    "args" : [["AGGREGATE", {
748
                      "elems" : [{
749
                        "choices" : [["OTHERS"]], "expr" : ["EXPRESSION", {
750
                          "args" : [["EXPRESSION", {
751
                            "args" : [["EXPRESSION", {
752
                              "args" : [["EXPRESSION", {
753
                                "args" : [["CONSTANT_VALUE", {
754
                                  "value" : ["CST_LITERAL", "'0'"]}
755
                                ]]}
756
                              ]]}
757
                            ]]}
758
                          ]]}
759
                        ]}
760
                      ]}
761
                    ]]}
762
                  ]]}
763
                ]]}
764
              ]]}
765
            ]}
766
          ]}
767
        , {
768
          "declaration" : ["SIGNAL_DECLARATION", {
769
            "names" : [["IDENTIFIER", "FifoDout"]], "typ" : {
770
              "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
771
                "ranges" : [["RANGE_WITH_DIRECTION", {
772
                  "direction" : "downto", "from" : ["EXPRESSION", {
773
                    "args" : [["EXPRESSION", {
774
                      "args" : [["CONSTANT_VALUE", {
775
                        "value" : ["CST_LITERAL", "7"]}
776
                      ]]}
777
                    ]]}
778
                  ], "_to" : ["EXPRESSION", {
779
                    "args" : [["EXPRESSION", {
780
                      "args" : [["CONSTANT_VALUE", {
781
                        "value" : ["CST_LITERAL", "0"]}
782
                      ]]}
783
                    ]]}
784
                  ]}
785
                ]]}
786
              ]}
787
            }
788
          ]}
789
        , {
790
          "declaration" : ["SIGNAL_DECLARATION", {
791
            "names" : [["IDENTIFIER", "FifoWe"]], "typ" : {
792
              "name" : ["SIMPLE_NAME", "std_logic"]}
793
            , "init_val" : ["EXPRESSION", {
794
              "args" : [["EXPRESSION", {
795
                "args" : [["EXPRESSION", {
796
                  "args" : [["EXPRESSION", {
797
                    "args" : [["CONSTANT_VALUE", {
798
                      "value" : ["CST_LITERAL", "'0'"]}
799
                    ]]}
800
                  ]]}
801
                ]]}
802
              ]]}
803
            ]}
804
          ]}
805
        , {
806
          "declaration" : ["SIGNAL_DECLARATION", {
807
            "names" : [["IDENTIFIER", "FifoRe"]], "typ" : {
808
              "name" : ["SIMPLE_NAME", "std_logic"]}
809
            , "init_val" : ["EXPRESSION", {
810
              "args" : [["EXPRESSION", {
811
                "args" : [["EXPRESSION", {
812
                  "args" : [["EXPRESSION", {
813
                    "args" : [["CONSTANT_VALUE", {
814
                      "value" : ["CST_LITERAL", "'0'"]}
815
                    ]]}
816
                  ]]}
817
                ]]}
818
              ]]}
819
            ]}
820
          ]}
821
        , {
822
          "declaration" : ["SIGNAL_DECLARATION", {
823
            "names" : [["IDENTIFIER", "FifoFull"]], "typ" : {
824
              "name" : ["SIMPLE_NAME", "std_logic"]}
825
            }
826
          ]}
827
        , {
828
          "declaration" : ["SIGNAL_DECLARATION", {
829
            "names" : [["IDENTIFIER", "FifoEmpty"]], "typ" : {
830
              "name" : ["SIMPLE_NAME", "std_logic"]}
831
            }
832
          ]}
833
        , {
834
          "declaration" : ["SIGNAL_DECLARATION", {
835
            "names" : [["IDENTIFIER", "FifoClear"]], "typ" : {
836
              "name" : ["SIMPLE_NAME", "std_logic"]}
837
            , "init_val" : ["EXPRESSION", {
838
              "args" : [["EXPRESSION", {
839
                "args" : [["EXPRESSION", {
840
                  "args" : [["EXPRESSION", {
841
                    "args" : [["CONSTANT_VALUE", {
842
                      "value" : ["CST_LITERAL", "'0'"]}
843
                    ]]}
844
                  ]]}
845
                ]]}
846
              ]]}
847
            ]}
848
          ]}
849
        , {
850
          "declaration" : ["SIGNAL_DECLARATION", {
851
            "names" : [["IDENTIFIER", "ExBusDin"]], "typ" : {
852
              "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
853
                "ranges" : [["RANGE_WITH_DIRECTION", {
854
                  "direction" : "downto", "from" : ["EXPRESSION", {
855
                    "args" : [["EXPRESSION", {
856
                      "args" : [["CONSTANT_VALUE", {
857
                        "value" : ["CST_LITERAL", "31"]}
858
                      ]]}
859
                    ]]}
860
                  ], "_to" : ["EXPRESSION", {
861
                    "args" : [["EXPRESSION", {
862
                      "args" : [["CONSTANT_VALUE", {
863
                        "value" : ["CST_LITERAL", "0"]}
864
                      ]]}
865
                    ]]}
866
                  ]}
867
                ]]}
868
              ]}
869
            , "init_val" : ["EXPRESSION", {
870
              "args" : [["EXPRESSION", {
871
                "args" : [["EXPRESSION", {
872
                  "args" : [["EXPRESSION", {
873
                    "args" : [["AGGREGATE", {
874
                      "elems" : [{
875
                        "choices" : [["OTHERS"]], "expr" : ["EXPRESSION", {
876
                          "args" : [["EXPRESSION", {
877
                            "args" : [["EXPRESSION", {
878
                              "args" : [["EXPRESSION", {
879
                                "args" : [["CONSTANT_VALUE", {
880
                                  "value" : ["CST_LITERAL", "'0'"]}
881
                                ]]}
882
                              ]]}
883
                            ]]}
884
                          ]]}
885
                        ]}
886
                      ]}
887
                    ]]}
888
                  ]]}
889
                ]]}
890
              ]]}
891
            ]}
892
          ]}
893
        , {
894
          "declaration" : ["SIGNAL_DECLARATION", {
895
            "names" : [["IDENTIFIER", "ExBusDout"]], "typ" : {
896
              "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
897
                "ranges" : [["RANGE_WITH_DIRECTION", {
898
                  "direction" : "downto", "from" : ["EXPRESSION", {
899
                    "args" : [["EXPRESSION", {
900
                      "args" : [["CONSTANT_VALUE", {
901
                        "value" : ["CST_LITERAL", "31"]}
902
                      ]]}
903
                    ]]}
904
                  ], "_to" : ["EXPRESSION", {
905
                    "args" : [["EXPRESSION", {
906
                      "args" : [["CONSTANT_VALUE", {
907
                        "value" : ["CST_LITERAL", "0"]}
908
                      ]]}
909
                    ]]}
910
                  ]}
911
                ]]}
912
              ]}
913
            }
914
          ]}
915
        , {
916
          "declaration" : ["SIGNAL_DECLARATION", {
917
            "names" : [["IDENTIFIER", "ExBusAddr"]], "typ" : {
918
              "name" : ["SIMPLE_NAME", "std_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
919
                "ranges" : [["RANGE_WITH_DIRECTION", {
920
                  "direction" : "downto", "from" : ["EXPRESSION", {
921
                    "args" : [["EXPRESSION", {
922
                      "args" : [["CONSTANT_VALUE", {
923
                        "value" : ["CST_LITERAL", "27"]}
924
                      ]]}
925
                    ]]}
926
                  ], "_to" : ["EXPRESSION", {
927
                    "args" : [["EXPRESSION", {
928
                      "args" : [["CONSTANT_VALUE", {
929
                        "value" : ["CST_LITERAL", "0"]}
930
                      ]]}
931
                    ]]}
932
                  ]}
933
                ]]}
934
              ]}
935
            }
936
          ]}
937
        , {
938
          "declaration" : ["SIGNAL_DECLARATION", {
939
            "names" : [["IDENTIFIER", "ExBusRe"]], "typ" : {
940
              "name" : ["SIMPLE_NAME", "std_logic"]}
941
            }
942
          ]}
943
        , {
944
          "declaration" : ["SIGNAL_DECLARATION", {
945
            "names" : [["IDENTIFIER", "ExBusWe"]], "typ" : {
946
              "name" : ["SIMPLE_NAME", "std_logic"]}
947
            }
948
          ]}
949
        ], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", {
950
          "name" : ["IDENTIFIER", "MCU"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "PlasmaTop"]]], "inst_unit_type" : "entity", "generic_map" : [{
951
            "formal_name" : ["SIMPLE_NAME", "uartLogFile"], "actual_designator" : ["SIMPLE_NAME", "uartLogFile"]}
952
          , {
953
            "formal_name" : ["SIMPLE_NAME", "simulateRam"], "actual_designator" : ["SIMPLE_NAME", "simulateRam"]}
954
          , {
955
            "formal_name" : ["SIMPLE_NAME", "simulateProgram"], "actual_designator" : ["SIMPLE_NAME", "simulateProgram"]}
956
          , {
957
            "formal_name" : ["SIMPLE_NAME", "includeEthernet"], "actual_expr" : ["EXPRESSION", {
958
              "args" : [["EXPRESSION", {
959
                "args" : [["EXPRESSION", {
960
                  "args" : [["EXPRESSION", {
961
                    "args" : [["CONSTANT_VALUE", {
962
                      "value" : ["CST_LITERAL", "'1'"]}
963
                    ]]}
964
                  ]]}
965
                ]]}
966
              ]]}
967
            ]}
968
          , {
969
            "formal_name" : ["SIMPLE_NAME", "AtlysDDR"], "actual_expr" : ["EXPRESSION", {
970
              "args" : [["EXPRESSION", {
971
                "args" : [["EXPRESSION", {
972
                  "args" : [["EXPRESSION", {
973
                    "args" : [["CONSTANT_VALUE", {
974
                      "value" : ["CST_LITERAL", "'0'"]}
975
                    ]]}
976
                  ]]}
977
                ]]}
978
              ]]}
979
            ]}
980
          ], "port_map" : [{
981
            "formal_name" : ["SIMPLE_NAME", "clk_100"], "actual_designator" : ["SIMPLE_NAME", "clk_100"]}
982
          , {
983
            "formal_name" : ["SIMPLE_NAME", "reset_ex_n"], "actual_designator" : ["SIMPLE_NAME", "reset_ex_n"]}
984
          , {
985
            "formal_name" : ["SIMPLE_NAME", "sysClk"], "actual_designator" : ["SIMPLE_NAME", "clk_50"]}
986
          , {
987
            "formal_name" : ["SIMPLE_NAME", "reset_n"], "actual_designator" : ["SIMPLE_NAME", "reset_n"]}
988
          , {
989
            "formal_name" : ["SIMPLE_NAME", "UartRx"], "actual_designator" : ["SIMPLE_NAME", "UartRx"]}
990
          , {
991
            "formal_name" : ["SIMPLE_NAME", "UartTx"], "actual_designator" : ["SIMPLE_NAME", "UartTx"]}
992
          , {
993
            "formal_name" : ["SIMPLE_NAME", "Uart_bypassRx"], "actual_designator" : ["SIMPLE_NAME", "Uart_bypassRx"]}
994
          , {
995
            "formal_name" : ["SIMPLE_NAME", "Uart_bypassRxWeToggle"], "actual_designator" : ["SIMPLE_NAME", "Uart_bypassRxWeToggle"]}
996
          , {
997
            "formal_name" : ["SIMPLE_NAME", "Uart_bypassTx"], "actual_designator" : ["SIMPLE_NAME", "Uart_bypassTx"]}
998
          , {
999
            "formal_name" : ["SIMPLE_NAME", "Uart_bypassTxDvToggle"], "actual_designator" : ["SIMPLE_NAME", "Uart_bypassTxDvToggle"]}
1000
          , {
1001
            "formal_name" : ["SIMPLE_NAME", "leds"], "actual_designator" : ["SIMPLE_NAME", "leds"]}
1002
          , {
1003
            "formal_name" : ["SIMPLE_NAME", "switches"], "actual_designator" : ["SIMPLE_NAME", "switches"]}
1004
          , {
1005
            "formal_name" : ["SIMPLE_NAME", "buttons"], "actual_designator" : ["SIMPLE_NAME", "buttons"]}
1006
          , {
1007
            "formal_name" : ["SIMPLE_NAME", "pmod"], "actual_designator" : ["SIMPLE_NAME", "pmod"]}
1008
          , {
1009
            "formal_name" : ["SIMPLE_NAME", "FlashClk"], "actual_designator" : ["SIMPLE_NAME", "FlashClk"]}
1010
          , {
1011
            "formal_name" : ["SIMPLE_NAME", "FlashCS"], "actual_designator" : ["SIMPLE_NAME", "FlashCS"]}
1012
          , {
1013
            "formal_name" : ["SIMPLE_NAME", "FlashTris"], "actual_designator" : ["SIMPLE_NAME", "FlashTris"]}
1014
          , {
1015
            "formal_name" : ["SIMPLE_NAME", "FlashMemDq"], "actual_designator" : ["SIMPLE_NAME", "FlashMemDq"]}
1016
          , {
1017
            "formal_name" : ["SIMPLE_NAME", "FifoDin"], "actual_designator" : ["SIMPLE_NAME", "FifoDin"]}
1018
          , {
1019
            "formal_name" : ["SIMPLE_NAME", "FifoDout"], "actual_designator" : ["SIMPLE_NAME", "FifoDout"]}
1020
          , {
1021
            "formal_name" : ["SIMPLE_NAME", "FifoWe"], "actual_designator" : ["SIMPLE_NAME", "FifoWe"]}
1022
          , {
1023
            "formal_name" : ["SIMPLE_NAME", "FifoRe"], "actual_designator" : ["SIMPLE_NAME", "FifoRe"]}
1024
          , {
1025
            "formal_name" : ["SIMPLE_NAME", "FifoFull"], "actual_designator" : ["SIMPLE_NAME", "FifoFull"]}
1026
          , {
1027
            "formal_name" : ["SIMPLE_NAME", "FifoEmpty"], "actual_designator" : ["SIMPLE_NAME", "FifoEmpty"]}
1028
          , {
1029
            "formal_name" : ["SIMPLE_NAME", "ExBusDin"], "actual_designator" : ["SIMPLE_NAME", "ExBusDin"]}
1030
          , {
1031
            "formal_name" : ["SIMPLE_NAME", "ExBusDout"], "actual_designator" : ["SIMPLE_NAME", "ExBusDout"]}
1032
          , {
1033
            "formal_name" : ["SIMPLE_NAME", "ExBusAddr"], "actual_designator" : ["SIMPLE_NAME", "ExBusAddr"]}
1034
          , {
1035
            "formal_name" : ["SIMPLE_NAME", "ExBusRe"], "actual_designator" : ["SIMPLE_NAME", "ExBusRe"]}
1036
          , {
1037
            "formal_name" : ["SIMPLE_NAME", "ExBusWe"], "actual_designator" : ["SIMPLE_NAME", "ExBusWe"]}
1038
          , {
1039
            "formal_name" : ["SIMPLE_NAME", "ethernetMDIO"], "actual_designator" : ["SIMPLE_NAME", "ethernetMDIO"]}
1040
          , {
1041
            "formal_name" : ["SIMPLE_NAME", "ethernetMDC"], "actual_designator" : ["SIMPLE_NAME", "ethernetMDC"]}
1042
          , {
1043
            "formal_name" : ["SIMPLE_NAME", "ethernetINT_n"], "actual_designator" : ["SIMPLE_NAME", "ethernetINT_n"]}
1044
          , {
1045
            "formal_name" : ["SIMPLE_NAME", "ethernetRESET_n"], "actual_designator" : ["SIMPLE_NAME", "ethernetRESET_n"]}
1046
          , {
1047
            "formal_name" : ["SIMPLE_NAME", "ethernetCOL"], "actual_designator" : ["SIMPLE_NAME", "ethernetCOL"]}
1048
          , {
1049
            "formal_name" : ["SIMPLE_NAME", "ethernetCRS"], "actual_designator" : ["SIMPLE_NAME", "ethernetCRS"]}
1050
          , {
1051
            "formal_name" : ["SIMPLE_NAME", "ethernetRXDV"], "actual_designator" : ["SIMPLE_NAME", "ethernetRXDV"]}
1052
          , {
1053
            "formal_name" : ["SIMPLE_NAME", "ethernetRXCLK"], "actual_designator" : ["SIMPLE_NAME", "ethernetRXCLK"]}
1054
          , {
1055
            "formal_name" : ["SIMPLE_NAME", "ethernetRXER"], "actual_designator" : ["SIMPLE_NAME", "ethernetRXER"]}
1056
          , {
1057
            "formal_name" : ["SIMPLE_NAME", "ethernetRXD"], "actual_designator" : ["SIMPLE_NAME", "ethernetRXD"]}
1058
          , {
1059
            "formal_name" : ["SIMPLE_NAME", "ethernetGTXCLK"], "actual_designator" : ["SIMPLE_NAME", "ethernetGTXCLK"]}
1060
          , {
1061
            "formal_name" : ["SIMPLE_NAME", "ethernetTXCLK"], "actual_designator" : ["SIMPLE_NAME", "ethernetTXCLK"]}
1062
          , {
1063
            "formal_name" : ["SIMPLE_NAME", "ethernetTXER"], "actual_designator" : ["SIMPLE_NAME", "ethernetTXER"]}
1064
          , {
1065
            "formal_name" : ["SIMPLE_NAME", "ethernetTXEN"], "actual_designator" : ["SIMPLE_NAME", "ethernetTXEN"]}
1066
          , {
1067
            "formal_name" : ["SIMPLE_NAME", "ethernetTXD"], "actual_designator" : ["SIMPLE_NAME", "ethernetTXD"]}
1068
          , {
1069
            "formal_name" : ["SIMPLE_NAME", "ddr_s_dq"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_dq"]}
1070
          , {
1071
            "formal_name" : ["SIMPLE_NAME", "ddr_s_a"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_a"]}
1072
          , {
1073
            "formal_name" : ["SIMPLE_NAME", "ddr_s_ba"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_ba"]}
1074
          , {
1075
            "formal_name" : ["SIMPLE_NAME", "ddr_s_ras_n"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_ras_n"]}
1076
          , {
1077
            "formal_name" : ["SIMPLE_NAME", "ddr_s_cas_n"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_cas_n"]}
1078
          , {
1079
            "formal_name" : ["SIMPLE_NAME", "ddr_s_we_n"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_we_n"]}
1080
          , {
1081
            "formal_name" : ["SIMPLE_NAME", "ddr_s_odt"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_odt"]}
1082
          , {
1083
            "formal_name" : ["SIMPLE_NAME", "ddr_s_cke"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_cke"]}
1084
          , {
1085
            "formal_name" : ["SIMPLE_NAME", "ddr_s_dm"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_dm"]}
1086
          , {
1087
            "formal_name" : ["SIMPLE_NAME", "ddr_d_udqs"], "actual_designator" : ["SIMPLE_NAME", "ddr_d_udqs"]}
1088
          , {
1089
            "formal_name" : ["SIMPLE_NAME", "ddr_d_udqs_n"], "actual_designator" : ["SIMPLE_NAME", "ddr_d_udqs_n"]}
1090
          , {
1091
            "formal_name" : ["SIMPLE_NAME", "ddr_s_rzq"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_rzq"]}
1092
          , {
1093
            "formal_name" : ["SIMPLE_NAME", "ddr_s_zio"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_zio"]}
1094
          , {
1095
            "formal_name" : ["SIMPLE_NAME", "ddr_s_udm"], "actual_designator" : ["SIMPLE_NAME", "ddr_s_udm"]}
1096
          , {
1097
            "formal_name" : ["SIMPLE_NAME", "ddr_d_dqs"], "actual_designator" : ["SIMPLE_NAME", "ddr_d_dqs"]}
1098
          , {
1099
            "formal_name" : ["SIMPLE_NAME", "ddr_d_dqs_n"], "actual_designator" : ["SIMPLE_NAME", "ddr_d_dqs_n"]}
1100
          , {
1101
            "formal_name" : ["SIMPLE_NAME", "ddr_d_ck"], "actual_designator" : ["SIMPLE_NAME", "ddr_d_ck"]}
1102
          , {
1103
            "formal_name" : ["SIMPLE_NAME", "ddr_d_ck_n"], "actual_designator" : ["SIMPLE_NAME", "ddr_d_ck_n"]}
1104
          ]}
1105
        ]]}
1106
      ]}
1107
    ]}
1108
  }
(5-5/6)