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                    "args" : [["CONSTANT_VALUE", {
518
                      "value" : ["CST_LITERAL", "3"]}
519
                    ]]}
520
                  ]]}
521
                ]]}
522
              ]]}
523
            ]]}
524
          ], "rhs" : [{
525
            "expr" : [{
526
              "value" : ["EXPRESSION", {
527
                "args" : [["EXPRESSION", {
528
                  "args" : [["EXPRESSION", {
529
                    "args" : [["EXPRESSION", {
530
                      "id" : "not", "args" : [["CALL", ["SIMPLE_NAME", "rx_fifo_empty"]]]}
531
                    ]]}
532
                  ]]}
533
                ]]}
534
              ]}
535
            ]}
536
          ]}
537
        ], ["PROCESS_STATEMENT", {
538
          "id" : ["IDENTIFIER", "REG_CLK_CPU"], "active_sigs" : [["SIMPLE_NAME", "clk_cpu"]], "PROCESS_STATEMENT_PART" : [["IF_STATEMENT", {
539
            "if_cases" : [{
540
              "if_cond" : ["EXPRESSION", {
541
                "args" : [["EXPRESSION", {
542
                  "args" : [["EXPRESSION", {
543
                    "args" : [["EXPRESSION", {
544
                      "args" : [["CALL", ["FUNCTION_CALL", {
545
                        "id" : ["SIMPLE_NAME", "rising_edge"], "assoc_list" : [{
546
                          "actual_designator" : ["SIMPLE_NAME", "clk_cpu"]}
547
                        ]}
548
                      ]]]}
549
                    ]]}
550
                  ]]}
551
                ]]}
552
              ], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", {
553
                "lhs" : ["SIMPLE_NAME", "tx_fifo_empty_cc"], "rhs" : [{
554
                  "value" : ["EXPRESSION", {
555
                    "args" : [["EXPRESSION", {
556
                      "args" : [["EXPRESSION", {
557
                        "args" : [["EXPRESSION", {
558
                          "args" : [["CALL", ["SIMPLE_NAME", "tx_fifo_empty_ic"]]]}
559
                        ]]}
560
                      ]]}
561
                    ]]}
562
                  ]}
563
                ]}
564
              ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
565
                "lhs" : ["SIMPLE_NAME", "rx_fifo_full_cc"], "rhs" : [{
566
                  "value" : ["EXPRESSION", {
567
                    "args" : [["EXPRESSION", {
568
                      "args" : [["EXPRESSION", {
569
                        "args" : [["EXPRESSION", {
570
                          "args" : [["CALL", ["SIMPLE_NAME", "rx_fifo_full_ic"]]]}
571
                        ]]}
572
                      ]]}
573
                    ]]}
574
                  ]}
575
                ]}
576
              ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
577
                "lhs" : ["SIMPLE_NAME", "rx_fifo_full_cc2"], "rhs" : [{
578
                  "value" : ["EXPRESSION", {
579
                    "args" : [["EXPRESSION", {
580
                      "args" : [["EXPRESSION", {
581
                        "args" : [["EXPRESSION", {
582
                          "args" : [["CALL", ["SIMPLE_NAME", "rx_fifo_full_cc"]]]}
583
                        ]]}
584
                      ]]}
585
                    ]]}
586
                  ]}
587
                ]}
588
              ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
589
                "lhs" : ["SIMPLE_NAME", "tx_fifo_empty_cc2"], "rhs" : [{
590
                  "value" : ["EXPRESSION", {
591
                    "args" : [["EXPRESSION", {
592
                      "args" : [["EXPRESSION", {
593
                        "args" : [["EXPRESSION", {
594
                          "args" : [["CALL", ["SIMPLE_NAME", "tx_fifo_empty_cc"]]]}
595
                        ]]}
596
                      ]]}
597
                    ]]}
598
                  ]}
599
                ]}
600
              ]]}
601
            ]}
602
          ]]}
603
        ], ["PROCESS_STATEMENT", {
604
          "id" : ["IDENTIFIER", "REG_CLK_IO"], "active_sigs" : [["SIMPLE_NAME", "clk_io"]], "PROCESS_STATEMENT_PART" : [["IF_STATEMENT", {
605
            "if_cases" : [{
606
              "if_cond" : ["EXPRESSION", {
607
                "args" : [["EXPRESSION", {
608
                  "args" : [["EXPRESSION", {
609
                    "args" : [["EXPRESSION", {
610
                      "args" : [["CALL", ["FUNCTION_CALL", {
611
                        "id" : ["SIMPLE_NAME", "rising_edge"], "assoc_list" : [{
612
                          "actual_designator" : ["SIMPLE_NAME", "clk_io"]}
613
                        ]}
614
                      ]]]}
615
                    ]]}
616
                  ]]}
617
                ]]}
618
              ], "if_block" : [["SIGNAL_ASSIGNMENT_STATEMENT", {
619
                "lhs" : ["SIMPLE_NAME", "tx_fifo_re2"], "rhs" : [{
620
                  "value" : ["EXPRESSION", {
621
                    "args" : [["EXPRESSION", {
622
                      "args" : [["EXPRESSION", {
623
                        "args" : [["EXPRESSION", {
624
                          "args" : [["CALL", ["SIMPLE_NAME", "tx_fifo_re"]]]}
625
                        ]]}
626
                      ]]}
627
                    ]]}
628
                  ]}
629
                ]}
630
              ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
631
                "lhs" : ["SIMPLE_NAME", "io_tx_we"], "rhs" : [{
632
                  "value" : ["EXPRESSION", {
633
                    "id" : "and", "args" : [["EXPRESSION", {
634
                      "args" : [["EXPRESSION", {
635
                        "args" : [["EXPRESSION", {
636
                          "args" : [["EXPRESSION", {
637
                            "args" : [["CALL", ["SIMPLE_NAME", "tx_fifo_re"]]]}
638
                          ]]}
639
                        ]]}
640
                      ]]}
641
                    ], ["EXPRESSION", {
642
                      "args" : [["EXPRESSION", {
643
                        "args" : [["EXPRESSION", {
644
                          "args" : [["EXPRESSION", {
645
                            "id" : "not", "args" : [["CALL", ["SIMPLE_NAME", "tx_fifo_re2"]]]}
646
                          ]]}
647
                        ]]}
648
                      ]]}
649
                    ]]}
650
                  ]}
651
                ]}
652
              ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
653
                "lhs" : ["SIMPLE_NAME", "rx_fifo_full_ic"], "rhs" : [{
654
                  "value" : ["EXPRESSION", {
655
                    "args" : [["EXPRESSION", {
656
                      "args" : [["EXPRESSION", {
657
                        "args" : [["EXPRESSION", {
658
                          "args" : [["CALL", ["SIMPLE_NAME", "rx_fifo_full"]]]}
659
                        ]]}
660
                      ]]}
661
                    ]]}
662
                  ]}
663
                ]}
664
              ], ["SIGNAL_ASSIGNMENT_STATEMENT", {
665
                "lhs" : ["SIMPLE_NAME", "tx_fifo_empty_ic"], "rhs" : [{
666
                  "value" : ["EXPRESSION", {
667
                    "args" : [["EXPRESSION", {
668
                      "args" : [["EXPRESSION", {
669
                        "args" : [["EXPRESSION", {
670
                          "args" : [["CALL", ["SIMPLE_NAME", "tx_fifo_empty"]]]}
671
                        ]]}
672
                      ]]}
673
                    ]]}
674
                  ]}
675
                ]}
676
              ]]}
677
            ]}
678
          ]]}
679
        ], ["CONDITIONAL_SIGNAL_ASSIGNMENT", {
680
          "postponed" : false, "lhs" : ["SIMPLE_NAME", "tx_fifo_re"], "rhs" : [{
681
            "expr" : [{
682
              "value" : ["EXPRESSION", {
683
                "id" : "and", "args" : [["EXPRESSION", {
684
                  "id" : "and", "args" : [["EXPRESSION", {
685
                    "args" : [["EXPRESSION", {
686
                      "args" : [["EXPRESSION", {
687
                        "args" : [["EXPRESSION", {
688
                          "id" : "not", "args" : [["CALL", ["SIMPLE_NAME", "tx_fifo_empty"]]]}
689
                        ]]}
690
                      ]]}
691
                    ]]}
692
                  ], ["EXPRESSION", {
693
                    "args" : [["EXPRESSION", {
694
                      "args" : [["EXPRESSION", {
695
                        "args" : [["EXPRESSION", {
696
                          "id" : "not", "args" : [["CALL", ["SIMPLE_NAME", "io_tx_busy"]]]}
697
                        ]]}
698
                      ]]}
699
                    ]]}
700
                  ]]}
701
                ], ["EXPRESSION", {
702
                  "args" : [["EXPRESSION", {
703
                    "args" : [["EXPRESSION", {
704
                      "args" : [["EXPRESSION", {
705
                        "id" : "not", "args" : [["CALL", ["SIMPLE_NAME", "tx_fifo_re2"]]]}
706
                      ]]}
707
                    ]]}
708
                  ]]}
709
                ]]}
710
              ]}
711
            ]}
712
          ]}
713
        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
714
          "name" : ["IDENTIFIER", "TX_FIFO"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "fifo2048x8"]]], "inst_unit_type" : "entity", "port_map" : [{
715
            "formal_name" : ["SIMPLE_NAME", "rst"], "actual_designator" : ["SIMPLE_NAME", "cpu_tx_reset"]}
716
          , {
717
            "formal_name" : ["SIMPLE_NAME", "wr_clk"], "actual_designator" : ["SIMPLE_NAME", "clk_cpu"]}
718
          , {
719
            "formal_name" : ["SIMPLE_NAME", "rd_clk"], "actual_designator" : ["SIMPLE_NAME", "clk_io"]}
720
          , {
721
            "formal_name" : ["SIMPLE_NAME", "din"], "actual_designator" : ["SIMPLE_NAME", "cpu_din"]}
722
          , {
723
            "formal_name" : ["SIMPLE_NAME", "wr_en"], "actual_designator" : ["SIMPLE_NAME", "tx_fifo_we"]}
724
          , {
725
            "formal_name" : ["SIMPLE_NAME", "rd_en"], "actual_designator" : ["SIMPLE_NAME", "tx_fifo_re"]}
726
          , {
727
            "formal_name" : ["SIMPLE_NAME", "dout"], "actual_designator" : ["SIMPLE_NAME", "io_tx_din"]}
728
          , {
729
            "formal_name" : ["SIMPLE_NAME", "full"], "actual_designator" : ["SIMPLE_NAME", "tx_fifo_full"]}
730
          , {
731
            "formal_name" : ["SIMPLE_NAME", "empty"], "actual_designator" : ["SIMPLE_NAME", "tx_fifo_empty"]}
732
          ]}
733
        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
734
          "name" : ["IDENTIFIER", "RX_FIFO"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "fifo2048x8"]]], "inst_unit_type" : "entity", "port_map" : [{
735
            "formal_name" : ["SIMPLE_NAME", "rst"], "actual_designator" : ["SIMPLE_NAME", "cpu_rx_reset"]}
736
          , {
737
            "formal_name" : ["SIMPLE_NAME", "wr_clk"], "actual_designator" : ["SIMPLE_NAME", "clk_io"]}
738
          , {
739
            "formal_name" : ["SIMPLE_NAME", "rd_clk"], "actual_designator" : ["SIMPLE_NAME", "clk_cpu"]}
740
          , {
741
            "formal_name" : ["SIMPLE_NAME", "din"], "actual_designator" : ["SIMPLE_NAME", "io_rx_dout"]}
742
          , {
743
            "formal_name" : ["SIMPLE_NAME", "wr_en"], "actual_designator" : ["SIMPLE_NAME", "rx_fifo_we"]}
744
          , {
745
            "formal_name" : ["SIMPLE_NAME", "rd_en"], "actual_designator" : ["SIMPLE_NAME", "cpu_re"]}
746
          , {
747
            "formal_name" : ["SIMPLE_NAME", "dout"], "actual_designator" : ["SIMPLE_NAME", "cpu_dout"]}
748
          , {
749
            "formal_name" : ["SIMPLE_NAME", "full"], "actual_designator" : ["SIMPLE_NAME", "rx_fifo_full"]}
750
          , {
751
            "formal_name" : ["SIMPLE_NAME", "empty"], "actual_designator" : ["SIMPLE_NAME", "rx_fifo_empty"]}
752
          ]}
753
        ]]}
754
      ]}
755
    ]}
756
  }
(1-1/6)