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Revision ddabd63e

Added by Arnaud Dieumegard over 3 years ago

Updated tests for lustrei vhdl import

View differences:

vhdl_json/vhdl_files/2-exportOK/ghdl/ghdl/testsuite/vests/vhdl-93/ashenden/compliant/ch_13_fg_13_04.json
49 49
            }
50 50
          ]}
51 51
        ], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", {
52
          "name" : ["IDENTIFIER", "serial_a"], "inst_unit" : ["SIMPLE_NAME", "serial_interface"], "port_map" : [{
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          "name" : ["IDENTIFIER", "serial_a"], "inst_unit" : ["SIMPLE_NAME", "serial_interface"], "inst_unit_type" : "component", "port_map" : [{
53 53
            "formal_name" : ["SIMPLE_NAME", "clock_phi1"], "actual_designator" : ["SIMPLE_NAME", "buffered_phi1"]}
54 54
          , {
55 55
            "formal_name" : ["SIMPLE_NAME", "clock_phi2"], "actual_designator" : ["SIMPLE_NAME", "buffered_phi2"]}

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