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Revision ddabd63e

Added by Arnaud Dieumegard over 3 years ago

Updated tests for lustrei vhdl import

View differences:

vhdl_json/vhdl_files/2-exportOK/cnes_guidelines/rule/data/best-chronometer-ever/src/best_chronometer_ever.json
923 923
            ]}
924 924
          ]}
925 925
        ], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", {
926
          "name" : ["IDENTIFIER", "START_BP_SYNCHRONIZER"], "inst_unit" : ["SIMPLE_NAME", "crossdomain_sync"], "port_map" : [{
926
          "name" : ["IDENTIFIER", "START_BP_SYNCHRONIZER"], "inst_unit" : ["SIMPLE_NAME", "crossdomain_sync"], "inst_unit_type" : "component", "port_map" : [{
927 927
            "formal_name" : ["SIMPLE_NAME", "i_clock"], "actual_designator" : ["SIMPLE_NAME", "i_clock"]}
928 928
          , {
929 929
            "formal_name" : ["SIMPLE_NAME", "i_reset"], "actual_designator" : ["SIMPLE_NAME", "i_reset"]}
......
933 933
            "formal_name" : ["SIMPLE_NAME", "o_signal"], "actual_designator" : ["SIMPLE_NAME", "synced_start_bp"]}
934 934
          ]}
935 935
        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
936
          "name" : ["IDENTIFIER", "RAZ_BP_SYNCHRONIZER"], "inst_unit" : ["SIMPLE_NAME", "crossdomain_sync"], "port_map" : [{
936
          "name" : ["IDENTIFIER", "RAZ_BP_SYNCHRONIZER"], "inst_unit" : ["SIMPLE_NAME", "crossdomain_sync"], "inst_unit_type" : "component", "port_map" : [{
937 937
            "formal_name" : ["SIMPLE_NAME", "i_clock"], "actual_designator" : ["SIMPLE_NAME", "i_clock"]}
938 938
          , {
939 939
            "formal_name" : ["SIMPLE_NAME", "i_reset"], "actual_designator" : ["SIMPLE_NAME", "i_reset"]}
......
943 943
            "formal_name" : ["SIMPLE_NAME", "o_signal"], "actual_designator" : ["SIMPLE_NAME", "synced_raz_bp"]}
944 944
          ]}
945 945
        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
946
          "name" : ["IDENTIFIER", "CNTSCD_TM"], "inst_unit" : ["SIMPLE_NAME", "centisecond_timer"], "port_map" : [{
946
          "name" : ["IDENTIFIER", "CNTSCD_TM"], "inst_unit" : ["SIMPLE_NAME", "centisecond_timer"], "inst_unit_type" : "component", "port_map" : [{
947 947
            "formal_name" : ["SIMPLE_NAME", "i_clock"], "actual_designator" : ["SIMPLE_NAME", "i_clock"]}
948 948
          , {
949 949
            "formal_name" : ["SIMPLE_NAME", "i_reset"], "actual_designator" : ["SIMPLE_NAME", "i_reset"]}
......
955 955
            "formal_name" : ["SIMPLE_NAME", "o_new_centisecond"], "actual_designator" : ["SIMPLE_NAME", "new_centisecond"]}
956 956
          ]}
957 957
        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
958
          "name" : ["IDENTIFIER", "DSPLY_MGR"], "inst_unit" : ["SIMPLE_NAME", "display_manager"], "port_map" : [{
958
          "name" : ["IDENTIFIER", "DSPLY_MGR"], "inst_unit" : ["SIMPLE_NAME", "display_manager"], "inst_unit_type" : "component", "port_map" : [{
959 959
            "formal_name" : ["SIMPLE_NAME", "i_clock"], "actual_designator" : ["SIMPLE_NAME", "i_clock"]}
960 960
          , {
961 961
            "formal_name" : ["SIMPLE_NAME", "i_reset"], "actual_designator" : ["SIMPLE_NAME", "i_reset"]}
......
973 973
            "formal_name" : ["SIMPLE_NAME", "o_an"], "actual_designator" : ["SIMPLE_NAME", "o_an"]}
974 974
          ]}
975 975
        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
976
          "name" : ["IDENTIFIER", "DSPLY_TRSLTR"], "inst_unit" : ["SIMPLE_NAME", "numeral_to_display"], "port_map" : [{
976
          "name" : ["IDENTIFIER", "DSPLY_TRSLTR"], "inst_unit" : ["SIMPLE_NAME", "numeral_to_display"], "inst_unit_type" : "component", "port_map" : [{
977 977
            "formal_name" : ["SIMPLE_NAME", "i_numeral_time"], "actual_designator" : ["SIMPLE_NAME", "numeral_display"]}
978 978
          , {
979 979
            "formal_name" : ["SIMPLE_NAME", "o_display"], "actual_designator" : ["SIMPLE_NAME", "o_display"]}
980 980
          ]}
981 981
        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
982
          "name" : ["IDENTIFIER", "TM_WZRD"], "inst_unit" : ["SIMPLE_NAME", "time_wizard"], "port_map" : [{
982
          "name" : ["IDENTIFIER", "TM_WZRD"], "inst_unit" : ["SIMPLE_NAME", "time_wizard"], "inst_unit_type" : "component", "port_map" : [{
983 983
            "formal_name" : ["SIMPLE_NAME", "i_clock"], "actual_designator" : ["SIMPLE_NAME", "i_clock"]}
984 984
          , {
985 985
            "formal_name" : ["SIMPLE_NAME", "i_reset"], "actual_designator" : ["SIMPLE_NAME", "i_reset"]}
......
999 999
            "formal_name" : ["SIMPLE_NAME", "o_curr_1000_time"], "actual_designator" : ["SIMPLE_NAME", "curr_1000_time"]}
1000 1000
          ]}
1001 1001
        ], ["COMPONENT_INSTANTIATION_STATEMENT", {
1002
          "name" : ["IDENTIFIER", "USR_HNDLR"], "inst_unit" : ["SIMPLE_NAME", "user_handler"], "port_map" : [{
1002
          "name" : ["IDENTIFIER", "USR_HNDLR"], "inst_unit" : ["SIMPLE_NAME", "user_handler"], "inst_unit_type" : "component", "port_map" : [{
1003 1003
            "formal_name" : ["SIMPLE_NAME", "i_clock"], "actual_designator" : ["SIMPLE_NAME", "i_clock"]}
1004 1004
          , {
1005 1005
            "formal_name" : ["SIMPLE_NAME", "i_reset"], "actual_designator" : ["SIMPLE_NAME", "i_reset"]}

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