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Revision ddabd63e

Added by Arnaud Dieumegard over 3 years ago

Updated tests for lustrei vhdl import

View differences:

vhdl_json/vhdl_files/2-exportOK/cnes_guidelines/rule/data/STD_00700_good.json
35 35
            }
36 36
          ]}
37 37
        ], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", {
38
          "name" : ["IDENTIFIER", "DFlipFlop1"], "inst_unit" : ["SIMPLE_NAME", "DFlipFlop"], "port_map" : [{
38
          "name" : ["IDENTIFIER", "DFlipFlop1"], "inst_unit" : ["SIMPLE_NAME", "DFlipFlop"], "inst_unit_type" : "component", "port_map" : [{
39 39
            "formal_name" : ["SIMPLE_NAME", "i_Clock"], "actual_designator" : ["SIMPLE_NAME", "i_Clock"]}
40 40
          , {
41 41
            "formal_name" : ["SIMPLE_NAME", "i_Reset_n"], "actual_designator" : ["SIMPLE_NAME", "i_Reset_n"]}

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