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-- Copyright (C) 2001 Bill Billowitch.
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-- Some of the work to develop this test suite was done with Air Force
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-- support.  The Air Force and Bill Billowitch assume no
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-- responsibilities for this software.
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version. 
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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-- for more details. 
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
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-- ---------------------------------------------------------------------
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--
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-- $Id: tc1309.vhd,v 1.2 2001-10-26 16:29:39 paw Exp $
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-- $Revision: 1.2 $
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--
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-- ---------------------------------------------------------------------
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package c08s04b00x00p07n01i01309pkg is
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  -- Type declarations.
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  subtype     BV2  is BIT_VECTOR( 0 to 1 );
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  subtype     CH2  is STRING( 1 to 2 );
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  -- Constant declarations.
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  constant BVC  : BV2 := B"00";
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  constant CHC  : CH2 := "bb";
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  -- Function returns BV2.
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  function  returnBV2 return BV2;
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  -- Function returns CH2.
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  function  returnCH2 return CH2;
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end c08s04b00x00p07n01i01309pkg;
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package body c08s04b00x00p07n01i01309pkg is
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  -- Function returns BV2.
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  function  returnBV2 return BV2 is
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  begin
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    return ( BVC );
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  end returnBV2;
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  -- Function returns CH2.
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  function  returnCH2 return CH2 is
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  begin
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    return( CHC );
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  end returnCH2;
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end c08s04b00x00p07n01i01309pkg;
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use work.c08s04b00x00p07n01i01309pkg.all;
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ENTITY c08s04b00x00p07n01i01309ent IS
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END c08s04b00x00p07n01i01309ent;
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ARCHITECTURE c08s04b00x00p07n01i01309arch OF c08s04b00x00p07n01i01309ent IS
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  -- Local signals.
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  signal S       : BIT;
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  signal T       : BIT;
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  signal C1, C2  : CHARACTER;
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BEGIN
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  TESTING: PROCESS
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    -- local variables
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    variable BITV     : BV2 := B"11";
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    variable STRV     : CH2 := "ab";
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    variable ShouldBeTime : TIME;
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    variable k : integer := 0;
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  BEGIN
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    -- Assign with a variable as the expression.
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    ( S, T )  <= BITV after 10 ns;
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    ShouldBeTime := NOW + 10 ns;
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    wait on S,T;
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    if (ShouldBeTime /= Now or S /= BITV(0) or T /= BITV(1)) then
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      k := 1;
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    end if;
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    assert (ShouldBeTime = NOW);
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    assert ((S = BITV( 0 )) and (T = BITV( 1 )));
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    ( C1,C2 ) <= STRV after 10 ns;
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    ShouldBeTime := NOW + 10 ns;
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    wait on C1,C2;
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    if (ShouldBeTime /= Now or C1 /= STRV(1) or C2 /= STRV(2)) then
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      k := 1;
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    end if;
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    assert (ShouldBeTime = NOW);
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    assert ((C1 = STRV( 1 )) and (C2 = STRV( 2 )));
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    -- Assign with a function return value.
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    ( S, T )  <= returnBV2 after 10 ns;
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    ShouldBeTime := NOW + 10 ns;
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    wait on S,T;
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    if (ShouldBeTime /= Now or S /= BVC(0) or T /= BVC(1)) then
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      k := 1;
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    end if;
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    assert (ShouldBeTime = NOW);
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    assert ((S = BVC( 0 )) and (T = BVC( 1 )));
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    ( C1,C2 ) <= returnCH2 after 10 ns;
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    ShouldBeTime := NOW + 10 ns;
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    wait on C1,C2;
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    if (ShouldBeTime /= Now or C1 /= CHC(1) or C2 /= CHC(2)) then
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      k := 1;
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    end if;
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    assert (ShouldBeTime = NOW);
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    assert ((C1 = CHC( 1 )) and (C2 = CHC( 2 )));
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    -- Assign with a qualified expression.
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    ( S, T )  <= BV2'( '0', '1' ) after 10 ns;
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    ShouldBeTime := NOW + 10 ns;
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    wait on S,T;
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    if (ShouldBeTime /= Now or S /= '0' or T /= '1') then
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      k := 1;   
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    end if;
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    assert (ShouldBeTime = NOW);
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    assert ((S = '0') and (T = '1'));
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    ( C1,C2 ) <= CH2'( 'c', 'c' ) after 10 ns;
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    ShouldBeTime := NOW + 10 ns;
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    wait on C1,C2;
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    if (ShouldBeTime /= Now or C1 /= 'c' or C2 /= 'c') then
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      k := 1;
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    end if;
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    assert (ShouldBeTime = NOW);
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    assert ((C1 = 'c') and (C2 = 'c'));
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    assert NOT( k = 0 ) 
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      report "***PASSED TEST: c08s04b00x00p07n01i01309"
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      severity NOTE;
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    assert ( k = 0 ) 
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      report "***FAILED TEST: c08s04b00x00p07n01i01309 - If the target of the signal assignment statement is in the form of an aggregate, then the type of the aggregate must be determinable from the context."
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      severity ERROR;
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    wait;
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  END PROCESS TESTING;
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END c08s04b00x00p07n01i01309arch;
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