Project

General

Profile

Download (2.88 KB) Statistics
| Branch: | Tag: | Revision:
1

    
2
-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
3

    
4
-- This file is part of VESTs (Vhdl tESTs).
5

    
6
-- VESTs is free software; you can redistribute it and/or modify it
7
-- under the terms of the GNU General Public License as published by the
8
-- Free Software Foundation; either version 2 of the License, or (at
9
-- your option) any later version. 
10

    
11
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
12
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13
-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14
-- for more details. 
15

    
16
-- You should have received a copy of the GNU General Public License
17
-- along with VESTs; if not, write to the Free Software Foundation,
18
-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
19

    
20
-- ---------------------------------------------------------------------
21
--
22
-- $Id: ch_03_ch_03_12.vhd,v 1.3 2001-10-26 16:29:33 paw Exp $
23
-- $Revision: 1.3 $
24
--
25
-- ---------------------------------------------------------------------
26

    
27
entity ch_03_12 is
28
end entity ch_03_12;
29

    
30
architecture test of ch_03_12 is
31
begin
32

    
33
  process_3_4_a : process is
34

    
35
                            constant condition, condition_1,
36
                          condition_2, condition_3 : boolean := true;
37
                          variable index : integer;
38

    
39
  begin
40

    
41
    -- code from book: syntax check only
42

    
43
    -- change "condition" to roman italic
44

    
45
    -- not in book:
46
    loop
47
      -- end not in book
48

    
49
      if condition then
50
        exit;
51
      end if;
52

    
53
      -- not in book:
54
    end loop;
55
    -- end not in book
56

    
57
    --
58

    
59
    -- change "condition" to roman italic
60

    
61
    loop
62
      -- . . .
63
      exit when condition;
64
      -- . . .
65
    end loop;
66
    -- . . .      -- control transferred to here
67
    -- when condition becomes true within the loop
68

    
69
    --
70

    
71
    loop_name : loop
72
      -- . . .
73
      exit loop_name;
74
      -- . . .
75
    end loop loop_name ;
76

    
77
    --
78

    
79
    -- change conditions to roman italic with hyphens
80

    
81
    outer : loop
82
      -- . . .
83
      inner : loop
84
        -- . . .
85
        exit outer when condition_1; -- exit 1
86
        -- . . .
87
        exit when condition_2;       -- exit 2
88
        -- . . .
89
      end loop inner;
90
      -- . . .                      -- target A
91
      exit outer when condition_3;   -- exit 3
92
      -- . . .
93
    end loop outer;
94
    -- . . .                        -- target B
95

    
96
    --
97

    
98
    -- "statement..." in roman italic with hyphens
99

    
100
    loop
101
      -- statement_1;
102
      next when condition;
103
      -- statement_2;
104
    end loop;
105

    
106
    --
107

    
108
    -- "statement..." in roman italic with hyphens
109

    
110
    loop
111
      -- statement_1;
112
      if not condition then
113
        -- statement_2;
114
      end if;
115
    end loop;
116

    
117
    --
118

    
119
    while index > 0 loop
120
      -- . . .      -- statement A: do something with index
121
    end loop;
122
    -- . . .    -- statement B
123

    
124

    
125
    -- end of code from book
126

    
127
    wait;
128
  end process process_3_4_a;
129

    
130
end architecture test;
(13-13/171)