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1 d93979b7 Arnaud Dieumegard
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-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version. 
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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-- for more details. 
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
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-- ---------------------------------------------------------------------
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--
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-- $Id: ch_18_fg_18_06.vhd,v 1.2 2001-10-26 16:29:36 paw Exp $
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-- $Revision: 1.2 $
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--
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-- ---------------------------------------------------------------------
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library ieee;  use ieee.std_logic_1164.all;
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               entity fg_18_06 is
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               end entity fg_18_06;
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               architecture test of fg_18_06 is
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               begin
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                 -- code from book
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                 stimulus_generator : process is
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                                                type directory_file is file of string;
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                                              file directory : directory_file open read_mode is "stimulus-directory";
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                                              variable file_name : string(1 to 50);
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                                              variable file_name_length : natural;
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                                              variable open_status : file_open_status;
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                                              subtype stimulus_vector is std_logic_vector(0 to 9);
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                                              type stimulus_file is file of stimulus_vector;
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                                              file stimuli : stimulus_file;
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                                              variable current_stimulus : stimulus_vector;
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                                              -- . . .
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                 begin
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                   file_loop : while not endfile(directory) loop
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                     read( directory, file_name, file_name_length );
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                     if file_name_length > file_name'length then
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                       report "file name too long: " & file_name & "... - file skipped"
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                         severity warning;
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                       next file_loop;
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                     end if;
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                     file_open ( open_status, stimuli,
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                                 file_name(1 to file_name_length), read_mode );
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                     if open_status /= open_ok then
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                       report file_open_status'image(open_status) & " while opening file "
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                         & file_name(1 to file_name_length) & " - file skipped"
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                         severity warning;
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                       next file_loop;
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                     end if;
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                     stimulus_loop : while not endfile(stimuli) loop
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                       read(stimuli, current_stimulus);
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                       -- . . .    -- apply the stimulus
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                     end loop stimulus_loop;
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                     file_close(stimuli);
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                   end loop file_loop;
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                   wait;
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                 end process stimulus_generator;
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                 -- end code from book
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               end architecture test;