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1 d93979b7 Arnaud Dieumegard
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-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version. 
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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-- for more details. 
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
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-- ---------------------------------------------------------------------
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--
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-- $Id: ch_08_fg_08_02.vhd,v 1.2 2001-10-26 16:29:34 paw Exp $
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-- $Revision: 1.2 $
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--
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-- ---------------------------------------------------------------------
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entity address_decoder is
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  port ( addr : in work.cpu_types.address;
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         status : in work.cpu_types.status_value;
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         mem_sel, int_sel, io_sel : out bit );
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end entity address_decoder;
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--------------------------------------------------
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architecture functional of address_decoder is
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  constant mem_low : work.cpu_types.address := X"000000";
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  constant mem_high : work.cpu_types.address := X"EFFFFF";
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  constant io_low : work.cpu_types.address := X"F00000";
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  constant io_high : work.cpu_types.address := X"FFFFFF";
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begin
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  mem_decoder :
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    mem_sel <= '1' when ( work.cpu_types."="(status, work.cpu_types.fetch)
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                          or work.cpu_types."="(status, work.cpu_types.mem_read)
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                          or work.cpu_types."="(status, work.cpu_types.mem_write) )
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               and addr >= mem_low
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   and addr <= mem_high else
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               '0';
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  int_decoder :
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    int_sel <= '1' when work.cpu_types."="(status, work.cpu_types.int_ack) else
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               '0';
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  io_decoder :
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    io_sel <= '1' when ( work.cpu_types."="(status, work.cpu_types.io_read)
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                         or work.cpu_types."="(status, work.cpu_types.io_write) )
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              and addr >= io_low
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  and addr <= io_high else
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              '0';
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end architecture functional;
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-- not in book
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entity fg_08_02 is
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end entity fg_08_02;
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architecture test of fg_08_02 is
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  use work.cpu_types.all;
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  signal addr : address := X"000000";
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  signal status : status_value := idle;
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  signal mem_sel, int_sel, io_sel : bit;
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begin
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  dut : entity work.address_decoder
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    port map ( addr => addr, status => status,
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               mem_sel => mem_sel, int_sel => int_sel, io_sel => io_sel );
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  stimulus : process is
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  begin
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    wait for 10 ns;
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    status <= fetch;      wait for 10 ns;
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    status <= mem_read;   wait for 10 ns;
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    status <= mem_write;  wait for 10 ns;
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    status <= io_read;    wait for 10 ns;
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    status <= io_write;   wait for 10 ns;
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    status <= int_ack;    wait for 10 ns;
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    status <= idle;       wait for 10 ns;
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    addr <= X"EFFFFF";    wait for 10 ns;
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    status <= fetch;      wait for 10 ns;
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    status <= mem_read;   wait for 10 ns;
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    status <= mem_write;  wait for 10 ns;
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    status <= io_read;    wait for 10 ns;
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    status <= io_write;   wait for 10 ns;
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    status <= int_ack;    wait for 10 ns;
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    status <= idle;       wait for 10 ns;
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    addr <= X"F00000";    wait for 10 ns;
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    status <= fetch;      wait for 10 ns;
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    status <= mem_read;   wait for 10 ns;
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    status <= mem_write;  wait for 10 ns;
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    status <= io_read;    wait for 10 ns;
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    status <= io_write;   wait for 10 ns;
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    status <= int_ack;    wait for 10 ns;
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    status <= idle;       wait for 10 ns;
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    addr <= X"FFFFFF";    wait for 10 ns;
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    status <= fetch;      wait for 10 ns;
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    status <= mem_read;   wait for 10 ns;
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    status <= mem_write;  wait for 10 ns;
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    status <= io_read;    wait for 10 ns;
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    status <= io_write;   wait for 10 ns;
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    status <= int_ack;    wait for 10 ns;
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    status <= idle;       wait for 10 ns;
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    wait;
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  end process stimulus;
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end architecture test;
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-- end not in book