ERROR: Unable to parse source file : /home/adieumeg/Documents/Repositories/lustrec-tests/vhdl_json/vhdl_files/ghdl/ghdl/testsuite/vests/vhdl-93/ashenden/compliant/ap_a_ap_a_02.vhd
ERROR: Parse error at line 42 column 8:

32: library ieee;  use ieee.std_logic_1164.all;
33: 
34: architecture test of ap_a_02 is
35: 
36:   -- code from book
37: 
38:   -- end code from book
39: 
40: begin
41: 
42:   b1 : block is
           ^
43:                signal sulv : std_ulogic_vector(7 downto 0);
44:              signal slv : std_logic_vector(7 downto 0);
45:   begin
46:     -- code from book
47: 
48:     sulv <= To_stdulogicvector ( slv );
49: 
50:     -- end code from book
51:     slv <= "10101010";
52:   end block b1;

WARN: Missing blame information for the following files:
WARN:   * ap_a_ap_a_02.vhd
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