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-- Copyright (C) 2001 Bill Billowitch.
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-- Some of the work to develop this test suite was done with Air Force
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-- support. The Air Force and Bill Billowitch assume no
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-- responsibilities for this software.
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version.
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-- ---------------------------------------------------------------------
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--
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-- $Id: tc1392.vhd,v 1.2 2001-10-26 16:29:41 paw Exp $
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-- $Revision: 1.2 $
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--
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-- ---------------------------------------------------------------------
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ENTITY c08s05b00x00p04n04i01392ent IS
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END c08s05b00x00p04n04i01392ent;
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ARCHITECTURE c08s05b00x00p04n04i01392arch OF c08s05b00x00p04n04i01392ent IS
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--
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TYPE rec_list IS RECORD
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a,b,c,d : INTEGER;
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END RECORD;
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BEGIN
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TESTING: PROCESS
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--
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VARIABLE rec1 : rec_list := (1,2,3,4);
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VARIABLE rec2 : rec_list := (1,2,3,4);
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VARIABLE rec3 : rec_list := (1,2,3,4);
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VARIABLE rec4 : rec_list := (1,2,3,4);
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VARIABLE rec5 : rec_list := (1,2,3,4);
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VARIABLE rec6 : rec_list := (1,2,3,4);
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--
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BEGIN
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--
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rec1 := ( rec1.d, rec1.c, rec1.b, rec1.a);
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--
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( rec2.d, rec2.c, rec2.b, rec2.a) := rec2;
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--
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(rec3.d, rec3.c, rec3.b, rec3.a)
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:= rec_list' (rec3.c, rec3.d, rec3.a, rec3.b);
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--
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(rec4.a, rec4.b, rec4.c, rec4.d)
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:= rec_list' ( d=>rec4.a, c=>rec4.b, b=>rec4.c, a=>rec4.d);
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--
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( d=>rec5.a, c=>rec5.b, b=>rec5.c, a=>rec5.d) := rec5;
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--
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(rec6.d, rec6.c, rec6.b, rec6.a)
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:= rec_list' ( d=>rec6.a, c=>rec6.b, b=>rec6.c, a=>rec6.d);
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--
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ASSERT NOT( rec1 = (4,3,2,1) and
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rec2 = (4,3,2,1) and
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rec3 = (2,1,4,3) and
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rec4 = (4,3,2,1) and
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rec5 = (4,3,2,1) and
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rec6 = (1,2,3,4))
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report "***PASSED TEST: c08s05b00x00p04n04i01392"
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severity NOTE;
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ASSERT ( rec1 = (4,3,2,1) and
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rec2 = (4,3,2,1) and
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rec3 = (2,1,4,3) and
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rec4 = (4,3,2,1) and
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rec5 = (4,3,2,1) and
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rec6 = (1,2,3,4))
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report "***FAILED TEST: c08s05b00x00p04n04i01392 - Record aggregates type variable assignment fail."
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severity ERROR;
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wait;
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END PROCESS TESTING;
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END c08s05b00x00p04n04i01392arch;
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