Project

General

Profile

Download (850 Bytes) Statistics
| Branch: | Tag: | Revision:
1
ERROR: Unable to parse source file : /home/adieumeg/Documents/Repositories/lustrec-tests/vhdl_json/vhdl_files/ghdl/ghdl/testsuite/vests/vhdl-93/ashenden/compliant/ch_16_fg_16_10.vhd
2
ERROR: Parse error at line 63 column 9:
3

    
4
53:   signal address_bus : resolve_word word bus;
5
54:   signal hold_req : bit;
6
55:   -- . . .
7
56: 
8
57:   -- not in book
9
58:   signal clk : bit := '0';
10
59:   -- end not in book
11
60: 
12
61: begin
13
62: 
14
63:   cpu : block is
15
            ^
16
64: 
17
65:                 signal guard : boolean := false;
18
66:               signal cpu_internal_address : word;
19
67:               -- . . .
20
68: 
21
69:   begin
22
70: 
23
71:     cpu_address_driver:
24
72:       address_bus <= guarded cpu_internal_address;
25
73: 
26

    
27
WARN: Missing blame information for the following files:
28
WARN:   * ch_16_fg_16_10.vhd
29
WARN: This may lead to missing/broken features in SonarQube
(323-323/510)